NextZ80

When executing 4 bytes instructions : DD/FD + CB + index + instruction M1 is high during DD/FD + CB : ok but M1 is high during instruction (byte 4) : it is not the normal z80 behaviour (compared to to TV80).

Thank for your help.

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For example :

BIT 6,(IX-2) is :

                 DD CB FE 76

M1 (TV80) 1 1 0 0 M1 (Next) 1 1 0 1

Right, Z80 does not activate M1 during the opcode fetch for these prefixed instructions. I fixed the issue on SVN. Thank you

Thanks a lot for the support. Your design is well made and really fast.