There are cases when a cache line refill may fill a cacheline in the instruction cache with erroneous data. See http://www.opencores.org/forums.cgi/openrisc/2005/10/002046 for more details.
you can try this way to avoid cache related bug. // else if(wb_ack_i & biu_cyc_i & biu_stb_i & ~aborted_r) previous_complete<= #1 1'b1; //
Fixed with OpenRISC v3.