2nd order Sigma-Delta DAC

DSM2 variant, when tested against a loop of 100x 16bit PCM samples at 2 MHz MCLK (Nexys4 / Artix7 series); exhibits random, though clearly audible clicks. The effect is even more prominent when feeding constant-value samples instead of a sine-wave.

These parasitic oscillations can be cancelled when damping the input to the second modulator stage, e.g. dividing input values by 2, see patched code snippet below.

process (clk, n_rst) variable v1, v2 : signed(nbits+2 downto 0) := (others => '0'); begin -- process if n_rst = '0' then -- asynchronous reset (active low) del1 <= (others => '0'); del2 <= (others => '0'); dout <= '0'; elsif clk'event and clk = '1' then -- rising clock edge -- start patch v1 := din - d_q + del1; v2 := v1/2 - d_q + del2; -- damp input to second modulator stage! -- division by 2 will infer right shift. -- end patch if v2 > 0 then d_q <= shift_left(c1, nbits); dout <= '1'; else d_q <= shift_left(c_1, nbits); dout <= '0'; end if; del1 <= v1; del2 <= v2; end if; end process;

Regards, Burkhard