SPI controller core

SPI protocol have 4 different clocking modes based on clock polararity (CPOL) and shifting phase (CPHA), but this spi module can only handle 2 (the two with CPOL low) + 2 other not used by SPI.

To address this while keeping the added flexibility a CPOL bit should be added to control the polarity of the outgoing clock.

While doing this it might also be worthwhile to rename RX_NEG/TX_NEG to .._PHASE2 to indicate that the action is taken on the second clock phase regardless of polarity.