SD/MMC Controller

Hi ,

I have downloaded SD/MMC core. I have created test bench environment and try to run initialize SD card rountine. I face issue in card initialize. Can you tell me it's a rtl issue or my test bench issue. I am using timescale 1ns/1ps and i have driven all sequence required to initialize card.

Card get struck in state 4,5,6,7 and does not come out of this state. I tried given delay in us and in ms .

I would like to take this opportunity to thank Steve Fielding for the core. Thanks, it works!

And since it works: what does "state 4,5,6,7" mean? there are only 4 commands during the initialization. I'll be happy to paste the entity I made to use the core. It's in VHDL though.

Thanks again, Eitan.

Hi, After initializing without any problem, I´m trying to perform a block write but finally I get a WRITE_CMD_ERROR. It seems that the core finishes because a time out while waiting for SPI_TRANS_STS_REG != TRANS_BUSY.

Someone has faced this problem before? I´ve been tying to find a solution for weeks.

Thanks, Ibrana

PS: I´m running my verilog project in an Altera DE1 Board

Hello,

I'm also facing a problem regarding initializing the sd card. When I run the given test bench the sd card returns the following error message:

ERROR: SD init test failed. Error code = 0x01.

However, all other tests pass just fine.

When I wrote a hardware FSM to perform the initialization I get the same error after loading the core onto an FPGA.

Tracing through the initSD.v code, I reason that the reason for the error is due to a INIT_CMD0_ERROR.

However, I have little knowledge of the sd-spi standard and was wondering what this error meant and how to remedy it?

Thank you, Alvin

My error actually isn't a problem. Turns out you need to define SIM_COMPILE in spiMaster_defines.v and it will slow down the reset polling time and enable the sdModel.setRespByte(8'h01); to be seen in time to respond.