T80 cpu

Whilst attempting to implement a GameBoy, I've discovered what I believe are bugs - or probably more correctly - unfinished implementations - of a few GameBoy instructions.

Most notably, LD ($FF00+C),A does not appear to be correct. The code looks (and behaves) like it was cut-and-paste from the LD (BC),A instruction microcode, and additionally asserts the IORQ signal. It would also appear that the complementary instruction LD A,($FF00+C) is similarly incomplete.

Is there any intention to complete implementation of the GameBoy mode in the near future? I'll attempt to fix/modify/add support for these instructions myself, but must admit so far I've found the implementation rather difficult to follow. No doubt that will improve with further study of the core...

OK, I may have submitted this prematurely. Sorry.

I still have a bug, but it may not be anything mentioned above. I'm not seeing $FF on the high address byte during these instructions...

OK, I have more information...

For LD($FF00+C),A, it asserts IORQ (OK, I can accept that may be correct), but whilst IORQ is asserted, Set_Addr_To is 'aNone'.

Trouble is, T80.vhd is expecting Set_Addr_To to be 'aBC', where it puts $FF onto the high byte of the address bus. Hence the reason is is actually doing a LD(BC),A.

So, either the microcode needs to set 'aBC' in more states, or the top-level should be checking for 'aNone' for Mode=3???