TG68 - execute 68000 Code

The condition checking appears to have a bug. In the following code frag, D0 is loaded with 253 therefore the instruction "DBRA D0,X_SET1" should loop 253 times but falls through the first time and is only executed once. The bug was uncovered while using ModelSim to investigate code failure in my FPGA project.

Code sample:

00F0060E 872 * 00F0060E 873 00F0060E 874 Exception vector table initialization routine 00F0060E 875 All vectors not setup are loaded with uninitialized routine vector 00F0060E 876 00F0060E 41F8 0008 877 X_SET LEA.L X_BASE,A0 Point to base of exception table 00F00612 303C 00FD 878 MOVE.W #253,D0 Number of vectors 00F00616 20FC 00F009FE 879 X_SET1 MOVE.L #X_UN,(A0)+ Store uninitialized exception vector 00F0061C 51C8 FFF8 880 DBRA D0,X_SET1 Repeat until all entries preset 00F00620 91C8 881 SUB.L A0,A0 Clear A0 (points to vector table)

As it turns outs, any instruction that performs a subtraction failed when the simulation was run using ModelSim. The problem was traced to "XX" values being written back into the regfiles after the subtraction process. When I added code to reset all regfiles to zero during reset, "XX"es are never written back into the regfiles, thus preventing the simulation from failing. This explains why the code would work in an FPGA but fail when using ModelSim.

Please ignore this bug entry.

This should really be fixed. I wasted lots of time on this.