hello,
i want to simulate the design in modelsim tool, how to do, i am a beginner. file given in bench i used but no wave form observed. how to see in modelsim tool. if any notes sort of thing plz upload it, will be very helpful for me to learn.
transcript file "" transcript file transcript.txt
vdel -lib work -all
vlib work vmap work
vcom -work work \ ../../../rtl/vhdl/slib_clock_div.vhd\ ../../../rtl/vhdl/slib_counter.vhd\ ../../../rtl/vhdl/slib_edge_detect.vhd\ ../../../rtl/vhdl/slib_fifo.vhd\ ../../../rtl/vhdl/slib_input_filter.vhd\ ../../../rtl/vhdl/slib_input_sync.vhd\ ../../../rtl/vhdl/slib_mv_filter.vhd\ ../../../rtl/vhdl/uart_baudgen.vhd\ ../../../rtl/vhdl/uart_interrupt.vhd\ ../../../rtl/vhdl/uart_receiver.vhd\ ../../../rtl/vhdl/uart_transmitter.vhd\ ../../../rtl/vhdl/uart_16750.vhd\ ../../../bench/vhdl/txt_util.vhd\ ../../../bench/vhdl/uart_package.vhd\ ../../../bench/vhdl/uart_transactor.vhd\
vsim -t 1ps work.uart_transactor
run 1 ps do wave.do