Ultimate CRC

Initial values: POLYNOMIAL = x"00018bb7" INIT_VALUE = x”00000000” DATA_WIDTH = 128 SYNC_RESET = 1 data_i = x”FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF” (128 1’s)

The above would produce a 32-bit CRC output.

I am generating a good clock, reset, and clock enable.

The problem I am seeing is that the CRC never seems to converge using the above inputs. I never get a match_o signal high, and the crc_o is changing every clock cycle, never settling to a fixed value.

The CRC will indeed change for every cycle. I have added your case to the CRC test bench, assuming that you want to generate and check CRC on 128bit words. The checker then takes a 160bit input (128+32) and it is important that the CRC bits are mapped correctly into the higher bits of the 160bit word. If you run the test bench you will see that the checker indeed generates match_o high signal.