USB 1.1 PHY

I am implementing the PHY with dpll (using an NCO locked to sofs) and noticed if the clock frequency to the phy is too high a byte error can occur during reception of a sof packet. If this happens the se0 can be be incorrectly decoded. With no se0 rx_active doesn't get cleared ready for reception of the next packet. rx_active must be cleared so sync can be found and to restart the nrz decoder. Clearing rx_active when a byte_err occurs fixes this.

In normal operation I don't expect the frequency error to the phy to be large enough for the condition above to occur, however it surfaced during verification using unusual (out of spec.) sof timing.