Viterbi Decoder (AXI4-Stream compliant)

Hi

I am trying to simulate the viterbi decoder core you provided using the ISE simulator. But It gives an error "pkg_trellis is not compiled ". Also the package "pkg_trellis" fails in behavourial check syntax.

Also I am using xilinx ISE 10.1

Are you sure you used the correct library? In ISE 10.1 the default working library is set to "work" and may have to be changed to "dec_viterbi".

For syntax problems, please send me the error message. Some problems occure due to different syntax interpretations and mostly can be adapted, with the help of the error message.

Sorry for replying so late,

But I thought I should try to resolve the problem my self. By the grace of Almighty, I resolved the problem and it is working now.

The problem was caused by some file association error, which was resolved by making a new project, with the same source files.

Can you provide any theoretical detail about the selection of window length, and the acquisition length.

Although some detail is given in the user guide you have provided. But it some how assumes that, you know these terms.

Sorry for my late response. I do not have time to write a description by myself, but I can offer the book, my decoder is based on.

Most techniques I used in the architecture are based on ideas from the book: Principles of digital communication and coding by Viterbi, Andrew J. It can be found an downloaded for free at http://archive.org/details/principledigcom00viterich There are more publications available, but this gives a good overview with several details.

If you have any specific questions you also may write me a mail. I will try to answer your questions then.