Wishbone LPC Host and Peripheral Bridge
LPC firmware writes must not insert wait-states. #4
Closed hharte opened this issue almost 16 years ago
hharte commented almost 16 years ago
the LPC peripheral core inserts at least one wait-state following a firmware memory write. According to the LPC specification, firmware writes must not insert any wait-states, and immediately respond with READY.
hharte was assigned almost 16 years ago
hharte closed this almost 16 years ago
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