Subversion Repositories 1000base-x

//////////////////////////////////////////////////////////////////////

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////  File name "clean_rst.v"                                     ////

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////  This file is part of the :                                  ////

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//// "1000BASE-X IEEE 802.3-2008 Clause 36 - PCS project"         ////

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////  http://opencores.org/project,1000base-x                     ////

////                                                              ////

////  Author(s):                                                  ////

////      - D.W.Pegler Cambridge Broadband Networks Ltd           ////

////                                                              ////

////      { peglerd@gmail.com, dwp@cambridgebroadand.com }        ////

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//////////////////////////////////////////////////////////////////////

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//// Copyright (C) 2009 AUTHORS. All rights reserved.             ////

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//// This source file may be used and distributed without         ////

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//// removed from the file and that any derivative work contains  ////

//// the original copyright notice and the associated disclaimer. ////

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//// This source file is free software; you can redistribute it   ////

//// and/or modify it under the terms of the GNU Lesser General   ////

//// Public License as published by the Free Software Foundation; ////

//// either version 2.1 of the License, or (at your option) any   ////

//// later version.                                               ////

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//// This source is distributed in the hope that it will be       ////

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//// PURPOSE.  See the GNU Lesser General Public License for more ////

//// details.                                                     ////

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//// You should have received a copy of the GNU Lesser General    ////

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//// from http://www.opencores.org/lgpl.shtml                     ////

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`include "timescale.v"

module clean_rst(

  input      clk,

  input      rsti,

  output reg rsto

);

  reg rstt;

   always @(posedge clk, posedge rsti)

     begin

        rstt <= (rsti) ? 1 : 0;

        rsto <= (rsti) ? 1 : rstt;

     end

endmodule