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1000BASE-X IEEE 802.3-2008 Clause 36/37 - PCS Testbench
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-------------------------------------------------------
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The following README describes howto run the 802.3-2008 Clause 36/37 1000BASE-X
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simulation/testbench under ModelSim PE (6.6c) with Xilinx 12.3 Simulation
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libraries (UNISIMS).
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Dave W Pegler { peglerd@gmail.com} 12th February 2012
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-------------------------------------------------------------------------
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1. Download latest version of 1000base-x firmware
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-------------------------------------------------
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To download the latest version of the 1000base-x firmware, go to :
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http://opencores.org/download,1000base-x
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or, using SVN, checkout the trunk:
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svn co http://opencores.org/ocsvn/1000base-x/1000base-x/trunk
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[dwp@froggatt ~]$ cd /tmp/
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[dwp@froggatt tmp]$ mkdir 1000base-x
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[dwp@froggatt tmp]$ cd 1000base-x/
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[dwp@froggatt 1000base-x]$ svn co http://opencores.org/ocsvn/1000base-x/1000base-x/trunk
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A trunk/testbench
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A trunk/testbench/rtl
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A trunk/testbench/rtl/verilog
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A trunk/testbench/rtl/verilog/gmii_rx_model.v
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A trunk/testbench/rtl/verilog/gmii_tx_model.v
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A trunk/testbench/rtl/verilog/interfaces.v
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A trunk/testbench/rtl/verilog/clock_gen.v
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A trunk/testbench/rtl/verilog/encoder_8b10b_threads.v
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A trunk/testbench/rtl/verilog/tb_utils.v
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A trunk/testbench/rtl/verilog/decoder_8b_rx_model.v
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A trunk/testbench/rtl/verilog/ge_1000baseX_tb_script.v
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A trunk/testbench/rtl/verilog/ethernet_frame.v
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A trunk/testbench/rtl/verilog/ethernet_threads.v
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A trunk/testbench/rtl/verilog/timescale_tb.v
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A trunk/testbench/rtl/verilog/ge_1000baseX_utils.v
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A trunk/testbench/rtl/verilog/encoder_8b_tx_model.v
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A trunk/testbench/rtl/verilog/ge_1000baseX_tb.v
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A trunk/testbench/rtl/verilog/mdio_serial_model.v
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A trunk/testbench/rtl/verilog/packet.v
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A trunk/testbench/rtl/verilog/encoder_10b_rx_model.v
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A trunk/testbench/wave.do
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A trunk/testbench/scripts
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A trunk/testbench/scripts/compile_ge_1000baseX.sh
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A trunk/testbench/scripts/compile_ge_1000baseX_tb.sh
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A trunk/testbench/scripts/sim_ge_1000baseX_tb.sh
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A trunk/testbench/scripts/compile_unisims.sh
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A trunk/testbench/data
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A trunk/testbench/data/8b10b.dat
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A trunk/rtl
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A trunk/rtl/verilog
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A trunk/rtl/verilog/encoder_8b10b.v
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A trunk/rtl/verilog/ge_1000baseX_fpga.v
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A trunk/rtl/verilog/ge_1000baseX_an.v
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A trunk/rtl/verilog/ge_1000baseX_test.v
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A trunk/rtl/verilog/ge_1000baseX.v
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A trunk/rtl/verilog/ge_1000baseX_regs.v
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A trunk/rtl/verilog/decoder_8b10b.v
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A trunk/rtl/verilog/ge_1000baseX_core.v
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A trunk/rtl/verilog/ge_1000baseX_mdio.v
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A trunk/rtl/verilog/timescale.v
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A trunk/rtl/verilog/ge_1000baseX_rx.v
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A trunk/rtl/verilog/ge_1000baseX_tx.v
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A trunk/rtl/verilog/clean_rst.v
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A trunk/rtl/verilog/ge_1000baseX_constants.v
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A trunk/rtl/verilog/ge_1000baseX_sync.v
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A trunk/doc
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A trunk/doc/802.3-2008_section2.pdf
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A trunk/doc/802.3-2008_section3.pdf
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A trunk/doc/CL36_PCS_Test_Suite_v2.1.pdf
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A trunk/doc/US4486739.pdf
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A trunk/doc/01-581v1.pdf
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Checked out revision 4.
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[dwp@froggatt 1000base-x]$
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2. Installing ModelSim PE 6.6c and Xilinx ISE 12.3
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--------------------------------------------------
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The 1000BASE-X simulation/testbench has been designed to be built with ModelSim PE 6.6c using
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UNISIMS libraries from Xilinx ISE 12.3.
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To install Xilinx ISE 12.3, go to:
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http://www.xilinx.com/support/documentation/dt_ise12-3.htm
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If you install a different version of Xilinx ISE than 12.3, then you will need to update
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the XILINXPATH environment variable in the trunk/testbench/scripts/compile_unisims.sh
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script to ensure the correct Xilinx UNISIMS library is compiled.
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To install ModelSim 6.6c, see:
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http://model.com/content/modelsim-pe-simulation-and-debug
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3. Cygwin Build/Simulation Environment
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---------------------------------------
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The 1000BASE-X simulation/testbench has been designed to run from within a Cygwin
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Linux/Unix shell running on Windows. It is therefore necessary to install
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Cygwin by running the "setup.exe" binary from :
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http://cygwin.com/install.html
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The following is a good tutorial on how to install the basic Cygwin system
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(which is all you really need):
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http://www2.warwick.ac.uk/fac/sci/moac/people/students/peter_cock/cygwin/part1
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Once Cygwin is installed, start a Cygwin Linux/Unix session by double clicking on
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the Cygwin icon (that looks like this: http://www.davix.co.uk/cygwin-icon.gif) which
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should have appeared on your Desktop after the installation.
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When Cygwin is running, you should get a Unix/Linux shell which looks something like this:
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http://www.davix.co.uk/cygwin-screenshot.png
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Next navigate to the working directory into which the 1000base-x firmware was downloaded
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in step 1 and then into the trunk/tesbench directory, like so:
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http://www.davix.co.uk/cygwin-screenshot2.png
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You are now ready to compile the project and run the simulation by following the next steps..
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3. Synthesis/Compilation
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-------------------------
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First you will need to compile the Xilinx UNISIMS libraries. Do this by typing the
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following in the Cygwin shell (remembering to include the full stop at the beginning):
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./scripts/compile_unisims.sh
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Next you will need to compile the 1000base-x firmware. Do this by typing the following
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in the Cygwin shell:
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./scripts/compile_ge_1000baseX.sh
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Finally you will need to compile the 1000base-x testbench. Do this by typing the following
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in the Cygwin shell:
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./scripts/compile_ge_1000baseX_tb.sh
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and you should get something like this
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http://www.davix.co.uk/cygwin-screenshot3.png
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4. Running the Testbench under ModelSim
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---------------------------------------
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The final step is to startup the ModelSim simulator. Do this by typing the following
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in the Cygwin shell:
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./scripts/sim_ge_1000baseX_tb.sh
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To start the simulation running type "run -all" in the Transcript window and you
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should get something like this:
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http://www.davix.co.uk/cygwin-modelsim.png
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---------------------------------------------------------------------------------------
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