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[/] [1g_ethernet_dpi/] [tags/] [v0.0/] [sw/] [dev/] [test_main/] [src/] [_hdl/] [bsp/] [libsrc/] [axidma_v9_0/] [src/] [xaxidma_bdring.h] - Blame information for rev 3

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/******************************************************************************
2
*
3
* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
4
*
5
* Permission is hereby granted, free of charge, to any person obtaining a copy
6
* of this software and associated documentation files (the "Software"), to deal
7
* in the Software without restriction, including without limitation the rights
8
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9
* copies of the Software, and to permit persons to whom the Software is
10
* furnished to do so, subject to the following conditions:
11
*
12
* The above copyright notice and this permission notice shall be included in
13
* all copies or substantial portions of the Software.
14
*
15
* Use of the Software is limited solely to applications:
16
* (a) running on a Xilinx device, or
17
* (b) that interact with a Xilinx device through a bus or interconnect.
18
*
19
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22
* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
24
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25
* SOFTWARE.
26
*
27
* Except as contained in this notice, the name of the Xilinx shall not be used
28
* in advertising or otherwise to promote the sale, use or other dealings in
29
* this Software without prior written authorization from Xilinx.
30
*
31
******************************************************************************/
32
/*****************************************************************************/
33
/**
34
*
35
* @file xaxidma_bdring.h
36
* @addtogroup axidma_v9_0
37
* @{
38
*
39
* This file contains DMA channel related structure and constant definition
40
* as well as function prototypes. Each DMA channel is managed by a Buffer
41
* Descriptor ring, and XAxiDma_BdRing is chosen as the symbol prefix used in
42
* this file. See xaxidma.h for more information on how a BD ring is managed.
43
*
44
* <pre>
45
* MODIFICATION HISTORY:
46
*
47
* Ver   Who  Date     Changes
48
* ----- ---- -------- -------------------------------------------------------
49
* 1.00a jz   05/18/10 First release
50
* 2.00a jz   08/10/10 Second release, added in xaxidma_g.c, xaxidma_sinit.c,
51
*                     updated tcl file, added xaxidma_porting_guide.h
52
* 3.00a jz   11/22/10 Support IP core parameters change
53
* 6.00a srt  01/24/12 Added support for Multi-Channel DMA.
54
*                     - New API
55
*                       * XAxiDma_UpdateBdRingCDesc(XAxiDma_BdRing * RingPtr,
56
*                                               int RingIndex)
57
*                     - Changed APIs
58
*                       * XAxiDma_StartBdRingHw(XAxiDma_BdRing * RingPtr,
59
*                                       int RingIndex)
60
*                       * XAxiDma_BdRingStart(XAxiDma_BdRing * RingPtr,
61
*                                                int RingIndex)
62
*                       * XAxiDma_BdRingToHw(XAxiDma_BdRing * RingPtr,
63
*                               int NumBd, XAxiDma_Bd * BdSetPtr, int RingIndex)
64
*                       * XAxiDma_BdRingDumpRegs(XAxiDma_BdRing * RingPtr,
65
*                                                int RingIndex)
66
*                       * XAxiDma_BdRingSnapShotCurrBd(XAxiDma_BdRing * RingPtr,
67
*                                                int RingIndex)
68
* 7.00a srt  06/18/12  All the APIs changed in v6_00_a are reverted back for
69
*                      backward compatibility.
70
*
71
*
72
* </pre>
73
*
74
******************************************************************************/
75
 
76
#ifndef XAXIDMA_BDRING_H_       /* prevent circular inclusions */
77
#define XAXIDMA_BDRING_H_
78
 
79
#ifdef __cplusplus
80
extern "C" {
81
#endif
82
 
83
/***************************** Include Files *********************************/
84
 
85
#include "xstatus.h"
86
#include "xaxidma_bd.h"
87
 
88
 
89
 
90
/************************** Constant Definitions *****************************/
91
/* State of a DMA channel
92
 */
93
#define AXIDMA_CHANNEL_NOT_HALTED       1
94
#define AXIDMA_CHANNEL_HALTED           2
95
 
96
/* Argument constant to simplify argument setting
97
 */
98
#define XAXIDMA_NO_CHANGE               0xFFFFFFFF
99
#define XAXIDMA_ALL_BDS                 0x0FFFFFFF /* 268 Million */
100
 
101
/**************************** Type Definitions *******************************/
102
 
103
/** Container structure for descriptor storage control. If address translation
104
 * is enabled, then all addresses and pointers excluding FirstBdPhysAddr are
105
 * expressed in terms of the virtual address.
106
 */
107
typedef struct {
108
        u32 ChanBase;           /**< physical base address*/
109
 
110
        int IsRxChannel;        /**< Is this a receive channel */
111
        volatile int RunState;  /**< Whether channel is running */
112
        int HasStsCntrlStrm;    /**< Whether has stscntrl stream */
113
        int HasDRE;
114
        int DataWidth;
115
        int Addr_ext;
116
        u32 MaxTransferLen;
117
 
118
        UINTPTR FirstBdPhysAddr;        /**< Physical address of 1st BD in list */
119
        UINTPTR FirstBdAddr;    /**< Virtual address of 1st BD in list */
120
        UINTPTR LastBdAddr;             /**< Virtual address of last BD in the list */
121
        u32 Length;             /**< Total size of ring in bytes */
122
        UINTPTR Separation;             /**< Number of bytes between the starting
123
                                     address of adjacent BDs */
124
        XAxiDma_Bd *FreeHead;   /**< First BD in the free group */
125
        XAxiDma_Bd *PreHead;    /**< First BD in the pre-work group */
126
        XAxiDma_Bd *HwHead;     /**< First BD in the work group */
127
        XAxiDma_Bd *HwTail;     /**< Last BD in the work group */
128
        XAxiDma_Bd *PostHead;   /**< First BD in the post-work group */
129
        XAxiDma_Bd *BdaRestart; /**< BD to load when channel is started */
130
        int FreeCnt;            /**< Number of allocatable BDs in free group */
131
        int PreCnt;             /**< Number of BDs in pre-work group */
132
        int HwCnt;              /**< Number of BDs in work group */
133
        int PostCnt;            /**< Number of BDs in post-work group */
134
        int AllCnt;             /**< Total Number of BDs for channel */
135
        int RingIndex;          /**< Ring Index */
136
} XAxiDma_BdRing;
137
 
138
/***************** Macros (Inline Functions) Definitions *********************/
139
 
140
/*****************************************************************************/
141
/**
142
* Use this macro at initialization time to determine how many BDs will fit
143
* within the given memory constraints.
144
*
145
* The results of this macro can be provided to XAxiDma_BdRingCreate().
146
*
147
* @param        Alignment specifies what byte alignment the BDs must fall
148
*               on and must be a power of 2 to get an accurate calculation
149
*               (32, 64, 126,...)
150
* @param        Bytes is the number of bytes to be used to store BDs.
151
*
152
* @return       Number of BDs that can fit in the given memory area
153
*
154
* @note
155
*               C-style signature:
156
*               int XAxiDma_BdRingCntCalc(u32 Alignment, u32 Bytes)
157
*               This function is used only when system is configured as SG mode
158
*
159
******************************************************************************/
160
#define XAxiDma_BdRingCntCalc(Alignment, Bytes)                           \
161
        (uint32_t)((Bytes)/((sizeof(XAxiDma_Bd)+((Alignment)-1))&~((Alignment)-1)))
162
 
163
/*****************************************************************************/
164
/**
165
* Use this macro at initialization time to determine how many bytes of memory
166
* are required to contain a given number of BDs at a given alignment.
167
*
168
* @param        Alignment specifies what byte alignment the BDs must fall on.
169
*               This parameter must be a power of 2 to get an accurate
170
*               calculation (32, 64,128,...)
171
* @param        NumBd is the number of BDs to calculate memory size
172
*               requirements
173
*
174
* @return       The number of bytes of memory required to create a BD list
175
*               with the given memory constraints.
176
*
177
* @note
178
*               C-style signature:
179
*               int XAxiDma_BdRingMemCalc(u32 Alignment, u32 NumBd)
180
*               This function is used only when system is configured as SG mode
181
*
182
******************************************************************************/
183
#define XAxiDma_BdRingMemCalc(Alignment, NumBd)                 \
184
        (int)((sizeof(XAxiDma_Bd)+((Alignment)-1)) & ~((Alignment)-1))*(NumBd)
185
 
186
/****************************************************************************/
187
/**
188
* Return the total number of BDs allocated by this channel with
189
* XAxiDma_BdRingCreate().
190
*
191
* @param        RingPtr is the BD ring to operate on.
192
*
193
* @return       The total number of BDs allocated for this channel.
194
*
195
* @note
196
*               C-style signature:
197
*               int XAxiDma_BdRingGetCnt(XAxiDma_BdRing* RingPtr)
198
*               This function is used only when system is configured as SG mode
199
*
200
*****************************************************************************/
201
#define XAxiDma_BdRingGetCnt(RingPtr) ((RingPtr)->AllCnt)
202
 
203
/****************************************************************************/
204
/**
205
* Return the number of BDs allocatable with XAxiDma_BdRingAlloc() for pre-
206
* processing.
207
*
208
* @param        RingPtr is the BD ring to operate on.
209
*
210
* @return       The number of BDs currently allocatable.
211
*
212
* @note
213
*               C-style signature:
214
*               int XAxiDma_BdRingGetFreeCnt(XAxiDma_BdRing* RingPtr)
215
*               This function is used only when system is configured as SG mode
216
*
217
*****************************************************************************/
218
#define XAxiDma_BdRingGetFreeCnt(RingPtr)  ((RingPtr)->FreeCnt)
219
 
220
 
221
/****************************************************************************/
222
/**
223
* Snap shot the latest BD a BD ring is processing.
224
*
225
* @param        RingPtr is the BD ring to operate on.
226
*
227
* @return       None
228
*
229
* @note
230
*               C-style signature:
231
*               void XAxiDma_BdRingSnapShotCurrBd(XAxiDma_BdRing* RingPtr)
232
*               This function is used only when system is configured as SG mode
233
*
234
*****************************************************************************/
235
#define XAxiDma_BdRingSnapShotCurrBd(RingPtr)             \
236
        {                                                                 \
237
                if (!RingPtr->IsRxChannel) {                              \
238
                        (RingPtr)->BdaRestart =                           \
239
                                XAxiDma_ReadReg((RingPtr)->ChanBase, \
240
                                        XAXIDMA_CDESC_OFFSET);            \
241
                } else {                                                  \
242
                        if (!RingPtr->RingIndex) {                                \
243
                                (RingPtr)->BdaRestart =                   \
244
                                XAxiDma_ReadReg(            \
245
                                        (RingPtr)->ChanBase,              \
246
                                        XAXIDMA_CDESC_OFFSET);            \
247
                        } else {                                          \
248
                                (RingPtr)->BdaRestart =                   \
249
                                XAxiDma_ReadReg(                  \
250
                                (RingPtr)->ChanBase,                      \
251
                                (XAXIDMA_RX_CDESC0_OFFSET +               \
252
                                (RingPtr->RingIndex - 1) *                \
253
                                        XAXIDMA_RX_NDESC_OFFSET));        \
254
                        }                                                 \
255
                }                                                         \
256
        }
257
 
258
/****************************************************************************/
259
/**
260
* Get the BD a BD ring is processing.
261
*
262
* @param        RingPtr is the BD ring to operate on.
263
*
264
* @return       The current BD that the BD ring is working on
265
*
266
* @note
267
*               C-style signature:
268
*               XAxiDma_Bd * XAxiDma_BdRingGetCurrBd(XAxiDma_BdRing* RingPtr)
269
*               This function is used only when system is configured as SG mode
270
*
271
*****************************************************************************/
272
#define XAxiDma_BdRingGetCurrBd(RingPtr)               \
273
        (XAxiDma_Bd *)XAxiDma_ReadReg((RingPtr)->ChanBase, \
274
                                        XAXIDMA_CDESC_OFFSET)              \
275
 
276
/****************************************************************************/
277
/**
278
* Return the next BD in the ring.
279
*
280
* @param        RingPtr is the BD ring to operate on.
281
* @param        BdPtr is the current BD.
282
*
283
* @return       The next BD in the ring relative to the BdPtr parameter.
284
*
285
* @note
286
*               C-style signature:
287
*               XAxiDma_Bd *XAxiDma_BdRingNext(XAxiDma_BdRing* RingPtr,
288
*                                                       XAxiDma_Bd *BdPtr)
289
*               This function is used only when system is configured as SG mode
290
*
291
*****************************************************************************/
292
#define XAxiDma_BdRingNext(RingPtr, BdPtr)                      \
293
                (((UINTPTR)(BdPtr) >= (RingPtr)->LastBdAddr) ?  \
294
                        (UINTPTR)(RingPtr)->FirstBdAddr :       \
295
                        (UINTPTR)((UINTPTR)(BdPtr) + (RingPtr)->Separation))
296
 
297
/****************************************************************************/
298
/**
299
* Return the previous BD in the ring.
300
*
301
* @param        RingPtr is the DMA channel to operate on.
302
* @param        BdPtr is the current BD.
303
*
304
* @return       The previous BD in the ring relative to the BdPtr parameter.
305
*
306
* @note
307
*               C-style signature:
308
*               XAxiDma_Bd *XAxiDma_BdRingPrev(XAxiDma_BdRing* RingPtr,
309
*               XAxiDma_Bd *BdPtr)
310
*               This function is used only when system is configured as SG mode
311
*
312
*****************************************************************************/
313
#define XAxiDma_BdRingPrev(RingPtr, BdPtr)                              \
314
                (((u32)(BdPtr) <= (RingPtr)->FirstBdAddr) ?             \
315
                        (XAxiDma_Bd*)(RingPtr)->LastBdAddr :            \
316
                        (XAxiDma_Bd*)((u32)(BdPtr) - (RingPtr)->Separation))
317
 
318
/****************************************************************************/
319
/**
320
* Retrieve the contents of the channel status register
321
*
322
* @param        RingPtr is the channel instance to operate on.
323
*
324
* @return       Current contents of status register
325
*
326
* @note
327
*               C-style signature:
328
*               u32 XAxiDma_BdRingGetSr(XAxiDma_BdRing* RingPtr)
329
*               This function is used only when system is configured as SG mode
330
*
331
*****************************************************************************/
332
#define XAxiDma_BdRingGetSr(RingPtr)                            \
333
                XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET)
334
 
335
/****************************************************************************/
336
/**
337
* Get error bits of a DMA channel
338
*
339
* @param        RingPtr is the channel instance to operate on.
340
*
341
* @return       Rrror bits in the status register, they should be interpreted
342
*               with XAXIDMA_ERR_*_MASK defined in xaxidma_hw.h
343
*
344
* @note
345
*               C-style signature:
346
*               u32 XAxiDma_BdRingGetError(XAxiDma_BdRing* RingPtr)
347
*               This function is used only when system is configured as SG mode
348
*
349
*****************************************************************************/
350
#define XAxiDma_BdRingGetError(RingPtr)                         \
351
                (XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
352
                        & XAXIDMA_ERR_ALL_MASK)
353
 
354
/****************************************************************************/
355
/**
356
* Check whether a DMA channel is started, meaning the channel is not halted.
357
*
358
* @param        RingPtr is the channel instance to operate on.
359
*
360
* @return
361
*               - 1 if channel is started
362
*               - 0 otherwise
363
*
364
* @note
365
*               C-style signature:
366
*               int XAxiDma_BdRingHwIsStarted(XAxiDma_BdRing* RingPtr)
367
*
368
*****************************************************************************/
369
#define XAxiDma_BdRingHwIsStarted(RingPtr)                              \
370
                ((XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
371
                        & XAXIDMA_HALTED_MASK) ? FALSE : TRUE)
372
 
373
/****************************************************************************/
374
/**
375
* Check if the current DMA channel is busy with a DMA operation.
376
*
377
* @param        RingPtr is the channel instance to operate on.
378
*
379
* @return
380
*               - 1 if the DMA is busy.
381
*               - 0 otherwise
382
*
383
* @note
384
*               C-style signature:
385
*               int XAxiDma_BdRingBusy(XAxiDma_BdRing* RingPtr)
386
*               This function is used only when system is configured as SG mode
387
*
388
*****************************************************************************/
389
#define XAxiDma_BdRingBusy(RingPtr)                                      \
390
                (XAxiDma_BdRingHwIsStarted(RingPtr) &&          \
391
                ((XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
392
                        & XAXIDMA_IDLE_MASK) ? FALSE : TRUE))
393
 
394
/****************************************************************************/
395
/**
396
* Set interrupt enable bits for a channel. This operation will modify the
397
* XAXIDMA_CR_OFFSET register.
398
*
399
* @param        RingPtr is the channel instance to operate on.
400
* @param        Mask consists of the interrupt signals to enable.Bits not
401
*               specified in the mask are not affected.
402
*
403
* @note
404
*               C-style signature:
405
*               void XAxiDma_BdRingIntEnable(XAxiDma_BdRing* RingPtr, u32 Mask)
406
*               This function is used only when system is configured as SG mode
407
*
408
*****************************************************************************/
409
#define XAxiDma_BdRingIntEnable(RingPtr, Mask)                  \
410
                (XAxiDma_WriteReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET, \
411
                XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET) \
412
                        | ((Mask) & XAXIDMA_IRQ_ALL_MASK)))
413
 
414
/****************************************************************************/
415
/**
416
* Get enabled interrupts of a channel. It is in XAXIDMA_CR_OFFSET register.
417
*
418
* @param        RingPtr is the channel instance to operate on.
419
* @return       Enabled interrupts of a channel. Use XAXIDMA_IRQ_* defined in
420
*               xaxidma_hw.h to interpret this returned value.
421
*
422
* @note
423
*               C-style signature:
424
*               u32 XAxiDma_BdRingIntGetEnabled(XAxiDma_BdRing* RingPtr)
425
*               This function is used only when system is configured as SG mode
426
*
427
*****************************************************************************/
428
#define XAxiDma_BdRingIntGetEnabled(RingPtr)                            \
429
        (XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET) \
430
                & XAXIDMA_IRQ_ALL_MASK)
431
 
432
/****************************************************************************/
433
/**
434
* Clear interrupt enable bits for a channel. It modifies the
435
* XAXIDMA_CR_OFFSET register.
436
*
437
* @param        RingPtr is the channel instance to operate on.
438
* @param        Mask consists of the interrupt signals to disable.Bits not
439
*               specified in the Mask are not affected.
440
*
441
* @note
442
*               C-style signature:
443
*               void XAxiDma_BdRingIntDisable(XAxiDma_BdRing* RingPtr,
444
*                                                               u32 Mask)
445
*               This function is used only when system is configured as SG mode
446
*
447
*****************************************************************************/
448
#define XAxiDma_BdRingIntDisable(RingPtr, Mask)                         \
449
                (XAxiDma_WriteReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET, \
450
                XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET) & \
451
                        ~((Mask) & XAXIDMA_IRQ_ALL_MASK)))
452
 
453
/****************************************************************************/
454
/**
455
* Retrieve the contents of the channel's IRQ register XAXIDMA_SR_OFFSET. This
456
* operation can be used to see which interrupts are pending.
457
*
458
* @param        RingPtr is the channel instance to operate on.
459
*
460
* @return       Current contents of the IRQ_OFFSET register. Use
461
*               XAXIDMA_IRQ_*** values defined in xaxidma_hw.h to interpret
462
*               the returned value.
463
*
464
* @note
465
*               C-style signature:
466
*               u32 XAxiDma_BdRingGetIrq(XAxiDma_BdRing* RingPtr)
467
*               This function is used only when system is configured as SG mode
468
*
469
*****************************************************************************/
470
#define XAxiDma_BdRingGetIrq(RingPtr)                           \
471
                (XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
472
                        & XAXIDMA_IRQ_ALL_MASK)
473
 
474
/****************************************************************************/
475
/**
476
* Acknowledge asserted interrupts. It modifies XAXIDMA_SR_OFFSET register.
477
* A mask bit set for an unasserted interrupt has no effect.
478
*
479
* @param        RingPtr is the channel instance to operate on.
480
* @param        Mask are the interrupt signals to acknowledge
481
*
482
* @note
483
*               C-style signature:
484
*               void XAxiDma_BdRingAckIrq(XAxiDma_BdRing* RingPtr)
485
*               This function is used only when system is configured as SG mode
486
*
487
*****************************************************************************/
488
#define XAxiDma_BdRingAckIrq(RingPtr, Mask)                             \
489
                XAxiDma_WriteReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET,\
490
                        (Mask) & XAXIDMA_IRQ_ALL_MASK)
491
 
492
/************************* Function Prototypes ******************************/
493
 
494
/*
495
 * Descriptor ring functions xaxidma_bdring.c
496
 */
497
int XAxiDma_StartBdRingHw(XAxiDma_BdRing* RingPtr);
498
int XAxiDma_UpdateBdRingCDesc(XAxiDma_BdRing* RingPtr);
499
u32 XAxiDma_BdRingCreate(XAxiDma_BdRing * RingPtr, UINTPTR PhysAddr,
500
                UINTPTR VirtAddr, u32 Alignment, int BdCount);
501
int XAxiDma_BdRingClone(XAxiDma_BdRing * RingPtr, XAxiDma_Bd * SrcBdPtr);
502
int XAxiDma_BdRingAlloc(XAxiDma_BdRing * RingPtr, int NumBd,
503
                XAxiDma_Bd ** BdSetPtr);
504
int XAxiDma_BdRingUnAlloc(XAxiDma_BdRing * RingPtr, int NumBd,
505
                XAxiDma_Bd * BdSetPtr);
506
int XAxiDma_BdRingToHw(XAxiDma_BdRing * RingPtr, int NumBd,
507
                XAxiDma_Bd * BdSetPtr);
508
int XAxiDma_BdRingFromHw(XAxiDma_BdRing * RingPtr, int BdLimit,
509
                XAxiDma_Bd ** BdSetPtr);
510
int XAxiDma_BdRingFree(XAxiDma_BdRing * RingPtr, int NumBd,
511
                XAxiDma_Bd * BdSetPtr);
512
int XAxiDma_BdRingStart(XAxiDma_BdRing * RingPtr);
513
int XAxiDma_BdRingSetCoalesce(XAxiDma_BdRing * RingPtr, u32 Counter, u32 Timer);
514
void XAxiDma_BdRingGetCoalesce(XAxiDma_BdRing * RingPtr,
515
                u32 *CounterPtr, u32 *TimerPtr);
516
 
517
/* The following functions are for debug only
518
 */
519
int XAxiDma_BdRingCheck(XAxiDma_BdRing * RingPtr);
520
void XAxiDma_BdRingDumpRegs(XAxiDma_BdRing *RingPtr);
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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/** @} */

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