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[/] [2d_game_console/] [trunk/] [Processor_Quartus/] [Processor_Controller.v.bak] - Blame information for rev 2

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module Processor_Controller(
 
instruction,
clock,
reset,
add_overflow,
add_result,
sub_overflow,
sub_result,
mult_result,
divide_quotient,
divide_remain,
compare_aeb,
compare_agb,
compare_alb,
 
program_rom_addr,
opcode,
reg_a_num,
reg_b_num,
reg_c_num,
imm,
rflags_index,
const_bool,
 
sprite_level,
sprite_id,
sprite_x,
sprite_y,
sprite_color,
 
reg_c_val,
reg_b_val,
reg_a_val,
 
current_state,
next_state,
program_counter,
registers,
rflags
 
);
 
 
input   [31:0]  instruction;
input           [15:0]  add_result;
input           [15:0]  sub_result;
input           [31:0]  mult_result;
input           [15:0]  divide_quotient;
input           [15:0]  divide_remain;
input           add_overflow;
input           sub_overflow;
input           compare_aeb;
input           compare_agb;
input           compare_alb;
input   clock;
input   reset;
 
 
output                          const_bool;
output  [2:0]           rflags_index;
output  [4:0]           reg_a_num;
output  [4:0]           reg_b_num;
output  [4:0]           reg_c_num;
output  [5:0]           opcode;
output  [15:0]  imm;
 
output reg      [15:0]  reg_a_val;
output reg      [15:0]  reg_b_val;
output reg      [15:0]  reg_c_val;
 
output reg      [15:0]  program_rom_addr;
output reg      [15:0]  program_counter;
output reg      [511:0] registers;
output reg      [6:0]           rflags;
 
output reg      [5:0]           sprite_level;
output reg      [383:0] sprite_id;
output reg      [639:0] sprite_x;
output reg      [639:0] sprite_y;
output reg      [1023:0]        sprite_color;
 
assign  opcode                  =       instruction[31:26];
assign  reg_a_num               =       instruction[25:21];
assign  reg_b_num               =       instruction[20:16];
assign  reg_c_num               =       instruction[15:11];
assign  imm                             =       instruction[15:0];
assign  const_bool              =       instruction[17];
assign  rflags_index    =       instruction[20:18];
 
 
// INSTRUCTIONS OPERATION CODE
// Data Transfer Instructions
parameter opcode_lw                                             = 6'b001001;
parameter opcode_sw                                             = 6'b001010;
parameter opcode_limm                                   = 6'b001100;
// Arithmetic Instructions
parameter opcode_add                                            = 6'b010001;
parameter opcode_sub                                            = 6'b010010;
parameter opcode_mul                                            = 6'b010100;
parameter opcode_div                                            = 6'b010101;
// Logical Instructions
parameter opcode_and                                            = 6'b100001;
parameter opcode_or                                             = 6'b100010;
parameter opcode_cmp                                            = 6'b100100;
parameter opcode_not                                            = 6'b100101;
// Control Transfer Instructions
parameter opcode_jr                                             = 6'b101001;
parameter opcode_brfl                                   = 6'b101010;
parameter opcode_call                                   = 6'b101100;
parameter opcode_ret                                            = 6'b101101;
parameter opcode_nop                                            = 6'b101110;
parameter opcode_jmp                                            = 6'b101111;
// Graphical instructions
parameter opcode_sprite_id                              = 6'b111001;
parameter opcode_sprite_color                   = 6'b111010;
parameter opcode_sprite_pos                     = 6'b111100;
parameter opcode_wait_vsync                     = 6'b111111;
 
 
 
/*########################################################################*/
/*########################  FINITE STATE MACHINE  ########################*/
/*########################  PROCESSOR CONTROLLER  ########################*/
/*########################################################################*/
 
output reg      [5:0]           current_state;
output reg      [5:0]           next_state;
 
// States
parameter       Reset                                           = 6'b000000;    // Reset                                                = 0
parameter       Wait_Program_Mem_1      = 6'b000001;    // Wait_Program_Mem_1   = 1
parameter       Decode_Instruction      = 6'b000010;    // Decode_Instruction   = 2
parameter       Wait_Operation                  = 6'b000011;    // Wait_Operation                       = 3
parameter       Wait_DIV_1                              = 6'b000100;    // Wait_DIV_1                           = 4
parameter       Wait_DIV_2                              = 6'b000101;    // Wait_DIV_2                           = 5
parameter       Wait_DIV_3                              = 6'b000110;    // Wait_DIV_3                           = 6
parameter       Wait_DIV_4                              = 6'b000111;    // Wait_DIV_4                           = 7
parameter       ADD                                             = 6'b001000;    // ADD                                          = 8
parameter       SUB                                             = 6'b001001;    // SUB                                          = 9
parameter       MUL                                             = 6'b001010;    // MUL                                          = 10
parameter       DIV                                             = 6'b001011;    // DIV                                          = 11
parameter       AND                                             = 6'b001100;    // AND                                          = 12
parameter       OR                                                      = 6'b001101;    // OR                                                   = 13
parameter       CMP                                             = 6'b001110;    // CMP                                          = 14
parameter       NOT                                             = 6'b001111;    // NOT                                          = 15
parameter       SPRITE_ID                               = 6'b010000;    // SPRITE_ID                            = 16
parameter       SPRITE_COLOR                    = 6'b010001;    // SPRITE_COLOR                 = 17
parameter       SPRITE_POS                              = 6'b010010;    // SPRITE_POS                           = 18
parameter       JMP                                             = 6'b010011;    // JMP                                          = 19
parameter       LIMM                                            = 6'b010100;    // LIMM                                         = 20
parameter       Inc_Program_Counter     = 6'b100010;    // Inc_Program_Counter  = 34
 
 
 
// Next State Decoder
always @ (*)
begin
        case (current_state)
 
                // State 0
                Reset:
                begin
                        next_state = Wait_Program_Mem_1;
                end
 
                // State 1
                Wait_Program_Mem_1:
                begin
                        next_state = Decode_Instruction;
                end
 
                // State 2
                Decode_Instruction:
                begin
                        next_state = Wait_Operation;
                end
 
                // State 3
                Wait_Operation:
                begin
 
                        case (opcode)
 
                                opcode_limm:
                                begin
                                        next_state = LIMM;
                                end
 
                                opcode_add:
                                begin
                                        next_state = ADD;
                                end
 
                                opcode_sub:
                                begin
                                        next_state = SUB;
                                end
 
                                opcode_mul:
                                begin
                                        next_state = MUL;
                                end
 
                                opcode_div:
                                begin
                                        next_state = Wait_DIV_1;
                                end
 
                                opcode_and:
                                begin
                                        next_state = AND;
                                end
 
                                opcode_or:
                                begin
                                        next_state = OR;
                                end
 
                                opcode_cmp:
                                begin
                                        next_state = CMP;
                                end
 
                                opcode_not:
                                begin
                                        next_state = NOT;
                                end
 
                                opcode_sprite_id:
                                begin
                                        next_state = SPRITE_ID;
                                end
 
                                opcode_sprite_color:
                                begin
                                        next_state = SPRITE_COLOR;
                                end
 
                                opcode_sprite_pos:
                                begin
                                        next_state = SPRITE_POS;
                                end
 
                                opcode_jmp:
                                begin
                                        next_state = JMP;
                                end
 
                                default:
                                begin
                                        next_state = Reset;
                                end
 
                        endcase
 
 
                end
 
                // State 4
                Wait_DIV_1:
                begin
                        next_state = Wait_DIV_2;
                end
 
                // State 5
                Wait_DIV_2:
                begin
                        next_state = Wait_DIV_3;
                end
 
                // State 6
                Wait_DIV_3:
                begin
                        next_state = Wait_DIV_4;
                end
 
                // State 7
                Wait_DIV_4:
                begin
                        next_state = DIV;
                end
 
                // State 8
                ADD:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 9
                SUB:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 10
                MUL:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 11
                DIV:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 12
                AND:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 13
                OR:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 14
                CMP:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 15
                NOT:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 16
                SPRITE_ID:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 17
                SPRITE_COLOR:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 18
                SPRITE_POS:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 19
                JMP:
                begin
                        next_state = Wait_Program_Mem_1;
                end
 
                // State 20
                LIMM:
                begin
                        next_state = Inc_Program_Counter;
                end
 
                // State 34
                Inc_Program_Counter:
                begin
                        next_state = Wait_Program_Mem_1;
                end
 
                default:
                begin
                        next_state = Reset;
                end
 
        endcase
 
end
 
 
// Output Decoder
always @ (*)
begin
 
        // Default Assignments
        reg_a_val = registers[16*reg_a_num +: 16];
        reg_b_val = registers[16*reg_b_num +: 16];
        reg_c_val = registers[16*reg_c_num +: 16];
        sprite_level = registers[16*reg_a_num +: 6];
        program_rom_addr = program_counter;
 
        case (current_state)
 
                // State 0
                Reset:
                begin
 
                end
 
                // State 1
                Wait_Program_Mem_1:
                begin
 
                end
 
                // State 2
                Decode_Instruction:
                begin
 
                end
 
                // State 3
                Wait_Operation:
                begin
 
                end
 
                // State 4
                Wait_DIV_1:
                begin
 
                end
 
                // State 5
                Wait_DIV_2:
                begin
 
                end
 
                // State 6
                Wait_DIV_3:
                begin
 
                end
 
                // State 7
                Wait_DIV_4:
                begin
 
                end
 
                // State 8
                ADD:
                begin
 
                end
 
                // State 9
                SUB:
                begin
 
                end
 
                // State 10
                MUL:
                begin
 
                end
 
                // State 11
                DIV:
                begin
 
                end
 
                // State 12
                AND:
                begin
 
                end
 
                // State 13
                OR:
                begin
 
                end
 
                // State 14
                CMP:
                begin
 
                end
 
                // State 15
                NOT:
                begin
 
                end
 
                // State 16
                SPRITE_ID:
                begin
 
                end
 
                // State 17
                SPRITE_COLOR:
                begin
 
                end
 
                // State 18
                SPRITE_POS:
                begin
 
                end
 
                // State 19
                JMP:
                begin
 
                end
 
                // State 20
                LIMM:
                begin
 
                end
 
                // State 34
                Inc_Program_Counter:
                begin
 
                end
 
 
                default:
                begin
 
                end
 
        endcase
end
 
 
// State Register and Reset Logic
always @ (posedge clock)
begin
 
        if (reset)
        begin
                current_state   <= Reset;
 
                program_counter <= 0;
        end
 
        else
        begin
                current_state   <=        next_state;
 
 
                // State: ADD
                if (next_state == ADD)
                        registers[16*reg_a_num +: 16] <= add_result;
 
 
                // State: SUB
                if (next_state == SUB)
                        registers[16*reg_a_num +: 16] <= sub_result;
 
 
                // State: MUL
                if (next_state == MUL)
                        registers[16*reg_a_num +: 16] <= mult_result[15:0];
 
 
                // State: DIV
                if (next_state == DIV)
                        registers[16*reg_a_num +: 16] <= divide_quotient;
 
 
                // State: AND
                if (next_state == AND)
                        registers[16*reg_a_num +: 16] <= reg_a_val & reg_b_val;
 
 
                // State: OR
                if (next_state == OR)
                        registers[16*reg_a_num +: 16] <= reg_a_val | reg_b_val;
 
 
                // State: CMP
                if (next_state == CMP)
                begin
                        rflags[3] <= compare_alb;       //RFlags[below]
                        rflags[4] <= compare_aeb;       //RFlags[equal]
                        rflags[5] <= compare_agb;       //RFlags[above]
                end
 
 
                // State: NOT
                if (next_state == NOT)
                        registers[16*reg_a_num +: 16] <= ~ reg_a_val;
 
 
                // State: SPRITE_ID
                if (next_state == SPRITE_ID)
                        sprite_id[6*sprite_level +: 6] <= reg_b_val[5:0];
 
 
                // State: SPRITE_COLOR
                if (next_state == SPRITE_COLOR)
                        sprite_color[16*sprite_level +: 16] <= reg_b_val;
 
 
                // State: SPRITE_POS
                if (next_state == SPRITE_POS)
                begin
                        sprite_x[10*sprite_level +: 10] <= reg_c_val[9:0];
                        sprite_y[10*sprite_level +: 10] <= reg_b_val[9:0];
                end
 
 
                // State: JMP
                if (next_state == JMP)
                        program_counter <= imm;
 
 
                // State: LIMM
                if (next_state == LIMM)
                        registers[16*reg_a_num +: 16] <= imm;
 
 
                // State: Inc_Program_Counter
                if (next_state == Inc_Program_Counter)
                        program_counter <= program_counter + 1'b1;
 
 
        end
 
end
 
/*########################################################################*/
/*########################################################################*/
 
 
 
 
 
 
endmodule

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Subversion Repositories 2d_game_console

[/] [2d_game_console/] [trunk/] [Processor_Quartus/] [Processor_Controller.v.bak] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	lucas.vbal	`module Processor_Controller(`
2
3			`instruction,`
4			`clock,`
5			`reset,`
6			`add_overflow,`
7			`add_result,`
8			`sub_overflow,`
9			`sub_result,`
10			`mult_result,`
11			`divide_quotient,`
12			`divide_remain,`
13			`compare_aeb,`
14			`compare_agb,`
15			`compare_alb,`
16
17			`program_rom_addr,`
18			`opcode,`
19			`reg_a_num,`
20			`reg_b_num,`
21			`reg_c_num,`
22			`imm,`
23			`rflags_index,`
24			`const_bool,`
25
26			`sprite_level,`
27			`sprite_id,`
28			`sprite_x,`
29			`sprite_y,`
30			`sprite_color,`
31
32			`reg_c_val,`
33			`reg_b_val,`
34			`reg_a_val,`
35
36			`current_state,`
37			`next_state,`
38			`program_counter,`
39			`registers,`
40			`rflags`
41
42			`);`
43
44
45			`input [31:0] instruction;`
46			`input [15:0] add_result;`
47			`input [15:0] sub_result;`
48			`input [31:0] mult_result;`
49			`input [15:0] divide_quotient;`
50			`input [15:0] divide_remain;`
51			`input add_overflow;`
52			`input sub_overflow;`
53			`input compare_aeb;`
54			`input compare_agb;`
55			`input compare_alb;`
56			`input clock;`
57			`input reset;`
58
59
60			`output const_bool;`
61			`output [2:0] rflags_index;`
62			`output [4:0] reg_a_num;`
63			`output [4:0] reg_b_num;`
64			`output [4:0] reg_c_num;`
65			`output [5:0] opcode;`
66			`output [15:0] imm;`
67
68			`output reg [15:0] reg_a_val;`
69			`output reg [15:0] reg_b_val;`
70			`output reg [15:0] reg_c_val;`
71
72			`output reg [15:0] program_rom_addr;`
73			`output reg [15:0] program_counter;`
74			`output reg [511:0] registers;`
75			`output reg [6:0] rflags;`
76
77			`output reg [5:0] sprite_level;`
78			`output reg [383:0] sprite_id;`
79			`output reg [639:0] sprite_x;`
80			`output reg [639:0] sprite_y;`
81			`output reg [1023:0] sprite_color;`
82
83			`assign opcode = instruction[31:26];`
84			`assign reg_a_num = instruction[25:21];`
85			`assign reg_b_num = instruction[20:16];`
86			`assign reg_c_num = instruction[15:11];`
87			`assign imm = instruction[15:0];`
88			`assign const_bool = instruction[17];`
89			`assign rflags_index = instruction[20:18];`
90
91
92			`// INSTRUCTIONS OPERATION CODE`
93			`// Data Transfer Instructions`
94			`parameter opcode_lw = 6'b001001;`
95			`parameter opcode_sw = 6'b001010;`
96			`parameter opcode_limm = 6'b001100;`
97			`// Arithmetic Instructions`
98			`parameter opcode_add = 6'b010001;`
99			`parameter opcode_sub = 6'b010010;`
100			`parameter opcode_mul = 6'b010100;`
101			`parameter opcode_div = 6'b010101;`
102			`// Logical Instructions`
103			`parameter opcode_and = 6'b100001;`
104			`parameter opcode_or = 6'b100010;`
105			`parameter opcode_cmp = 6'b100100;`
106			`parameter opcode_not = 6'b100101;`
107			`// Control Transfer Instructions`
108			`parameter opcode_jr = 6'b101001;`
109			`parameter opcode_brfl = 6'b101010;`
110			`parameter opcode_call = 6'b101100;`
111			`parameter opcode_ret = 6'b101101;`
112			`parameter opcode_nop = 6'b101110;`
113			`parameter opcode_jmp = 6'b101111;`
114			`// Graphical instructions`
115			`parameter opcode_sprite_id = 6'b111001;`
116			`parameter opcode_sprite_color = 6'b111010;`
117			`parameter opcode_sprite_pos = 6'b111100;`
118			`parameter opcode_wait_vsync = 6'b111111;`
119
120
121
122			`/########################################################################/`
123			`/######################## FINITE STATE MACHINE ########################/`
124			`/######################## PROCESSOR CONTROLLER ########################/`
125			`/########################################################################/`
126
127			`output reg [5:0] current_state;`
128			`output reg [5:0] next_state;`
129
130			`// States`
131			`parameter Reset = 6'b000000; // Reset = 0`
132			`parameter Wait_Program_Mem_1 = 6'b000001; // Wait_Program_Mem_1 = 1`
133			`parameter Decode_Instruction = 6'b000010; // Decode_Instruction = 2`
134			`parameter Wait_Operation = 6'b000011; // Wait_Operation = 3`
135			`parameter Wait_DIV_1 = 6'b000100; // Wait_DIV_1 = 4`
136			`parameter Wait_DIV_2 = 6'b000101; // Wait_DIV_2 = 5`
137			`parameter Wait_DIV_3 = 6'b000110; // Wait_DIV_3 = 6`
138			`parameter Wait_DIV_4 = 6'b000111; // Wait_DIV_4 = 7`
139			`parameter ADD = 6'b001000; // ADD = 8`
140			`parameter SUB = 6'b001001; // SUB = 9`
141			`parameter MUL = 6'b001010; // MUL = 10`
142			`parameter DIV = 6'b001011; // DIV = 11`
143			`parameter AND = 6'b001100; // AND = 12`
144			`parameter OR = 6'b001101; // OR = 13`
145			`parameter CMP = 6'b001110; // CMP = 14`
146			`parameter NOT = 6'b001111; // NOT = 15`
147			`parameter SPRITE_ID = 6'b010000; // SPRITE_ID = 16`
148			`parameter SPRITE_COLOR = 6'b010001; // SPRITE_COLOR = 17`
149			`parameter SPRITE_POS = 6'b010010; // SPRITE_POS = 18`
150			`parameter JMP = 6'b010011; // JMP = 19`
151			`parameter LIMM = 6'b010100; // LIMM = 20`
152			`parameter Inc_Program_Counter = 6'b100010; // Inc_Program_Counter = 34`
153
154
155
156			`// Next State Decoder`
157			`always @ (*)`
158			`begin`
159			`case (current_state)`
160
161			`// State 0`
162			`Reset:`
163			`begin`
164			`next_state = Wait_Program_Mem_1;`
165			`end`
166
167			`// State 1`
168			`Wait_Program_Mem_1:`
169			`begin`
170			`next_state = Decode_Instruction;`
171			`end`
172
173			`// State 2`
174			`Decode_Instruction:`
175			`begin`
176			`next_state = Wait_Operation;`
177			`end`
178
179			`// State 3`
180			`Wait_Operation:`
181			`begin`
182
183			`case (opcode)`
184
185			`opcode_limm:`
186			`begin`
187			`next_state = LIMM;`
188			`end`
189
190			`opcode_add:`
191			`begin`
192			`next_state = ADD;`
193			`end`
194
195			`opcode_sub:`
196			`begin`
197			`next_state = SUB;`
198			`end`
199
200			`opcode_mul:`
201			`begin`
202			`next_state = MUL;`
203			`end`
204
205			`opcode_div:`
206			`begin`
207			`next_state = Wait_DIV_1;`
208			`end`
209
210			`opcode_and:`
211			`begin`
212			`next_state = AND;`
213			`end`
214
215			`opcode_or:`
216			`begin`
217			`next_state = OR;`
218			`end`
219
220			`opcode_cmp:`
221			`begin`
222			`next_state = CMP;`
223			`end`
224
225			`opcode_not:`
226			`begin`
227			`next_state = NOT;`
228			`end`
229
230			`opcode_sprite_id:`
231			`begin`
232			`next_state = SPRITE_ID;`
233			`end`
234
235			`opcode_sprite_color:`
236			`begin`
237			`next_state = SPRITE_COLOR;`
238			`end`
239
240			`opcode_sprite_pos:`
241			`begin`
242			`next_state = SPRITE_POS;`
243			`end`
244
245			`opcode_jmp:`
246			`begin`
247			`next_state = JMP;`
248			`end`
249
250			`default:`
251			`begin`
252			`next_state = Reset;`
253			`end`
254
255			`endcase`
256
257
258			`end`
259
260			`// State 4`
261			`Wait_DIV_1:`
262			`begin`
263			`next_state = Wait_DIV_2;`
264			`end`
265
266			`// State 5`
267			`Wait_DIV_2:`
268			`begin`
269			`next_state = Wait_DIV_3;`
270			`end`
271
272			`// State 6`
273			`Wait_DIV_3:`
274			`begin`
275			`next_state = Wait_DIV_4;`
276			`end`
277
278			`// State 7`
279			`Wait_DIV_4:`
280			`begin`
281			`next_state = DIV;`
282			`end`
283
284			`// State 8`
285			`ADD:`
286			`begin`
287			`next_state = Inc_Program_Counter;`
288			`end`
289
290			`// State 9`
291			`SUB:`
292			`begin`
293			`next_state = Inc_Program_Counter;`
294			`end`
295
296			`// State 10`
297			`MUL:`
298			`begin`
299			`next_state = Inc_Program_Counter;`
300			`end`
301
302			`// State 11`
303			`DIV:`
304			`begin`
305			`next_state = Inc_Program_Counter;`
306			`end`
307
308			`// State 12`
309			`AND:`
310			`begin`
311			`next_state = Inc_Program_Counter;`
312			`end`
313
314			`// State 13`
315			`OR:`
316			`begin`
317			`next_state = Inc_Program_Counter;`
318			`end`
319
320			`// State 14`
321			`CMP:`
322			`begin`
323			`next_state = Inc_Program_Counter;`
324			`end`
325
326			`// State 15`
327			`NOT:`
328			`begin`
329			`next_state = Inc_Program_Counter;`
330			`end`
331
332			`// State 16`
333			`SPRITE_ID:`
334			`begin`
335			`next_state = Inc_Program_Counter;`
336			`end`
337
338			`// State 17`
339			`SPRITE_COLOR:`
340			`begin`
341			`next_state = Inc_Program_Counter;`
342			`end`
343
344			`// State 18`
345			`SPRITE_POS:`
346			`begin`
347			`next_state = Inc_Program_Counter;`
348			`end`
349
350			`// State 19`
351			`JMP:`
352			`begin`
353			`next_state = Wait_Program_Mem_1;`
354			`end`
355
356			`// State 20`
357			`LIMM:`
358			`begin`
359			`next_state = Inc_Program_Counter;`
360			`end`
361
362			`// State 34`
363			`Inc_Program_Counter:`
364			`begin`
365			`next_state = Wait_Program_Mem_1;`
366			`end`
367
368			`default:`
369			`begin`
370			`next_state = Reset;`
371			`end`
372
373			`endcase`
374
375			`end`
376
377
378			`// Output Decoder`
379			`always @ (*)`
380			`begin`
381
382			`// Default Assignments`
383			`reg_a_val = registers[16*reg_a_num +: 16];`
384			`reg_b_val = registers[16*reg_b_num +: 16];`
385			`reg_c_val = registers[16*reg_c_num +: 16];`
386			`sprite_level = registers[16*reg_a_num +: 6];`
387			`program_rom_addr = program_counter;`
388
389			`case (current_state)`
390
391			`// State 0`
392			`Reset:`
393			`begin`
394
395			`end`
396
397			`// State 1`
398			`Wait_Program_Mem_1:`
399			`begin`
400
401			`end`
402
403			`// State 2`
404			`Decode_Instruction:`
405			`begin`
406
407			`end`
408
409			`// State 3`
410			`Wait_Operation:`
411			`begin`
412
413			`end`
414
415			`// State 4`
416			`Wait_DIV_1:`
417			`begin`
418
419			`end`
420
421			`// State 5`
422			`Wait_DIV_2:`
423			`begin`
424
425			`end`
426
427			`// State 6`
428			`Wait_DIV_3:`
429			`begin`
430
431			`end`
432
433			`// State 7`
434			`Wait_DIV_4:`
435			`begin`
436
437			`end`
438
439			`// State 8`
440			`ADD:`
441			`begin`
442
443			`end`
444
445			`// State 9`
446			`SUB:`
447			`begin`
448
449			`end`
450
451			`// State 10`
452			`MUL:`
453			`begin`
454
455			`end`
456
457			`// State 11`
458			`DIV:`
459			`begin`
460
461			`end`
462
463			`// State 12`
464			`AND:`
465			`begin`
466
467			`end`
468
469			`// State 13`
470			`OR:`
471			`begin`
472
473			`end`
474
475			`// State 14`
476			`CMP:`
477			`begin`
478
479			`end`
480
481			`// State 15`
482			`NOT:`
483			`begin`
484
485			`end`
486
487			`// State 16`
488			`SPRITE_ID:`
489			`begin`
490
491			`end`
492
493			`// State 17`
494			`SPRITE_COLOR:`
495			`begin`
496
497			`end`
498
499			`// State 18`
500			`SPRITE_POS:`
501			`begin`
502
503			`end`
504
505			`// State 19`
506			`JMP:`
507			`begin`
508
509			`end`
510
511			`// State 20`
512			`LIMM:`
513			`begin`
514
515			`end`
516
517			`// State 34`
518			`Inc_Program_Counter:`
519			`begin`
520
521			`end`
522
523
524			`default:`
525			`begin`
526
527			`end`
528
529			`endcase`
530			`end`
531
532
533			`// State Register and Reset Logic`
534			`always @ (posedge clock)`
535			`begin`
536
537			`if (reset)`
538			`begin`
539			`current_state <= Reset;`
540
541			`program_counter <= 0;`
542			`end`
543
544			`else`
545			`begin`
546			`current_state <= next_state;`
547
548
549			`// State: ADD`
550			`if (next_state == ADD)`
551			`registers[16*reg_a_num +: 16] <= add_result;`
552
553
554			`// State: SUB`
555			`if (next_state == SUB)`
556			`registers[16*reg_a_num +: 16] <= sub_result;`
557
558
559			`// State: MUL`
560			`if (next_state == MUL)`
561			`registers[16*reg_a_num +: 16] <= mult_result[15:0];`
562
563
564			`// State: DIV`
565			`if (next_state == DIV)`
566			`registers[16*reg_a_num +: 16] <= divide_quotient;`
567
568
569			`// State: AND`
570			`if (next_state == AND)`
571			`registers[16*reg_a_num +: 16] <= reg_a_val & reg_b_val;`
572
573
574			`// State: OR`
575			`if (next_state == OR)`
576			`registers[16*reg_a_num +: 16] <= reg_a_val \| reg_b_val;`
577
578
579			`// State: CMP`
580			`if (next_state == CMP)`
581			`begin`
582			`rflags[3] <= compare_alb; //RFlags[below]`
583			`rflags[4] <= compare_aeb; //RFlags[equal]`
584			`rflags[5] <= compare_agb; //RFlags[above]`
585			`end`
586
587
588			`// State: NOT`
589			`if (next_state == NOT)`
590			`registers[16*reg_a_num +: 16] <= ~ reg_a_val;`
591
592
593			`// State: SPRITE_ID`
594			`if (next_state == SPRITE_ID)`
595			`sprite_id[6*sprite_level +: 6] <= reg_b_val[5:0];`
596
597
598			`// State: SPRITE_COLOR`
599			`if (next_state == SPRITE_COLOR)`
600			`sprite_color[16*sprite_level +: 16] <= reg_b_val;`
601
602
603			`// State: SPRITE_POS`
604			`if (next_state == SPRITE_POS)`
605			`begin`
606			`sprite_x[10*sprite_level +: 10] <= reg_c_val[9:0];`
607			`sprite_y[10*sprite_level +: 10] <= reg_b_val[9:0];`
608			`end`
609
610
611			`// State: JMP`
612			`if (next_state == JMP)`
613			`program_counter <= imm;`
614
615
616			`// State: LIMM`
617			`if (next_state == LIMM)`
618			`registers[16*reg_a_num +: 16] <= imm;`
619
620
621			`// State: Inc_Program_Counter`
622			`if (next_state == Inc_Program_Counter)`
623			`program_counter <= program_counter + 1'b1;`
624
625
626			`end`
627
628			`end`
629
630			`/########################################################################/`
631			`/########################################################################/`
632
633
634
635
636
637
638			`endmodule`