Subversion Repositories 2d_game_console

--lpm_compare CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_PIPELINE=1 LPM_REPRESENTATION="SIGNED" LPM_WIDTH=16 aeb agb alb clock dataa datab CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48

--VERSION_BEGIN 17.0 cbx_cycloneii 2017:04:25:18:06:29:SJ cbx_lpm_add_sub 2017:04:25:18:06:29:SJ cbx_lpm_compare 2017:04:25:18:06:29:SJ cbx_mgl 2017:04:25:18:09:28:SJ cbx_nadder 2017:04:25:18:06:30:SJ cbx_stratix 2017:04:25:18:06:30:SJ cbx_stratixii 2017:04:25:18:06:30:SJ  VERSION_END

-- Copyright (C) 2017  Intel Corporation. All rights reserved.

--  Your use of Intel Corporation's design tools, logic functions

--  and other software and tools, and its AMPP partner logic

--  functions, and any output files from any of the foregoing

--  (including device programming or simulation files), and any

--  associated documentation or information are expressly subject

--  to the terms and conditions of the Intel Program License

--  Subscription Agreement, the Intel Quartus Prime License Agreement,

--  the Intel MegaCore Function License Agreement, or other

--  applicable license agreement, including, without limitation,

--  that your use is for the sole purpose of programming logic

--  devices manufactured by Intel and sold by Intel or its

--  authorized distributors.  Please refer to the applicable

--  agreement for further details.

--synthesis_resources = lut 60

SUBDESIGN cmpr_s2j

(

        aeb     :       output;

        agb     :       output;

        alb     :       output;

        clock   :       input;

        dataa[15..0]    :       input;

        datab[15..0]    :       input;

)

VARIABLE

        aeb_int :       WIRE;

        alb_int :       WIRE;

        aeb_dffe[0..0]  :       DFFE;

        agb_dffe[0..0]  :       DFFE;

        alb_dffe[0..0]  :       DFFE;

        dataa_int[15..0]        :       WIRE;

        datab_int[15..0]        :       WIRE;

BEGIN

        dataa_int[] = ( !dataa[15] , dataa[14..0]);

        datab_int[] = ( !datab[15] , datab[14..0]);

        IF (dataa_int[] == datab_int[]) THEN

                aeb_int = VCC;

        ELSE

                aeb_int = GND;

        END IF;

        IF (dataa_int[] < datab_int[]) THEN

                alb_int = VCC;

        ELSE

                alb_int = GND;

        END IF;

        aeb_dffe[0].d = aeb_int;

        aeb = aeb_dffe[0].q;

        alb_dffe[0].d = alb_int;

        alb = alb_dffe[0].q;

        agb_dffe[0].d = !alb_int & !aeb_int;

        agb = agb_dffe[0].q;

        aeb_dffe[].clk = clock;

        alb_dffe[].clk = clock;

        agb_dffe[].clk = clock;

END;

--VALID FILE