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[/] [2d_game_console/] [trunk/] [Processor_Quartus/] [db/] [mult_f6p.tdf] - Blame information for rev 2

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1 2 lucas.vbal
--lpm_mult CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" DSP_BLOCK_BALANCING="Auto" LPM_PIPELINE=1 LPM_REPRESENTATION="SIGNED" LPM_WIDTHA=16 LPM_WIDTHB=16 LPM_WIDTHP=16 MAXIMIZE_SPEED=5 clock dataa datab result CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
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--VERSION_BEGIN 17.0 cbx_cycloneii 2017:04:25:18:06:29:SJ cbx_lpm_add_sub 2017:04:25:18:06:29:SJ cbx_lpm_mult 2017:04:25:18:06:29:SJ cbx_mgl 2017:04:25:18:09:28:SJ cbx_nadder 2017:04:25:18:06:30:SJ cbx_padd 2017:04:25:18:06:30:SJ cbx_stratix 2017:04:25:18:06:30:SJ cbx_stratixii 2017:04:25:18:06:30:SJ cbx_util_mgl 2017:04:25:18:06:30:SJ  VERSION_END
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-- Copyright (C) 2017  Intel Corporation. All rights reserved.
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--  Your use of Intel Corporation's design tools, logic functions
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--  and other software and tools, and its AMPP partner logic
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--  functions, and any output files from any of the foregoing
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--  (including device programming or simulation files), and any
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--  associated documentation or information are expressly subject
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--  to the terms and conditions of the Intel Program License
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--  Subscription Agreement, the Intel Quartus Prime License Agreement,
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--  the Intel MegaCore Function License Agreement, or other
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--  applicable license agreement, including, without limitation,
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--  that your use is for the sole purpose of programming logic
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--  devices manufactured by Intel and sold by Intel or its
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--  authorized distributors.  Please refer to the applicable
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--  agreement for further details.
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FUNCTION cycloneive_mac_mult (aclr, clk, dataa[dataa_width-1..0], datab[datab_width-1..0], ena, signa, signb)
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WITH ( dataa_clock, dataa_width, datab_clock, datab_width, signa_clock, signb_clock)
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RETURNS ( dataout[dataa_width+datab_width-1..0]);
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FUNCTION cycloneive_mac_out (aclr, clk, dataa[dataa_width-1..0], ena)
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WITH ( dataa_width = 0, output_clock)
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RETURNS ( dataout[dataa_width-1..0]);
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--synthesis_resources = dsp_9bit 2
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SUBDESIGN mult_f6p
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(
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        clock   :       input;
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        dataa[15..0]    :       input;
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        datab[15..0]    :       input;
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        result[15..0]   :       output;
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)
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VARIABLE
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        mac_mult1 : cycloneive_mac_mult
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                WITH (
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                        dataa_clock = "none",
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                        dataa_width = 16,
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                        datab_clock = "none",
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                        datab_width = 16,
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                        signa_clock = "none",
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                        signb_clock = "none"
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                );
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        mac_out2 : cycloneive_mac_out
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                WITH (
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                        dataa_width = 32,
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                        output_clock = "0"
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                );
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        aclr    : NODE;
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        clken   : NODE;
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BEGIN
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        mac_mult1.dataa[] = ( dataa[]);
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        mac_mult1.datab[] = ( datab[]);
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        mac_mult1.signa = B"1";
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        mac_mult1.signb = B"1";
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        mac_out2.aclr = aclr;
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        mac_out2.clk = clock;
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        mac_out2.dataa[] = mac_mult1.dataout[];
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        mac_out2.ena = clken;
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        aclr = GND;
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        clken = VCC;
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        result[15..0] = mac_out2.dataout[31..16];
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END;
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--VALID FILE

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