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lucas.vbal |
--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_SIZE=8 LPM_WIDTH=16 LPM_WIDTHS=3 data result sel
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--VERSION_BEGIN 17.0 cbx_lpm_mux 2017:04:25:18:06:30:SJ cbx_mgl 2017:04:25:18:09:28:SJ VERSION_END
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-- Copyright (C) 2017 Intel Corporation. All rights reserved.
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-- Your use of Intel Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Intel Program License
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-- Subscription Agreement, the Intel Quartus Prime License Agreement,
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-- the Intel MegaCore Function License Agreement, or other
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-- applicable license agreement, including, without limitation,
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-- that your use is for the sole purpose of programming logic
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-- devices manufactured by Intel and sold by Intel or its
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-- authorized distributors. Please refer to the applicable
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-- agreement for further details.
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--synthesis_resources = lut 80
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SUBDESIGN mux_qob
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(
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data[127..0] : input;
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result[15..0] : output;
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sel[2..0] : input;
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)
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VARIABLE
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result_node[15..0] : WIRE;
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sel_ffs_wire[2..0] : WIRE;
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sel_node[2..0] : WIRE;
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w_data1012w[3..0] : WIRE;
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w_data1013w[3..0] : WIRE;
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w_data1059w[7..0] : WIRE;
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w_data1081w[3..0] : WIRE;
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w_data1082w[3..0] : WIRE;
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w_data1128w[7..0] : WIRE;
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w_data1150w[3..0] : WIRE;
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w_data1151w[3..0] : WIRE;
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w_data1197w[7..0] : WIRE;
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w_data1219w[3..0] : WIRE;
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w_data1220w[3..0] : WIRE;
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w_data1266w[7..0] : WIRE;
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w_data1288w[3..0] : WIRE;
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w_data1289w[3..0] : WIRE;
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w_data1335w[7..0] : WIRE;
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w_data1357w[3..0] : WIRE;
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w_data1358w[3..0] : WIRE;
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w_data1404w[7..0] : WIRE;
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w_data1426w[3..0] : WIRE;
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w_data1427w[3..0] : WIRE;
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w_data1473w[7..0] : WIRE;
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w_data1495w[3..0] : WIRE;
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w_data1496w[3..0] : WIRE;
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w_data1542w[7..0] : WIRE;
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w_data1564w[3..0] : WIRE;
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w_data1565w[3..0] : WIRE;
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w_data1611w[7..0] : WIRE;
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w_data1633w[3..0] : WIRE;
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w_data1634w[3..0] : WIRE;
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w_data1680w[7..0] : WIRE;
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w_data1702w[3..0] : WIRE;
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w_data1703w[3..0] : WIRE;
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w_data1749w[7..0] : WIRE;
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w_data1771w[3..0] : WIRE;
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w_data1772w[3..0] : WIRE;
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w_data1818w[7..0] : WIRE;
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w_data1840w[3..0] : WIRE;
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w_data1841w[3..0] : WIRE;
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w_data1887w[7..0] : WIRE;
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w_data1909w[3..0] : WIRE;
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w_data1910w[3..0] : WIRE;
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w_data1956w[7..0] : WIRE;
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w_data1978w[3..0] : WIRE;
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w_data1979w[3..0] : WIRE;
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w_data919w[7..0] : WIRE;
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w_data941w[3..0] : WIRE;
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w_data942w[3..0] : WIRE;
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w_data990w[7..0] : WIRE;
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w_sel1014w[1..0] : WIRE;
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w_sel1083w[1..0] : WIRE;
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w_sel1152w[1..0] : WIRE;
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w_sel1221w[1..0] : WIRE;
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w_sel1290w[1..0] : WIRE;
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w_sel1359w[1..0] : WIRE;
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w_sel1428w[1..0] : WIRE;
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w_sel1497w[1..0] : WIRE;
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w_sel1566w[1..0] : WIRE;
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w_sel1635w[1..0] : WIRE;
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w_sel1704w[1..0] : WIRE;
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w_sel1773w[1..0] : WIRE;
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w_sel1842w[1..0] : WIRE;
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w_sel1911w[1..0] : WIRE;
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w_sel1980w[1..0] : WIRE;
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w_sel943w[1..0] : WIRE;
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BEGIN
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result[] = result_node[];
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result_node[] = ( ((sel_node[2..2] & (((w_data1979w[1..1] & w_sel1980w[0..0]) & (! (((w_data1979w[0..0] & (! w_sel1980w[1..1])) & (! w_sel1980w[0..0])) # (w_sel1980w[1..1] & (w_sel1980w[0..0] # w_data1979w[2..2]))))) # ((((w_data1979w[0..0] & (! w_sel1980w[1..1])) & (! w_sel1980w[0..0])) # (w_sel1980w[1..1] & (w_sel1980w[0..0] # w_data1979w[2..2]))) & (w_data1979w[3..3] # (! w_sel1980w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1978w[1..1] & w_sel1980w[0..0]) & (! (((w_data1978w[0..0] & (! w_sel1980w[1..1])) & (! w_sel1980w[0..0])) # (w_sel1980w[1..1] & (w_sel1980w[0..0] # w_data1978w[2..2]))))) # ((((w_data1978w[0..0] & (! w_sel1980w[1..1])) & (! w_sel1980w[0..0])) # (w_sel1980w[1..1] & (w_sel1980w[0..0] # w_data1978w[2..2]))) & (w_data1978w[3..3] # (! w_sel1980w[0..0])))))), ((sel_node[2..2] & (((w_data1910w[1..1] & w_sel1911w[0..0]) & (! (((w_data1910w[0..0] & (! w_sel1911w[1..1])) & (! w_sel1911w[0..0])) # (w_sel1911w[1..1] & (w_sel1911w[0..0] # w_data1910w[2..2]))))) # ((((w_data1910w[0..0] & (! w_sel1911w[1..1])) & (! w_sel1911w[0..0])) # (w_sel1911w[1..1] & (w_sel1911w[0..0] # w_data1910w[2..2]))) & (w_data1910w[3..3] # (! w_sel1911w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1909w[1..1] & w_sel1911w[0..0]) & (! (((w_data1909w[0..0] & (! w_sel1911w[1..1])) & (! w_sel1911w[0..0])) # (w_sel1911w[1..1] & (w_sel1911w[0..0] # w_data1909w[2..2]))))) # ((((w_data1909w[0..0] & (! w_sel1911w[1..1])) & (! w_sel1911w[0..0])) # (w_sel1911w[1..1] & (w_sel1911w[0..0] # w_data1909w[2..2]))) & (w_data1909w[3..3] # (! w_sel1911w[0..0])))))), ((sel_node[2..2] & (((w_data1841w[1..1] & w_sel1842w[0..0]) & (! (((w_data1841w[0..0] & (! w_sel1842w[1..1])) & (! w_sel1842w[0..0])) # (w_sel1842w[1..1] & (w_sel1842w[0..0] # w_data1841w[2..2]))))) # ((((w_data1841w[0..0] & (! w_sel1842w[1..1])) & (! w_sel1842w[0..0])) # (w_sel1842w[1..1] & (w_sel1842w[0..0] # w_data1841w[2..2]))) & (w_data1841w[3..3] # (! w_sel1842w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1840w[1..1] & w_sel1842w[0..0]) & (! (((w_data1840w[0..0] & (! w_sel1842w[1..1])) & (! w_sel1842w[0..0])) # (w_sel1842w[1..1] & (w_sel1842w[0..0] # w_data1840w[2..2]))))) # ((((w_data1840w[0..0] & (! w_sel1842w[1..1])) & (! w_sel1842w[0..0])) # (w_sel1842w[1..1] & (w_sel1842w[0..0] # w_data1840w[2..2]))) & (w_data1840w[3..3] # (! w_sel1842w[0..0])))))), ((sel_node[2..2] & (((w_data1772w[1..1] & w_sel1773w[0..0]) & (! (((w_data1772w[0..0] & (! w_sel1773w[1..1])) & (! w_sel1773w[0..0])) # (w_sel1773w[1..1] & (w_sel1773w[0..0] # w_data1772w[2..2]))))) # ((((w_data1772w[0..0] & (! w_sel1773w[1..1])) & (! w_sel1773w[0..0])) # (w_sel1773w[1..1] & (w_sel1773w[0..0] # w_data1772w[2..2]))) & (w_data1772w[3..3] # (! w_sel1773w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1771w[1..1] & w_sel1773w[0..0]) & (! (((w_data1771w[0..0] & (! w_sel1773w[1..1])) & (! w_sel1773w[0..0])) # (w_sel1773w[1..1] & (w_sel1773w[0..0] # w_data1771w[2..2]))))) # ((((w_data1771w[0..0] & (! w_sel1773w[1..1])) & (! w_sel1773w[0..0])) # (w_sel1773w[1..1] & (w_sel1773w[0..0] # w_data1771w[2..2]))) & (w_data1771w[3..3] # (! w_sel1773w[0..0])))))), ((sel_node[2..2] & (((w_data1703w[1..1] & w_sel1704w[0..0]) & (! (((w_data1703w[0..0] & (! w_sel1704w[1..1])) & (! w_sel1704w[0..0])) # (w_sel1704w[1..1] & (w_sel1704w[0..0] # w_data1703w[2..2]))))) # ((((w_data1703w[0..0] & (! w_sel1704w[1..1])) & (! w_sel1704w[0..0])) # (w_sel1704w[1..1] & (w_sel1704w[0..0] # w_data1703w[2..2]))) & (w_data1703w[3..3] # (! w_sel1704w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1702w[1..1] & w_sel1704w[0..0]) & (! (((w_data1702w[0..0] & (! w_sel1704w[1..1])) & (! w_sel1704w[0..0])) # (w_sel1704w[1..1] & (w_sel1704w[0..0] # w_data1702w[2..2]))))) # ((((w_data1702w[0..0] & (! w_sel1704w[1..1])) & (! w_sel1704w[0..0])) # (w_sel1704w[1..1] & (w_sel1704w[0..0] # w_data1702w[2..2]))) & (w_data1702w[3..3] # (! w_sel1704w[0..0])))))), ((sel_node[2..2] & (((w_data1634w[1..1] & w_sel1635w[0..0]) & (! (((w_data1634w[0..0] & (! w_sel1635w[1..1])) & (! w_sel1635w[0..0])) # (w_sel1635w[1..1] & (w_sel1635w[0..0] # w_data1634w[2..2]))))) # ((((w_data1634w[0..0] & (! w_sel1635w[1..1])) & (! w_sel1635w[0..0])) # (w_sel1635w[1..1] & (w_sel1635w[0..0] # w_data1634w[2..2]))) & (w_data1634w[3..3] # (! w_sel1635w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1633w[1..1] & w_sel1635w[0..0]) & (! (((w_data1633w[0..0] & (! w_sel1635w[1..1])) & (! w_sel1635w[0..0])) # (w_sel1635w[1..1] & (w_sel1635w[0..0] # w_data1633w[2..2]))))) # ((((w_data1633w[0..0] & (! w_sel1635w[1..1])) & (! w_sel1635w[0..0])) # (w_sel1635w[1..1] & (w_sel1635w[0..0] # w_data1633w[2..2]))) & (w_data1633w[3..3] # (! w_sel1635w[0..0])))))), ((sel_node[2..2] & (((w_data1565w[1..1] & w_sel1566w[0..0]) & (! (((w_data1565w[0..0] & (! w_sel1566w[1..1])) & (! w_sel1566w[0..0])) # (w_sel1566w[1..1] & (w_sel1566w[0..0] # w_data1565w[2..2]))))) # ((((w_data1565w[0..0] & (! w_sel1566w[1..1])) & (! w_sel1566w[0..0])) # (w_sel1566w[1..1] & (w_sel1566w[0..0] # w_data1565w[2..2]))) & (w_data1565w[3..3] # (! w_sel1566w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1564w[1..1] & w_sel1566w[0..0]) & (! (((w_data1564w[0..0] & (! w_sel1566w[1..1])) & (! w_sel1566w[0..0])) # (w_sel1566w[1..1] & (w_sel1566w[0..0] # w_data1564w[2..2]))))) # ((((w_data1564w[0..0] & (! w_sel1566w[1..1])) & (! w_sel1566w[0..0])) # (w_sel1566w[1..1] & (w_sel1566w[0..0] # w_data1564w[2..2]))) & (w_data1564w[3..3] # (! w_sel1566w[0..0])))))), ((sel_node[2..2] & (((w_data1496w[1..1] & w_sel1497w[0..0]) & (! (((w_data1496w[0..0] & (! w_sel1497w[1..1])) & (! w_sel1497w[0..0])) # (w_sel1497w[1..1] & (w_sel1497w[0..0] # w_data1496w[2..2]))))) # ((((w_data1496w[0..0] & (! w_sel1497w[1..1])) & (! w_sel1497w[0..0])) # (w_sel1497w[1..1] & (w_sel1497w[0..0] # w_data1496w[2..2]))) & (w_data1496w[3..3] # (! w_sel1497w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1495w[1..1] & w_sel1497w[0..0]) & (! (((w_data1495w[0..0] & (! w_sel1497w[1..1])) & (! w_sel1497w[0..0])) # (w_sel1497w[1..1] & (w_sel1497w[0..0] # w_data1495w[2..2]))))) # ((((w_data1495w[0..0] & (! w_sel1497w[1..1])) & (! w_sel1497w[0..0])) # (w_sel1497w[1..1] & (w_sel1497w[0..0] # w_data1495w[2..2]))) & (w_data1495w[3..3] # (! w_sel1497w[0..0])))))), ((sel_node[2..2] & (((w_data1427w[1..1] & w_sel1428w[0..0]) & (! (((w_data1427w[0..0] & (! w_sel1428w[1..1])) & (! w_sel1428w[0..0])) # (w_sel1428w[1..1] & (w_sel1428w[0..0] # w_data1427w[2..2]))))) # ((((w_data1427w[0..0] & (! w_sel1428w[1..1])) & (! w_sel1428w[0..0])) # (w_sel1428w[1..1] & (w_sel1428w[0..0] # w_data1427w[2..2]))) & (w_data1427w[3..3] # (! w_sel1428w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1426w[1..1] & w_sel1428w[0..0]) & (! (((w_data1426w[0..0] & (! w_sel1428w[1..1])) & (! w_sel1428w[0..0])) # (w_sel1428w[1..1] & (w_sel1428w[0..0] # w_data1426w[2..2]))))) # ((((w_data1426w[0..0] & (! w_sel1428w[1..1])) & (! w_sel1428w[0..0])) # (w_sel1428w[1..1] & (w_sel1428w[0..0] # w_data1426w[2..2]))) & (w_data1426w[3..3] # (! w_sel1428w[0..0])))))), ((sel_node[2..2] & (((w_data1358w[1..1] & w_sel1359w[0..0]) & (! (((w_data1358w[0..0] & (! w_sel1359w[1..1])) & (! w_sel1359w[0..0])) # (w_sel1359w[1..1] & (w_sel1359w[0..0] # w_data1358w[2..2]))))) # ((((w_data1358w[0..0] & (! w_sel1359w[1..1])) & (! w_sel1359w[0..0])) # (w_sel1359w[1..1] & (w_sel1359w[0..0] # w_data1358w[2..2]))) & (w_data1358w[3..3] # (! w_sel1359w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1357w[1..1] & w_sel1359w[0..0]) & (! (((w_data1357w[0..0] & (! w_sel1359w[1..1])) & (! w_sel1359w[0..0])) # (w_sel1359w[1..1] & (w_sel1359w[0..0] # w_data1357w[2..2]))))) # ((((w_data1357w[0..0] & (! w_sel1359w[1..1])) & (! w_sel1359w[0..0])) # (w_sel1359w[1..1] & (w_sel1359w[0..0] # w_data1357w[2..2]))) & (w_data1357w[3..3] # (! w_sel1359w[0..0])))))), ((sel_node[2..2] & (((w_data1289w[1..1] & w_sel1290w[0..0]) & (! (((w_data1289w[0..0] & (! w_sel1290w[1..1])) & (! w_sel1290w[0..0])) # (w_sel1290w[1..1] & (w_sel1290w[0..0] # w_data1289w[2..2]))))) # ((((w_data1289w[0..0] & (! w_sel1290w[1..1])) & (! w_sel1290w[0..0])) # (w_sel1290w[1..1] & (w_sel1290w[0..0] # w_data1289w[2..2]))) & (w_data1289w[3..3] # (! w_sel1290w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1288w[1..1] & w_sel1290w[0..0]) & (! (((w_data1288w[0..0] & (! w_sel1290w[1..1])) & (! w_sel1290w[0..0])) # (w_sel1290w[1..1] & (w_sel1290w[0..0] # w_data1288w[2..2]))))) # ((((w_data1288w[0..0] & (! w_sel1290w[1..1])) & (! w_sel1290w[0..0])) # (w_sel1290w[1..1] & (w_sel1290w[0..0] # w_data1288w[2..2]))) & (w_data1288w[3..3] # (! w_sel1290w[0..0])))))), ((sel_node[2..2] & (((w_data1220w[1..1] & w_sel1221w[0..0]) & (! (((w_data1220w[0..0] & (! w_sel1221w[1..1])) & (! w_sel1221w[0..0])) # (w_sel1221w[1..1] & (w_sel1221w[0..0] # w_data1220w[2..2]))))) # ((((w_data1220w[0..0] & (! w_sel1221w[1..1])) & (! w_sel1221w[0..0])) # (w_sel1221w[1..1] & (w_sel1221w[0..0] # w_data1220w[2..2]))) & (w_data1220w[3..3] # (! w_sel1221w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1219w[1..1] & w_sel1221w[0..0]) & (! (((w_data1219w[0..0] & (! w_sel1221w[1..1])) & (! w_sel1221w[0..0])) # (w_sel1221w[1..1] & (w_sel1221w[0..0] # w_data1219w[2..2]))))) # ((((w_data1219w[0..0] & (! w_sel1221w[1..1])) & (! w_sel1221w[0..0])) # (w_sel1221w[1..1] & (w_sel1221w[0..0] # w_data1219w[2..2]))) & (w_data1219w[3..3] # (! w_sel1221w[0..0])))))), ((sel_node[2..2] & (((w_data1151w[1..1] & w_sel1152w[0..0]) & (! (((w_data1151w[0..0] & (! w_sel1152w[1..1])) & (! w_sel1152w[0..0])) # (w_sel1152w[1..1] & (w_sel1152w[0..0] # w_data1151w[2..2]))))) # ((((w_data1151w[0..0] & (! w_sel1152w[1..1])) & (! w_sel1152w[0..0])) # (w_sel1152w[1..1] & (w_sel1152w[0..0] # w_data1151w[2..2]))) & (w_data1151w[3..3] # (! w_sel1152w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1150w[1..1] & w_sel1152w[0..0]) & (! (((w_data1150w[0..0] & (! w_sel1152w[1..1])) & (! w_sel1152w[0..0])) # (w_sel1152w[1..1] & (w_sel1152w[0..0] # w_data1150w[2..2]))))) # ((((w_data1150w[0..0] & (! w_sel1152w[1..1])) & (! w_sel1152w[0..0])) # (w_sel1152w[1..1] & (w_sel1152w[0..0] # w_data1150w[2..2]))) & (w_data1150w[3..3] # (! w_sel1152w[0..0])))))), ((sel_node[2..2] & (((w_data1082w[1..1] & w_sel1083w[0..0]) & (! (((w_data1082w[0..0] & (! w_sel1083w[1..1])) & (! w_sel1083w[0..0])) # (w_sel1083w[1..1] & (w_sel1083w[0..0] # w_data1082w[2..2]))))) # ((((w_data1082w[0..0] & (! w_sel1083w[1..1])) & (! w_sel1083w[0..0])) # (w_sel1083w[1..1] & (w_sel1083w[0..0] # w_data1082w[2..2]))) & (w_data1082w[3..3] # (! w_sel1083w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1081w[1..1] & w_sel1083w[0..0]) & (! (((w_data1081w[0..0] & (! w_sel1083w[1..1])) & (! w_sel1083w[0..0])) # (w_sel1083w[1..1] & (w_sel1083w[0..0] # w_data1081w[2..2]))))) # ((((w_data1081w[0..0] & (! w_sel1083w[1..1])) & (! w_sel1083w[0..0])) # (w_sel1083w[1..1] & (w_sel1083w[0..0] # w_data1081w[2..2]))) & (w_data1081w[3..3] # (! w_sel1083w[0..0])))))), ((sel_node[2..2] & (((w_data1013w[1..1] & w_sel1014w[0..0]) & (! (((w_data1013w[0..0] & (! w_sel1014w[1..1])) & (! w_sel1014w[0..0])) # (w_sel1014w[1..1] & (w_sel1014w[0..0] # w_data1013w[2..2]))))) # ((((w_data1013w[0..0] & (! w_sel1014w[1..1])) & (! w_sel1014w[0..0])) # (w_sel1014w[1..1] & (w_sel1014w[0..0] # w_data1013w[2..2]))) & (w_data1013w[3..3] # (! w_sel1014w[0..0]))))) # ((! sel_node[2..2]) & (((w_data1012w[1..1] & w_sel1014w[0..0]) & (! (((w_data1012w[0..0] & (! w_sel1014w[1..1])) & (! w_sel1014w[0..0])) # (w_sel1014w[1..1] & (w_sel1014w[0..0] # w_data1012w[2..2]))))) # ((((w_data1012w[0..0] & (! w_sel1014w[1..1])) & (! w_sel1014w[0..0])) # (w_sel1014w[1..1] & (w_sel1014w[0..0] # w_data1012w[2..2]))) & (w_data1012w[3..3] # (! w_sel1014w[0..0])))))), ((sel_node[2..2] & (((w_data942w[1..1] & w_sel943w[0..0]) & (! (((w_data942w[0..0] & (! w_sel943w[1..1])) & (! w_sel943w[0..0])) # (w_sel943w[1..1] & (w_sel943w[0..0] # w_data942w[2..2]))))) # ((((w_data942w[0..0] & (! w_sel943w[1..1])) & (! w_sel943w[0..0])) # (w_sel943w[1..1] & (w_sel943w[0..0] # w_data942w[2..2]))) & (w_data942w[3..3] # (! w_sel943w[0..0]))))) # ((! sel_node[2..2]) & (((w_data941w[1..1] & w_sel943w[0..0]) & (! (((w_data941w[0..0] & (! w_sel943w[1..1])) & (! w_sel943w[0..0])) # (w_sel943w[1..1] & (w_sel943w[0..0] # w_data941w[2..2]))))) # ((((w_data941w[0..0] & (! w_sel943w[1..1])) & (! w_sel943w[0..0])) # (w_sel943w[1..1] & (w_sel943w[0..0] # w_data941w[2..2]))) & (w_data941w[3..3] # (! w_sel943w[0..0])))))));
|
| 101 |
|
|
sel_ffs_wire[] = ( sel[2..0]);
|
| 102 |
|
|
sel_node[] = ( sel_ffs_wire[2..2], sel[1..0]);
|
| 103 |
|
|
w_data1012w[3..0] = w_data990w[3..0];
|
| 104 |
|
|
w_data1013w[3..0] = w_data990w[7..4];
|
| 105 |
|
|
w_data1059w[] = ( data[114..114], data[98..98], data[82..82], data[66..66], data[50..50], data[34..34], data[18..18], data[2..2]);
|
| 106 |
|
|
w_data1081w[3..0] = w_data1059w[3..0];
|
| 107 |
|
|
w_data1082w[3..0] = w_data1059w[7..4];
|
| 108 |
|
|
w_data1128w[] = ( data[115..115], data[99..99], data[83..83], data[67..67], data[51..51], data[35..35], data[19..19], data[3..3]);
|
| 109 |
|
|
w_data1150w[3..0] = w_data1128w[3..0];
|
| 110 |
|
|
w_data1151w[3..0] = w_data1128w[7..4];
|
| 111 |
|
|
w_data1197w[] = ( data[116..116], data[100..100], data[84..84], data[68..68], data[52..52], data[36..36], data[20..20], data[4..4]);
|
| 112 |
|
|
w_data1219w[3..0] = w_data1197w[3..0];
|
| 113 |
|
|
w_data1220w[3..0] = w_data1197w[7..4];
|
| 114 |
|
|
w_data1266w[] = ( data[117..117], data[101..101], data[85..85], data[69..69], data[53..53], data[37..37], data[21..21], data[5..5]);
|
| 115 |
|
|
w_data1288w[3..0] = w_data1266w[3..0];
|
| 116 |
|
|
w_data1289w[3..0] = w_data1266w[7..4];
|
| 117 |
|
|
w_data1335w[] = ( data[118..118], data[102..102], data[86..86], data[70..70], data[54..54], data[38..38], data[22..22], data[6..6]);
|
| 118 |
|
|
w_data1357w[3..0] = w_data1335w[3..0];
|
| 119 |
|
|
w_data1358w[3..0] = w_data1335w[7..4];
|
| 120 |
|
|
w_data1404w[] = ( data[119..119], data[103..103], data[87..87], data[71..71], data[55..55], data[39..39], data[23..23], data[7..7]);
|
| 121 |
|
|
w_data1426w[3..0] = w_data1404w[3..0];
|
| 122 |
|
|
w_data1427w[3..0] = w_data1404w[7..4];
|
| 123 |
|
|
w_data1473w[] = ( data[120..120], data[104..104], data[88..88], data[72..72], data[56..56], data[40..40], data[24..24], data[8..8]);
|
| 124 |
|
|
w_data1495w[3..0] = w_data1473w[3..0];
|
| 125 |
|
|
w_data1496w[3..0] = w_data1473w[7..4];
|
| 126 |
|
|
w_data1542w[] = ( data[121..121], data[105..105], data[89..89], data[73..73], data[57..57], data[41..41], data[25..25], data[9..9]);
|
| 127 |
|
|
w_data1564w[3..0] = w_data1542w[3..0];
|
| 128 |
|
|
w_data1565w[3..0] = w_data1542w[7..4];
|
| 129 |
|
|
w_data1611w[] = ( data[122..122], data[106..106], data[90..90], data[74..74], data[58..58], data[42..42], data[26..26], data[10..10]);
|
| 130 |
|
|
w_data1633w[3..0] = w_data1611w[3..0];
|
| 131 |
|
|
w_data1634w[3..0] = w_data1611w[7..4];
|
| 132 |
|
|
w_data1680w[] = ( data[123..123], data[107..107], data[91..91], data[75..75], data[59..59], data[43..43], data[27..27], data[11..11]);
|
| 133 |
|
|
w_data1702w[3..0] = w_data1680w[3..0];
|
| 134 |
|
|
w_data1703w[3..0] = w_data1680w[7..4];
|
| 135 |
|
|
w_data1749w[] = ( data[124..124], data[108..108], data[92..92], data[76..76], data[60..60], data[44..44], data[28..28], data[12..12]);
|
| 136 |
|
|
w_data1771w[3..0] = w_data1749w[3..0];
|
| 137 |
|
|
w_data1772w[3..0] = w_data1749w[7..4];
|
| 138 |
|
|
w_data1818w[] = ( data[125..125], data[109..109], data[93..93], data[77..77], data[61..61], data[45..45], data[29..29], data[13..13]);
|
| 139 |
|
|
w_data1840w[3..0] = w_data1818w[3..0];
|
| 140 |
|
|
w_data1841w[3..0] = w_data1818w[7..4];
|
| 141 |
|
|
w_data1887w[] = ( data[126..126], data[110..110], data[94..94], data[78..78], data[62..62], data[46..46], data[30..30], data[14..14]);
|
| 142 |
|
|
w_data1909w[3..0] = w_data1887w[3..0];
|
| 143 |
|
|
w_data1910w[3..0] = w_data1887w[7..4];
|
| 144 |
|
|
w_data1956w[] = ( data[127..127], data[111..111], data[95..95], data[79..79], data[63..63], data[47..47], data[31..31], data[15..15]);
|
| 145 |
|
|
w_data1978w[3..0] = w_data1956w[3..0];
|
| 146 |
|
|
w_data1979w[3..0] = w_data1956w[7..4];
|
| 147 |
|
|
w_data919w[] = ( data[112..112], data[96..96], data[80..80], data[64..64], data[48..48], data[32..32], data[16..16], data[0..0]);
|
| 148 |
|
|
w_data941w[3..0] = w_data919w[3..0];
|
| 149 |
|
|
w_data942w[3..0] = w_data919w[7..4];
|
| 150 |
|
|
w_data990w[] = ( data[113..113], data[97..97], data[81..81], data[65..65], data[49..49], data[33..33], data[17..17], data[1..1]);
|
| 151 |
|
|
w_sel1014w[1..0] = sel_node[1..0];
|
| 152 |
|
|
w_sel1083w[1..0] = sel_node[1..0];
|
| 153 |
|
|
w_sel1152w[1..0] = sel_node[1..0];
|
| 154 |
|
|
w_sel1221w[1..0] = sel_node[1..0];
|
| 155 |
|
|
w_sel1290w[1..0] = sel_node[1..0];
|
| 156 |
|
|
w_sel1359w[1..0] = sel_node[1..0];
|
| 157 |
|
|
w_sel1428w[1..0] = sel_node[1..0];
|
| 158 |
|
|
w_sel1497w[1..0] = sel_node[1..0];
|
| 159 |
|
|
w_sel1566w[1..0] = sel_node[1..0];
|
| 160 |
|
|
w_sel1635w[1..0] = sel_node[1..0];
|
| 161 |
|
|
w_sel1704w[1..0] = sel_node[1..0];
|
| 162 |
|
|
w_sel1773w[1..0] = sel_node[1..0];
|
| 163 |
|
|
w_sel1842w[1..0] = sel_node[1..0];
|
| 164 |
|
|
w_sel1911w[1..0] = sel_node[1..0];
|
| 165 |
|
|
w_sel1980w[1..0] = sel_node[1..0];
|
| 166 |
|
|
w_sel943w[1..0] = sel_node[1..0];
|
| 167 |
|
|
END;
|
| 168 |
|
|
--VALID FILE
|
