1 |
2 |
lucas.vbal |
Flow report for Processor
|
2 |
|
|
Mon Jul 16 20:05:08 2018
|
3 |
|
|
Quartus Prime Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
|
4 |
|
|
|
5 |
|
|
|
6 |
|
|
---------------------
|
7 |
|
|
; Table of Contents ;
|
8 |
|
|
---------------------
|
9 |
|
|
1. Legal Notice
|
10 |
|
|
2. Flow Summary
|
11 |
|
|
3. Flow Settings
|
12 |
|
|
4. Flow Non-Default Global Settings
|
13 |
|
|
5. Flow Elapsed Time
|
14 |
|
|
6. Flow OS Summary
|
15 |
|
|
7. Flow Log
|
16 |
|
|
8. Flow Messages
|
17 |
|
|
9. Flow Suppressed Messages
|
18 |
|
|
|
19 |
|
|
|
20 |
|
|
|
21 |
|
|
----------------
|
22 |
|
|
; Legal Notice ;
|
23 |
|
|
----------------
|
24 |
|
|
Copyright (C) 2017 Intel Corporation. All rights reserved.
|
25 |
|
|
Your use of Intel Corporation's design tools, logic functions
|
26 |
|
|
and other software and tools, and its AMPP partner logic
|
27 |
|
|
functions, and any output files from any of the foregoing
|
28 |
|
|
(including device programming or simulation files), and any
|
29 |
|
|
associated documentation or information are expressly subject
|
30 |
|
|
to the terms and conditions of the Intel Program License
|
31 |
|
|
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
32 |
|
|
the Intel MegaCore Function License Agreement, or other
|
33 |
|
|
applicable license agreement, including, without limitation,
|
34 |
|
|
that your use is for the sole purpose of programming logic
|
35 |
|
|
devices manufactured by Intel and sold by Intel or its
|
36 |
|
|
authorized distributors. Please refer to the applicable
|
37 |
|
|
agreement for further details.
|
38 |
|
|
|
39 |
|
|
|
40 |
|
|
|
41 |
|
|
+----------------------------------------------------------------------------------+
|
42 |
|
|
; Flow Summary ;
|
43 |
|
|
+------------------------------------+---------------------------------------------+
|
44 |
|
|
; Flow Status ; Successful - Mon Jul 16 20:05:08 2018 ;
|
45 |
|
|
; Quartus Prime Version ; 17.0.0 Build 595 04/25/2017 SJ Lite Edition ;
|
46 |
|
|
; Revision Name ; Processor ;
|
47 |
|
|
; Top-level Entity Name ; Processor ;
|
48 |
|
|
; Family ; Cyclone IV E ;
|
49 |
|
|
; Device ; EP4CE115F29C7 ;
|
50 |
|
|
; Timing Models ; Final ;
|
51 |
|
|
; Total logic elements ; 25,607 / 114,480 ( 22 % ) ;
|
52 |
|
|
; Total combinational functions ; 25,316 / 114,480 ( 22 % ) ;
|
53 |
|
|
; Dedicated logic registers ; 5,859 / 114,480 ( 5 % ) ;
|
54 |
|
|
; Total registers ; 5859 ;
|
55 |
|
|
; Total pins ; 90 / 529 ( 17 % ) ;
|
56 |
|
|
; Total virtual pins ; 3,973 ;
|
57 |
|
|
; Total memory bits ; 3,145,728 / 3,981,312 ( 79 % ) ;
|
58 |
|
|
; Embedded Multiplier 9-bit elements ; 2 / 532 ( < 1 % ) ;
|
59 |
|
|
; Total PLLs ; 1 / 4 ( 25 % ) ;
|
60 |
|
|
+------------------------------------+---------------------------------------------+
|
61 |
|
|
|
62 |
|
|
|
63 |
|
|
+-----------------------------------------+
|
64 |
|
|
; Flow Settings ;
|
65 |
|
|
+-------------------+---------------------+
|
66 |
|
|
; Option ; Setting ;
|
67 |
|
|
+-------------------+---------------------+
|
68 |
|
|
; Start date & time ; 07/15/2018 21:26:19 ;
|
69 |
|
|
; Main task ; Compilation ;
|
70 |
|
|
; Revision Name ; Processor ;
|
71 |
|
|
+-------------------+---------------------+
|
72 |
|
|
|
73 |
|
|
|
74 |
|
|
+-----------------------------------------------------------------------------------------------------------------------------+
|
75 |
|
|
; Flow Non-Default Global Settings ;
|
76 |
|
|
+-------------------------------------+----------------------------------------+---------------+-------------+----------------+
|
77 |
|
|
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
|
78 |
|
|
+-------------------------------------+----------------------------------------+---------------+-------------+----------------+
|
79 |
|
|
; COMPILER_SIGNATURE_ID ; 38266919196283.153170077805132 ; -- ; -- ; -- ;
|
80 |
|
|
; EDA_OUTPUT_DATA_FORMAT ; Vhdl ; -- ; -- ; eda_simulation ;
|
81 |
|
|
; EDA_SIMULATION_TOOL ; ModelSim-Altera (VHDL) ; ; -- ; -- ;
|
82 |
|
|
; EDA_TIME_SCALE ; 1 ps ; -- ; -- ; eda_simulation ;
|
83 |
|
|
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
|
84 |
|
|
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
|
85 |
|
|
; MISC_FILE ; IP_ROM_Program.bsf ; -- ; -- ; -- ;
|
86 |
|
|
; MISC_FILE ; IP_ROM_Program.cmp ; -- ; -- ; -- ;
|
87 |
|
|
; MISC_FILE ; IP_ADD.bsf ; -- ; -- ; -- ;
|
88 |
|
|
; MISC_FILE ; IP_ADD.cmp ; -- ; -- ; -- ;
|
89 |
|
|
; MISC_FILE ; IP_SUB.cmp ; -- ; -- ; -- ;
|
90 |
|
|
; MISC_FILE ; IP_MULT.cmp ; -- ; -- ; -- ;
|
91 |
|
|
; MISC_FILE ; IP_COMPARE.cmp ; -- ; -- ; -- ;
|
92 |
|
|
; MISC_FILE ; IP_RAM_Data.cmp ; -- ; -- ; -- ;
|
93 |
|
|
; MISC_FILE ; IP_PLL.cmp ; -- ; -- ; -- ;
|
94 |
|
|
; MISC_FILE ; IP_PLL.ppf ; -- ; -- ; -- ;
|
95 |
|
|
; MISC_FILE ; IP_DIVIDE.cmp ; -- ; -- ; -- ;
|
96 |
|
|
; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
|
97 |
|
|
; PARTITION_COLOR ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
|
98 |
|
|
; PARTITION_FITTER_PRESERVATION_LEVEL ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
|
99 |
|
|
; PARTITION_NETLIST_TYPE ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
|
100 |
|
|
; POWER_BOARD_THERMAL_MODEL ; None (CONSERVATIVE) ; -- ; -- ; -- ;
|
101 |
|
|
; POWER_PRESET_COOLING_SOLUTION ; 23 MM HEAT SINK WITH 200 LFPM AIRFLOW ; -- ; -- ; -- ;
|
102 |
|
|
; PROJECT_OUTPUT_DIRECTORY ; output_files ; -- ; -- ; -- ;
|
103 |
|
|
; SMART_RECOMPILE ; On ; Off ; -- ; -- ;
|
104 |
|
|
+-------------------------------------+----------------------------------------+---------------+-------------+----------------+
|
105 |
|
|
|
106 |
|
|
|
107 |
|
|
+-------------------------------------------------------------------------------------------------------------------------------+
|
108 |
|
|
; Flow Elapsed Time ;
|
109 |
|
|
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
110 |
|
|
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
|
111 |
|
|
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
112 |
|
|
; Analysis & Synthesis ; 00:04:57 ; 1.0 ; 1011 MB ; 00:05:10 ;
|
113 |
|
|
; Fitter ; 00:05:40 ; 1.0 ; 1546 MB ; 00:08:41 ;
|
114 |
|
|
; Assembler ; 00:00:09 ; 1.0 ; 642 MB ; 00:00:07 ;
|
115 |
|
|
; TimeQuest Timing Analyzer ; 00:00:51 ; 1.8 ; 1040 MB ; 00:01:28 ;
|
116 |
|
|
; EDA Netlist Writer ; 00:00:31 ; 1.0 ; 753 MB ; 00:00:30 ;
|
117 |
|
|
; MIF/HEX Update ; 00:00:07 ; 1.0 ; 724 MB ; 00:00:06 ;
|
118 |
|
|
; Assembler ; 00:00:08 ; 1.0 ; 642 MB ; 00:00:07 ;
|
119 |
|
|
; EDA Netlist Writer ; 00:00:36 ; 1.0 ; 754 MB ; 00:00:31 ;
|
120 |
|
|
; Total ; 00:12:59 ; -- ; -- ; 00:16:40 ;
|
121 |
|
|
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
122 |
|
|
|
123 |
|
|
|
124 |
|
|
+----------------------------------------------------------------------------------------+
|
125 |
|
|
; Flow OS Summary ;
|
126 |
|
|
+---------------------------+------------------+-----------+------------+----------------+
|
127 |
|
|
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
|
128 |
|
|
+---------------------------+------------------+-----------+------------+----------------+
|
129 |
|
|
; Analysis & Synthesis ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
130 |
|
|
; Fitter ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
131 |
|
|
; Assembler ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
132 |
|
|
; TimeQuest Timing Analyzer ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
133 |
|
|
; EDA Netlist Writer ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
134 |
|
|
; MIF/HEX Update ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
135 |
|
|
; Assembler ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
136 |
|
|
; EDA Netlist Writer ; Lucas-PC ; Windows 7 ; 6.1 ; x86_64 ;
|
137 |
|
|
+---------------------------+------------------+-----------+------------+----------------+
|
138 |
|
|
|
139 |
|
|
|
140 |
|
|
------------
|
141 |
|
|
; Flow Log ;
|
142 |
|
|
------------
|
143 |
|
|
quartus_map --read_settings_files=on --write_settings_files=off Project_Processor -c Processor
|
144 |
|
|
quartus_fit --read_settings_files=off --write_settings_files=off Project_Processor -c Processor
|
145 |
|
|
quartus_asm --read_settings_files=off --write_settings_files=off Project_Processor -c Processor
|
146 |
|
|
quartus_sta Project_Processor -c Processor
|
147 |
|
|
quartus_eda --read_settings_files=off --write_settings_files=off Project_Processor -c Processor
|
148 |
|
|
quartus_cdb Project_Processor -c Processor --update_mif
|
149 |
|
|
quartus_asm --read_settings_files=on --write_settings_files=off Project_Processor -c Processor
|
150 |
|
|
quartus_eda --read_settings_files=off --write_settings_files=off Project_Processor -c Processor
|
151 |
|
|
|
152 |
|
|
|
153 |
|
|
|