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zuofu |
inst sysReset init=S; # initialize internal reset
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# Flash RAM chip-enable
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# vga port connection
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# SDRAM pin connections
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# address bus
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# data bus
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#
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#PACE: Start of Constraints generated by PACE
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#PACE: Start of PACE I/O Pin Assignments
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NET "pin_ba<0>" LOC = "p134" ;
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NET "pin_ba<1>" LOC = "p137" ;
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NET "pin_blue<0>" LOC = "p21" ;
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NET "pin_blue<1>" LOC = "p22" ;
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NET "pin_cas_n" LOC = "p126" ;
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NET "pin_ce_n" LOC = "p41" ;
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NET "pin_cke" LOC = "p131" ;
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NET "pin_clkin" LOC = "p88" ;
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NET "pin_cs_n" LOC = "p132" ;
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NET "pin_dqmh" LOC = "p124" ;
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NET "pin_dqml" LOC = "p122" ;
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NET "pin_green<0>" LOC = "p19" ;
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NET "pin_green<1>" LOC = "p20" ;
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NET "pin_hsync_n" LOC = "p23" ;
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NET "pin_pushbtn" LOC = "p93" ;
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NET "pin_ras_n" LOC = "p130" ;
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NET "pin_red<0>" LOC = "p12" ;
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NET "pin_red<1>" LOC = "p13" ;
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NET "pin_sAddr<0>" LOC = "p141" ;
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NET "pin_sAddr<10>" LOC = "p139" ;
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NET "pin_sAddr<11>" LOC = "p136" ;
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NET "pin_sAddr<1>" LOC = "p4" ;
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NET "pin_sAddr<2>" LOC = "p6" ;
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NET "pin_sAddr<3>" LOC = "p10" ;
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NET "pin_sAddr<4>" LOC = "p11" ;
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NET "pin_sAddr<5>" LOC = "p7" ;
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NET "pin_sAddr<6>" LOC = "p5" ;
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NET "pin_sAddr<7>" LOC = "p3" ;
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NET "pin_sAddr<8>" LOC = "p140" ;
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NET "pin_sAddr<9>" LOC = "p138" ;
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NET "pin_sclk" LOC = "p129" ;
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NET "pin_sclkfb" LOC = "p91" ;
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NET "pin_sData<0>" LOC = "p95" ;
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NET "pin_sData<10>" LOC = "p116" ;
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NET "pin_sData<11>" LOC = "p114" ;
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NET "pin_sData<12>" LOC = "p112" ;
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NET "pin_sData<13>" LOC = "p102" ;
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NET "pin_sData<14>" LOC = "p100" ;
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NET "pin_sData<15>" LOC = "p96" ;
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NET "pin_sData<1>" LOC = "p99" ;
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NET "pin_sData<2>" LOC = "p101" ;
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NET "pin_sData<3>" LOC = "p103" ;
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NET "pin_sData<4>" LOC = "p113" ;
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NET "pin_sData<5>" LOC = "p115" ;
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NET "pin_sData<6>" LOC = "p117" ;
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NET "pin_sData<7>" LOC = "p120" ;
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NET "pin_sData<8>" LOC = "p121" ;
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NET "pin_sData<9>" LOC = "p118" ;
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NET "pin_vsync_n" LOC = "p26" ;
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NET "pin_we_n" LOC = "p123" ;
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#PACE: Start of PACE Area Constraints
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#PACE: Start of PACE Prohibit Constraints
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#PACE: End of Constraints generated by PACE
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