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Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [fontrom_generate.log] - Blame information for rev 8

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Starting process: Module
 
Starting process:
 
SCUBA, Version Diamond_2.2_Production (99)
Wed Jan  1 20:10:25 2014
 
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems   All rights reserved.
Copyright (c) 2002-2013 Lattice Semiconductor Corporation,  All rights reserved.
 
BEGIN SCUBA Module Synthesis
 
    Issued command   : /usr/local/diamond/2.2_x64/ispfpga/bin/lin64/scuba -w -n fontrom -lang verilog -synth synplify -bus_exp 7 -bb -arch xo2c00 -type romblk -device LCMXO2-7000HE -addr_width 12 -data_width 8 -num_words 4096 -cascade -1 -memfile font256x16l.mem -memformat orca -e
    Circuit name     : fontrom
    Module type      : EBR_ROM
    Module Version   : 5.1
    Ports            :
        Inputs       : Address[11:0], OutClock, OutClockEn, Reset
        Outputs      : Q[7:0]
    I/O buffer       : not inserted
    Memory file      : font256x16l.mem
    EDIF output      : suppressed
    Verilog output   : fontrom.v
    Verilog template : fontrom_tmpl.v
    Verilog testbench: tb_fontrom_tmpl.v
    Verilog purpose  : for synthesis and simulation
    Bus notation     : big endian
    Report output    : fontrom.srp
    Estimated Resource Usage:
            EBR : 4
 
END   SCUBA Module Synthesis
 
File: fontrom.lpc created.
 
 
End process: completed successfully.
 
 
Total Warnings:  0
 
Total Errors:  0
 
 

Line No.	Rev	Author	Line
1	8	ale500	`Starting process: Module`
2
3			`Starting process:`
4
5			`SCUBA, Version Diamond_2.2_Production (99)`
6			`Wed Jan 1 20:10:25 2014`
7
8			`Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.`
9			`Copyright (c) 1995 AT&T Corp. All rights reserved.`
10			`Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.`
11			`Copyright (c) 2001 Agere Systems All rights reserved.`
12			`Copyright (c) 2002-2013 Lattice Semiconductor Corporation, All rights reserved.`
13
14			`BEGIN SCUBA Module Synthesis`
15
16			`Issued command : /usr/local/diamond/2.2_x64/ispfpga/bin/lin64/scuba -w -n fontrom -lang verilog -synth synplify -bus_exp 7 -bb -arch xo2c00 -type romblk -device LCMXO2-7000HE -addr_width 12 -data_width 8 -num_words 4096 -cascade -1 -memfile font256x16l.mem -memformat orca -e`
17			`Circuit name : fontrom`
18			`Module type : EBR_ROM`
19			`Module Version : 5.1`
20			`Ports :`
21			`Inputs : Address[11:0], OutClock, OutClockEn, Reset`
22			`Outputs : Q[7:0]`
23			`I/O buffer : not inserted`
24			`Memory file : font256x16l.mem`
25			`EDIF output : suppressed`
26			`Verilog output : fontrom.v`
27			`Verilog template : fontrom_tmpl.v`
28			`Verilog testbench: tb_fontrom_tmpl.v`
29			`Verilog purpose : for synthesis and simulation`
30			`Bus notation : big endian`
31			`Report output : fontrom.srp`
32			`Estimated Resource Usage:`
33			`EBR : 4`
34
35			`END SCUBA Module Synthesis`
36
37			`File: fontrom.lpc created.`
38
39
40			`End process: completed successfully.`
41
42
43			`Total Warnings: 0`
44
45			`Total Errors: 0`
46
47

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Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [fontrom_generate.log] - Blame information for rev 8