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https://opencores.org/ocsvn/8051/8051/trunk
[/] [8051/] [tags/] [rel_12/] [.nclaunch.dd] - Blame information for rev 182
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simont |
# DO NOT EDIT -- automatically generated design data file -- DO NOT EDIT!!!
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list \
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workdir {/root/verilog/oc8051} \
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cdslib {/root/verilog/oc8051/cds.lib} \
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worklib {oc8051} \
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ToolOption_NCVhdl {-logfile ncvhdl.log -errormax 15 -update -messages -status} \
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ToolOption_NCVlog { -work oc8051 -cdslib /root/verilog/oc8051/cds.lib -logfile ncvlog.log -errormax 15 -update -messages -status} \
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ToolOption_NCVlog/AMS { -work oc8051 -cdslib /root/verilog/oc8051/cds.lib -logfile ncvlog.log -errormax 15 -update -messages -status} \
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ToolOption_NCElab {-logfile ncelab.log -errormax 15 -messages -status -v93} \
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ToolOption_NCSim {-gui -logfile ncsim.log -errormax 15 -messages -status} \
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ToolOption_NCSdfc {-logfile ncsdfc.log -compile -messages -status} \
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ToolOption_Update {-errormax 15} \
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ToolOption_Comparescan {} \
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ToolOption_NCBrowse {} \
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ToolOption_Signalscan {} \
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