| 1 |
2 |
simont |
Elaborating the design hierarchy:
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| 2 |
|
|
Caching library 'worklib' ....... Done
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| 3 |
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Building instance overlay tables:
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| 4 |
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$readmemh("../src/oc8051_test.vec", buff);
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| 5 |
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|
|
|
| 6 |
41 |
simont |
ncelab: *W,MEMODR (/projects/oc8051/simont/oc8051/bench/verilog/oc8051_tb.v,133|41): $readmem default memory order incompatible with IEEE1364.
|
| 7 |
2 |
simont |
..............
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| 8 |
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$readmemh("../src/oc8051_rom.in", buff);
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| 9 |
|
|
|
|
| 10 |
41 |
simont |
ncelab: *W,MEMODR (../src/verilog/oc8051_rom.v,34|39): $readmem default memory order incompatible with IEEE1364.
|
| 11 |
2 |
simont |
...... Done
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| 12 |
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|
Generating native compiled code:
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| 13 |
41 |
simont |
worklib.oc0851_int:v <0x42e3c287>
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| 14 |
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|
streams: 102, words: 76709
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| 15 |
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|
worklib.oc8051_acc:v <0x1240b0c4>
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| 16 |
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|
streams: 12, words: 9266
|
| 17 |
|
|
worklib.oc8051_alu:v <0x36548d1c>
|
| 18 |
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|
streams: 19, words: 31722
|
| 19 |
|
|
worklib.oc8051_alu_src1_sel:v <0x49045171>
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| 20 |
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streams: 1, words: 1014
|
| 21 |
2 |
simont |
worklib.oc8051_alu_src2_sel:v <0x7e59f8f4>
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| 22 |
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|
streams: 1, words: 962
|
| 23 |
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|
worklib.oc8051_alu_src3_sel:v <0x4a887dff>
|
| 24 |
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|
streams: 1, words: 396
|
| 25 |
41 |
simont |
worklib.oc8051_b_register:v <0x7f8909e8>
|
| 26 |
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|
streams: 9, words: 7095
|
| 27 |
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|
worklib.oc8051_comp:v <0x32453df9>
|
| 28 |
|
|
streams: 1, words: 1188
|
| 29 |
2 |
simont |
worklib.oc8051_cy_select:v <0x3920b7c3>
|
| 30 |
|
|
streams: 1, words: 924
|
| 31 |
41 |
simont |
worklib.oc8051_decoder:v <0x28b2f0c5>
|
| 32 |
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streams: 37, words: 374153
|
| 33 |
|
|
worklib.oc8051_divide:v <0x6c098db6>
|
| 34 |
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|
streams: 15, words: 7930
|
| 35 |
2 |
simont |
worklib.oc8051_dptr:v <0x3105e8b6>
|
| 36 |
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|
streams: 7, words: 5614
|
| 37 |
41 |
simont |
worklib.oc8051_ext_addr_sel:v <0x6603647c>
|
| 38 |
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streams: 8, words: 4449
|
| 39 |
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worklib.oc8051_immediate_sel:v <0x5b114496>
|
| 40 |
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streams: 10, words: 8328
|
| 41 |
|
|
worklib.oc8051_indi_addr:v <0x4d1dae6d>
|
| 42 |
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streams: 2, words: 5837
|
| 43 |
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worklib.oc8051_multiply:v <0x2c1d9278>
|
| 44 |
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streams: 10, words: 5525
|
| 45 |
|
|
worklib.oc8051_op_select:v <0x6dcc019b>
|
| 46 |
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streams: 25, words: 14949
|
| 47 |
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|
worklib.oc8051_pc:v <0x07ddc3c8>
|
| 48 |
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streams: 19, words: 25611
|
| 49 |
|
|
worklib.oc8051_ports:v <0x0c7b97ea>
|
| 50 |
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streams: 36, words: 32841
|
| 51 |
|
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worklib.oc8051_psw:v <0x0ba437aa>
|
| 52 |
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|
streams: 18, words: 16488
|
| 53 |
|
|
worklib.oc8051_ram:v <0x276638b3>
|
| 54 |
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|
streams: 8, words: 4982
|
| 55 |
|
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worklib.oc8051_ram_rd_sel:v <0x2da76cf3>
|
| 56 |
|
|
streams: 1, words: 1899
|
| 57 |
|
|
worklib.oc8051_ram_sel:v <0x2c8f228b>
|
| 58 |
|
|
streams: 2, words: 4403
|
| 59 |
4 |
markom |
worklib.oc8051_ram_top:v <0x4b18fe14>
|
| 60 |
|
|
streams: 10, words: 8226
|
| 61 |
|
|
worklib.oc8051_ram_wr_sel:v <0x61b65dfb>
|
| 62 |
|
|
streams: 10, words: 4203
|
| 63 |
2 |
simont |
worklib.oc8051_reg1:v <0x5eeb0e90>
|
| 64 |
|
|
streams: 3, words: 1141
|
| 65 |
|
|
worklib.oc8051_reg2:v <0x33db6894>
|
| 66 |
|
|
streams: 3, words: 1203
|
| 67 |
|
|
worklib.oc8051_reg3:v <0x68157157>
|
| 68 |
|
|
streams: 3, words: 1203
|
| 69 |
|
|
worklib.oc8051_reg3:v <0x788a669a>
|
| 70 |
|
|
streams: 3, words: 1339
|
| 71 |
|
|
worklib.oc8051_reg4:v <0x6ea93a4e>
|
| 72 |
|
|
streams: 3, words: 1211
|
| 73 |
|
|
worklib.oc8051_reg8:v <0x6d379d10>
|
| 74 |
|
|
streams: 3, words: 1203
|
| 75 |
|
|
worklib.oc8051_reg8:v <0x7dac9253>
|
| 76 |
|
|
streams: 3, words: 1335
|
| 77 |
41 |
simont |
worklib.oc8051_rom:v <0x08c719d5>
|
| 78 |
|
|
streams: 7, words: 3947
|
| 79 |
|
|
worklib.oc8051_rom_addr_sel:v <0x6c560c33>
|
| 80 |
2 |
simont |
streams: 1, words: 608
|
| 81 |
4 |
markom |
worklib.oc8051_sp:v <0x7c2e5f6c>
|
| 82 |
|
|
streams: 13, words: 7484
|
| 83 |
41 |
simont |
worklib.oc8051_tb:v <0x577c1173>
|
| 84 |
|
|
streams: 23, words: 11573
|
| 85 |
|
|
worklib.oc8051_tc:v <0x3c6915f1>
|
| 86 |
4 |
markom |
streams: 44, words: 32060
|
| 87 |
41 |
simont |
worklib.oc8051_top:v <0x5117fb59>
|
| 88 |
2 |
simont |
streams: 4, words: 1620
|
| 89 |
41 |
simont |
worklib.oc8051_uart:v <0x5c872655>
|
| 90 |
|
|
streams: 135, words: 100926
|
| 91 |
|
|
worklib.oc8051_uart_test:v <0x0cbc1f71>
|
| 92 |
|
|
streams: 8, words: 3386
|
| 93 |
|
|
worklib.oc8051_xram:v <0x322d2b1f>
|
| 94 |
|
|
streams: 8, words: 5421
|
| 95 |
2 |
simont |
Loading native compiled code: .................... Done
|
| 96 |
|
|
Building instance specific data structures.
|
| 97 |
|
|
Design hierarchy summary:
|
| 98 |
|
|
Instances Unique
|
| 99 |
41 |
simont |
Modules: 51 39
|
| 100 |
|
|
Registers: 213 181
|
| 101 |
|
|
Scalar wires: 73 -
|
| 102 |
4 |
markom |
Expanded wires: 80 8
|
| 103 |
41 |
simont |
Vectored wires: 121 -
|
| 104 |
|
|
Always blocks: 114 94
|
| 105 |
2 |
simont |
Initial blocks: 6 6
|
| 106 |
41 |
simont |
Cont. assignments: 69 91
|
| 107 |
4 |
markom |
Pseudo assignments: 20 20
|
| 108 |
2 |
simont |
Simulation timescale: 10ps
|
| 109 |
|
|
Writing initial simulation snapshot: worklib.oc8051_tb:v
|
