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[/] [8051/] [trunk/] [asm/] [counter_test.asm] - Blame information for rev 186

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; r0: counter 0 owerflov counter
; r1: counter 1 owerflov counter
; r2: error code
; r3: counter high expected value
; r4: counter low expected value
; r5: owerflov counter expected value
 
        ajmp start;
 
        org 03h         ;external interrupt 0
        reti;
 
        org 0bh         ;t/c 0 interrupt
        inc r0;
        reti;
 
        org 13h         ;external interrupt 1
        reti;
 
        org 1bh         ;t/c 1 interrupt
        inc r1;
        reti;
 
        org 23h         ;serial interface interrupt
        reti;
 
 
test0:
        mov a, th0      ;
        subb a, r3      ;
        jnz error       ;
        inc r2          ;
        mov a,tl0       ;
        subb a, r4      ;
        jnz error       ;
        inc r2          ;
        mov a, r0       ;
        subb a, r5      ;
        jnz error       ;
        ret;
 
test1:
        mov a, th1      ;
        subb a, r3      ;
        jnz error       ;
        inc r2          ;
        mov a,tl1       ;
        subb a, r4      ;
        jnz error       ;
        inc r2          ;
        mov a, r1       ;
        subb a, r5      ;
        jnz error       ;
        ret;
 
wait:
        dec a           ; 1
        nop             ; 1
        nop             ; 1
        nop             ; 1
        nop             ; 1
        nop             ; 1
        nop             ; 1
        nop             ; 1
        jnz wait        ; 4
        ret             ; 4
 
 
error:
        mov p0, r2;
        nop;
        ajmp error;
 
 
start:
        clr a;
        mov r0, a;
        mov r1, a;
        mov ie, #08ah   ;enable interrupts
        clr c;
 
;
; timer 0 test
;
; mode 0
;
        mov tmod, #004h ;t/c 0 and t/c 1 in counter mode 0
        mov th0, #000h  ;load counter 0
        mov tl0, #000h  ;
        mov tcon, #010h ;start counter 0;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #010h   ;
        mov r3, #000h   ;
        mov r4, #003h   ;
        mov r5, #000h   ;
        acall test0     ;
 
        mov tl0, #01ch  ; load counter 0
        setb tcon.4     ;start counter0
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #020h   ;
        mov r3, #001h   ;
        mov r4, #000h   ;
        mov r5, #000h   ;
        acall test0     ;
 
        mov tl0, #01ch  ;
        mov th0, #0ffh  ;
        setb tcon.4     ;start counter 0
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #030h   ;
        mov r3, #000h   ;
        mov r4, #001h   ;
        mov r5, #001h   ;
        acall test0     ;
;
; mode 1
;
        mov tmod, #005h ; t/c 0 in mode 1
        mov th0, #000h  ;load counter 0
        mov tl0, #000h  ;
        setb tcon.4     ;start counter 0;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #040h   ;
        mov r3, #000h   ;
        mov r4, #004h   ;
        mov r5, #001h   ;
        acall test0     ;
 
        mov tl0, #0fch  ; load counter 0
        setb tcon.4     ;start counter 0;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0;
        mov r2, #050h   ;
        mov r3, #001h   ;
        mov r4, #001h   ;
        mov r5, #001h   ;
        acall test0     ;
 
        mov tl0, #0fch  ;
        mov th0, #0ffh  ;
        setb tcon.4     ;start counter 0
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #060h   ;
        mov r3, #000h   ;
        mov r4, #002h   ;
        mov r5, #002h   ;
        acall test0     ;
;
; mode 2
;
        mov tmod, #006h ; t/c 0 in mode 2
        mov th0, #000h  ;load counter 0
        mov tl0, #005h  ;
        setb tcon.4     ;start counter 0;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #070h   ;
        mov r3, #000h   ;
        mov r4, #009h   ;
        mov r5, #002h   ;
        acall test0     ;
 
        mov tl0, #0fch  ; load counter 0
        mov th0, #050h  ;
        setb tcon.4     ;start counter 0;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0;
        mov r2, #080h   ;
        mov r3, #050h   ;
        mov r4, #051h   ;
        mov r5, #003h   ;
        acall test0     ;
;
; mode 3
;
        mov tmod, #007h ; t/c 0 in mode 3
        mov th0, #000h  ;load counter 0
        mov tl0, #000h  ;
        setb tcon.4     ;start counter 0;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #090h   ;
        mov r3, #000h   ;
        mov r4, #004h   ;
        mov r5, #003h   ;
        acall test0     ;
 
        mov tl0, #0fch  ; load counter 0
        mov th0, #000h  ;
        setb tcon.4     ;start counter 0
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        cpl p3.5;
        clr tcon.4      ;stop counter 0
        mov r2, #0a0h   ;
        mov r3, #000h   ;
        mov r4, #002h   ;
        mov r5, #004h   ;
        acall test0     ;
 
        mov tl0, #000h  ; load counter 0
        mov th0, #000h  ;
        setb tcon.6     ; start counter 1
        mov a, #03h     ;
        acall wait      ;
        nop;
        nop;
        nop;
        clr tcon.6      ; stop counter 1
        mov r2, #0b0h   ;
        mov r3, #004h   ;
        mov r4, #000h   ;
        mov r5, #004h   ;
        acall test0     ;
 
        mov tl0, #000h  ; load counter 0
        mov th0, #0fch  ;
        setb tcon.6     ;start counter 1
        mov a, #05h     ;
        acall wait      ;
        nop;
        nop;
        nop;
        clr tcon.6      ;stop counter 1
        mov r2, #0c0h   ;
        mov r3, #003h   ;
        mov r4, #000h   ;
        mov r5, #001h   ;
        mov r0, 01h     ;
        acall test0     ;
 
        mov p0, #001h   ; test counter 0 done!
        mov r1, #000h   ;
 
;
; timer 1 test
;
; mode 0
;
        mov tmod, #040h ;t/c 0 and t/c 1 in counter mode 0
        mov th1, #000h  ;load counter 1
        mov tl1, #000h  ;
        mov tcon, #040h ;start counter 1;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #018h   ;
        mov r3, #000h   ;
        mov r4, #004h   ;
        mov r5, #000h   ;
        acall test1     ;
 
        mov tl1, #01ch  ; load counter 1
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #028h   ;
        mov r3, #001h   ;
        mov r4, #001h   ;
        mov r5, #000h   ;
        acall test1     ;
 
        mov tl1, #01ch  ;
        mov th1, #0ffh  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #038h   ;
        mov r3, #000h   ;
        mov r4, #002h   ;
        mov r5, #001h   ;
        acall test1     ;
;
; mode 1
;
        mov tmod, #050h ; t/c 1 in counter 1
        mov th1, #000h  ;load counter 1
        mov tl1, #000h  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #048h   ;
        mov r3, #000h   ;
        mov r4, #004h   ;
        mov r5, #001h   ;
        acall test1     ;
 
        mov tl1, #0fch  ; load counter 1
        setb tcon.6     ; start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #058h   ;
        mov r3, #001h   ;
        mov r4, #001h   ;
        mov r5, #001h   ;
        acall test1     ;
 
        mov tl1, #0fch  ;
        mov th1, #0ffh  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #068h   ;
        mov r3, #000h   ;
        mov r4, #002h   ;
        mov r5, #002h   ;
        acall test1     ;
;
; mode 2
;
        mov tmod, #060h ; t/c 1 in mode 2
        mov th1, #000h  ;load counter 1
        mov tl1, #005h  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #078h   ;
        mov r3, #000h   ;
        mov r4, #009h   ;
        mov r5, #002h   ;
        acall test1     ;
 
        mov tl1, #0fch  ; load counter 1
        mov th1, #050h  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #088h   ;
        mov r3, #050h   ;
        mov r4, #051h   ;
        mov r5, #003h   ;
        acall test1     ;
;
; mode 3
;
        mov tmod, #070h ; t/c 1 in mode 3
        mov th1, #000h  ;load counter 1
        mov tl1, #000h  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #098h   ;
        mov r3, #000h   ;
        mov r4, #000h   ;
        mov r5, #003h   ;
        acall test1     ;
 
        mov tl1, #0fch  ; load counter 1
        mov th1, #0ffh  ;
        setb tcon.6     ;start counter 1
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
 
 
        cpl p3.6;
        cpl p3.6;
        cpl p3.6;
        clr tcon.6      ;stop counter 1
        mov r2, #0a8h   ;
        mov r3, #0ffh   ;
        mov r4, #0fch   ;
        mov r5, #003h   ;
        acall test1     ;
 
        mov p0, #002h   ; test counter 1 done!
 
 
end

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[/] [8051/] [trunk/] [asm/] [counter_test.asm] - Blame information for rev 186

Line No.	Rev	Author	Line
1	131	simont	`; r0: counter 0 owerflov counter`
2			`; r1: counter 1 owerflov counter`
3			`; r2: error code`
4			`; r3: counter high expected value`
5			`; r4: counter low expected value`
6			`; r5: owerflov counter expected value`
7
8			`ajmp start;`
9
10			`org 03h ;external interrupt 0`
11			`reti;`
12
13			`org 0bh ;t/c 0 interrupt`
14			`inc r0;`
15			`reti;`
16
17			`org 13h ;external interrupt 1`
18			`reti;`
19
20			`org 1bh ;t/c 1 interrupt`
21			`inc r1;`
22			`reti;`
23
24			`org 23h ;serial interface interrupt`
25			`reti;`
26
27
28			`test0:`
29			`mov a, th0 ;`
30			`subb a, r3 ;`
31			`jnz error ;`
32			`inc r2 ;`
33			`mov a,tl0 ;`
34			`subb a, r4 ;`
35			`jnz error ;`
36			`inc r2 ;`
37			`mov a, r0 ;`
38			`subb a, r5 ;`
39			`jnz error ;`
40			`ret;`
41
42			`test1:`
43			`mov a, th1 ;`
44			`subb a, r3 ;`
45			`jnz error ;`
46			`inc r2 ;`
47			`mov a,tl1 ;`
48			`subb a, r4 ;`
49			`jnz error ;`
50			`inc r2 ;`
51			`mov a, r1 ;`
52			`subb a, r5 ;`
53			`jnz error ;`
54			`ret;`
55
56			`wait:`
57			`dec a ; 1`
58			`nop ; 1`
59			`nop ; 1`
60			`nop ; 1`
61			`nop ; 1`
62			`nop ; 1`
63			`nop ; 1`
64			`nop ; 1`
65	155	simont	`jnz wait ; 4`
66			`ret ; 4`
67	131	simont
68
69			`error:`
70			`mov p0, r2;`
71			`nop;`
72			`ajmp error;`
73
74
75			`start:`
76			`clr a;`
77			`mov r0, a;`
78			`mov r1, a;`
79			`mov ie, #08ah ;enable interrupts`
80			`clr c;`
81
82			`;`
83			`; timer 0 test`
84			`;`
85			`; mode 0`
86			`;`
87			`mov tmod, #004h ;t/c 0 and t/c 1 in counter mode 0`
88			`mov th0, #000h ;load counter 0`
89			`mov tl0, #000h ;`
90			`mov tcon, #010h ;start counter 0;`
91			`cpl p3.5;`
92			`cpl p3.5;`
93			`cpl p3.5;`
94			`cpl p3.5;`
95			`cpl p3.5;`
96			`cpl p3.5;`
97			`clr tcon.4 ;stop counter 0`
98			`mov r2, #010h ;`
99			`mov r3, #000h ;`
100			`mov r4, #003h ;`
101			`mov r5, #000h ;`
102			`acall test0 ;`
103
104			`mov tl0, #01ch ; load counter 0`
105			`setb tcon.4 ;start counter0`
106			`cpl p3.5;`
107			`cpl p3.5;`
108			`cpl p3.5;`
109			`cpl p3.5;`
110			`cpl p3.5;`
111			`cpl p3.5;`
112			`cpl p3.5;`
113			`cpl p3.5;`
114			`clr tcon.4 ;stop counter 0`
115			`mov r2, #020h ;`
116			`mov r3, #001h ;`
117			`mov r4, #000h ;`
118			`mov r5, #000h ;`
119			`acall test0 ;`
120
121			`mov tl0, #01ch ;`
122			`mov th0, #0ffh ;`
123			`setb tcon.4 ;start counter 0`
124			`cpl p3.5;`
125			`cpl p3.5;`
126			`cpl p3.5;`
127			`cpl p3.5;`
128			`cpl p3.5;`
129			`cpl p3.5;`
130			`cpl p3.5;`
131			`cpl p3.5;`
132			`cpl p3.5;`
133			`cpl p3.5;`
134			`clr tcon.4 ;stop counter 0`
135			`mov r2, #030h ;`
136			`mov r3, #000h ;`
137			`mov r4, #001h ;`
138			`mov r5, #001h ;`
139			`acall test0 ;`
140			`;`
141			`; mode 1`
142			`;`
143			`mov tmod, #005h ; t/c 0 in mode 1`
144			`mov th0, #000h ;load counter 0`
145			`mov tl0, #000h ;`
146			`setb tcon.4 ;start counter 0;`
147			`cpl p3.5;`
148			`cpl p3.5;`
149			`cpl p3.5;`
150			`cpl p3.5;`
151			`cpl p3.5;`
152			`cpl p3.5;`
153			`cpl p3.5;`
154			`cpl p3.5;`
155			`clr tcon.4 ;stop counter 0`
156			`mov r2, #040h ;`
157			`mov r3, #000h ;`
158			`mov r4, #004h ;`
159			`mov r5, #001h ;`
160			`acall test0 ;`
161
162			`mov tl0, #0fch ; load counter 0`
163			`setb tcon.4 ;start counter 0;`
164			`cpl p3.5;`
165			`cpl p3.5;`
166			`cpl p3.5;`
167			`cpl p3.5;`
168			`cpl p3.5;`
169			`cpl p3.5;`
170			`cpl p3.5;`
171			`cpl p3.5;`
172			`cpl p3.5;`
173			`cpl p3.5;`
174			`clr tcon.4 ;stop counter 0;`
175			`mov r2, #050h ;`
176			`mov r3, #001h ;`
177			`mov r4, #001h ;`
178			`mov r5, #001h ;`
179			`acall test0 ;`
180
181			`mov tl0, #0fch ;`
182			`mov th0, #0ffh ;`
183			`setb tcon.4 ;start counter 0`
184			`cpl p3.5;`
185			`cpl p3.5;`
186			`cpl p3.5;`
187			`cpl p3.5;`
188			`cpl p3.5;`
189			`cpl p3.5;`
190			`cpl p3.5;`
191			`cpl p3.5;`
192			`cpl p3.5;`
193			`cpl p3.5;`
194			`cpl p3.5;`
195			`cpl p3.5;`
196			`clr tcon.4 ;stop counter 0`
197			`mov r2, #060h ;`
198			`mov r3, #000h ;`
199			`mov r4, #002h ;`
200			`mov r5, #002h ;`
201			`acall test0 ;`
202			`;`
203			`; mode 2`
204			`;`
205			`mov tmod, #006h ; t/c 0 in mode 2`
206			`mov th0, #000h ;load counter 0`
207			`mov tl0, #005h ;`
208			`setb tcon.4 ;start counter 0;`
209			`cpl p3.5;`
210			`cpl p3.5;`
211			`cpl p3.5;`
212			`cpl p3.5;`
213			`cpl p3.5;`
214			`cpl p3.5;`
215			`cpl p3.5;`
216			`cpl p3.5;`
217			`clr tcon.4 ;stop counter 0`
218			`mov r2, #070h ;`
219			`mov r3, #000h ;`
220			`mov r4, #009h ;`
221			`mov r5, #002h ;`
222			`acall test0 ;`
223
224			`mov tl0, #0fch ; load counter 0`
225			`mov th0, #050h ;`
226			`setb tcon.4 ;start counter 0;`
227			`cpl p3.5;`
228			`cpl p3.5;`
229			`cpl p3.5;`
230			`cpl p3.5;`
231			`cpl p3.5;`
232			`cpl p3.5;`
233			`cpl p3.5;`
234			`cpl p3.5;`
235			`cpl p3.5;`
236			`cpl p3.5;`
237			`clr tcon.4 ;stop counter 0;`
238			`mov r2, #080h ;`
239			`mov r3, #050h ;`
240			`mov r4, #051h ;`
241			`mov r5, #003h ;`
242			`acall test0 ;`
243			`;`
244			`; mode 3`
245			`;`
246			`mov tmod, #007h ; t/c 0 in mode 3`
247			`mov th0, #000h ;load counter 0`
248			`mov tl0, #000h ;`
249			`setb tcon.4 ;start counter 0;`
250			`cpl p3.5;`
251			`cpl p3.5;`
252			`cpl p3.5;`
253			`cpl p3.5;`
254			`cpl p3.5;`
255			`cpl p3.5;`
256			`cpl p3.5;`
257			`cpl p3.5;`
258			`clr tcon.4 ;stop counter 0`
259			`mov r2, #090h ;`
260			`mov r3, #000h ;`
261			`mov r4, #004h ;`
262			`mov r5, #003h ;`
263			`acall test0 ;`
264
265			`mov tl0, #0fch ; load counter 0`
266			`mov th0, #000h ;`
267			`setb tcon.4 ;start counter 0`
268			`cpl p3.5;`
269			`cpl p3.5;`
270			`cpl p3.5;`
271			`cpl p3.5;`
272			`cpl p3.5;`
273			`cpl p3.5;`
274			`cpl p3.5;`
275			`cpl p3.5;`
276			`cpl p3.5;`
277			`cpl p3.5;`
278			`cpl p3.5;`
279			`cpl p3.5;`
280			`clr tcon.4 ;stop counter 0`
281			`mov r2, #0a0h ;`
282			`mov r3, #000h ;`
283			`mov r4, #002h ;`
284			`mov r5, #004h ;`
285			`acall test0 ;`
286
287			`mov tl0, #000h ; load counter 0`
288			`mov th0, #000h ;`
289			`setb tcon.6 ; start counter 1`
290			`mov a, #03h ;`
291			`acall wait ;`
292			`nop;`
293			`nop;`
294			`nop;`
295			`clr tcon.6 ; stop counter 1`
296			`mov r2, #0b0h ;`
297			`mov r3, #004h ;`
298			`mov r4, #000h ;`
299			`mov r5, #004h ;`
300			`acall test0 ;`
301
302			`mov tl0, #000h ; load counter 0`
303			`mov th0, #0fch ;`
304			`setb tcon.6 ;start counter 1`
305			`mov a, #05h ;`
306			`acall wait ;`
307			`nop;`
308			`nop;`
309			`nop;`
310			`clr tcon.6 ;stop counter 1`
311			`mov r2, #0c0h ;`
312			`mov r3, #003h ;`
313			`mov r4, #000h ;`
314			`mov r5, #001h ;`
315			`mov r0, 01h ;`
316			`acall test0 ;`
317
318			`mov p0, #001h ; test counter 0 done!`
319			`mov r1, #000h ;`
320
321			`;`
322			`; timer 1 test`
323			`;`
324			`; mode 0`
325			`;`
326			`mov tmod, #040h ;t/c 0 and t/c 1 in counter mode 0`
327			`mov th1, #000h ;load counter 1`
328			`mov tl1, #000h ;`
329			`mov tcon, #040h ;start counter 1;`
330			`cpl p3.6;`
331			`cpl p3.6;`
332			`cpl p3.6;`
333			`cpl p3.6;`
334			`cpl p3.6;`
335			`cpl p3.6;`
336			`cpl p3.6;`
337			`cpl p3.6;`
338			`clr tcon.6 ;stop counter 1`
339			`mov r2, #018h ;`
340			`mov r3, #000h ;`
341			`mov r4, #004h ;`
342			`mov r5, #000h ;`
343			`acall test1 ;`
344
345			`mov tl1, #01ch ; load counter 1`
346			`setb tcon.6 ;start counter 1`
347			`cpl p3.6;`
348			`cpl p3.6;`
349			`cpl p3.6;`
350			`cpl p3.6;`
351			`cpl p3.6;`
352			`cpl p3.6;`
353			`cpl p3.6;`
354			`cpl p3.6;`
355			`cpl p3.6;`
356			`cpl p3.6;`
357			`clr tcon.6 ;stop counter 1`
358			`mov r2, #028h ;`
359			`mov r3, #001h ;`
360			`mov r4, #001h ;`
361			`mov r5, #000h ;`
362			`acall test1 ;`
363
364			`mov tl1, #01ch ;`
365			`mov th1, #0ffh ;`
366			`setb tcon.6 ;start counter 1`
367			`cpl p3.6;`
368			`cpl p3.6;`
369			`cpl p3.6;`
370			`cpl p3.6;`
371			`cpl p3.6;`
372			`cpl p3.6;`
373			`cpl p3.6;`
374			`cpl p3.6;`
375			`cpl p3.6;`
376			`cpl p3.6;`
377			`cpl p3.6;`
378			`cpl p3.6;`
379			`clr tcon.6 ;stop counter 1`
380			`mov r2, #038h ;`
381			`mov r3, #000h ;`
382			`mov r4, #002h ;`
383			`mov r5, #001h ;`
384			`acall test1 ;`
385			`;`
386			`; mode 1`
387			`;`
388			`mov tmod, #050h ; t/c 1 in counter 1`
389			`mov th1, #000h ;load counter 1`
390			`mov tl1, #000h ;`
391			`setb tcon.6 ;start counter 1`
392			`cpl p3.6;`
393			`cpl p3.6;`
394			`cpl p3.6;`
395			`cpl p3.6;`
396			`cpl p3.6;`
397			`cpl p3.6;`
398			`cpl p3.6;`
399			`cpl p3.6;`
400			`clr tcon.6 ;stop counter 1`
401			`mov r2, #048h ;`
402			`mov r3, #000h ;`
403			`mov r4, #004h ;`
404			`mov r5, #001h ;`
405			`acall test1 ;`
406
407			`mov tl1, #0fch ; load counter 1`
408			`setb tcon.6 ; start counter 1`
409			`cpl p3.6;`
410			`cpl p3.6;`
411			`cpl p3.6;`
412			`cpl p3.6;`
413			`cpl p3.6;`
414			`cpl p3.6;`
415			`cpl p3.6;`
416			`cpl p3.6;`
417			`cpl p3.6;`
418			`cpl p3.6;`
419			`clr tcon.6 ;stop counter 1`
420			`mov r2, #058h ;`
421			`mov r3, #001h ;`
422			`mov r4, #001h ;`
423			`mov r5, #001h ;`
424			`acall test1 ;`
425
426			`mov tl1, #0fch ;`
427			`mov th1, #0ffh ;`
428			`setb tcon.6 ;start counter 1`
429			`cpl p3.6;`
430			`cpl p3.6;`
431			`cpl p3.6;`
432			`cpl p3.6;`
433			`cpl p3.6;`
434			`cpl p3.6;`
435			`cpl p3.6;`
436			`cpl p3.6;`
437			`cpl p3.6;`
438			`cpl p3.6;`
439			`cpl p3.6;`
440			`cpl p3.6;`
441			`clr tcon.6 ;stop counter 1`
442			`mov r2, #068h ;`
443			`mov r3, #000h ;`
444			`mov r4, #002h ;`
445			`mov r5, #002h ;`
446			`acall test1 ;`
447			`;`
448			`; mode 2`
449			`;`
450			`mov tmod, #060h ; t/c 1 in mode 2`
451			`mov th1, #000h ;load counter 1`
452			`mov tl1, #005h ;`
453			`setb tcon.6 ;start counter 1`
454			`cpl p3.6;`
455			`cpl p3.6;`
456			`cpl p3.6;`
457			`cpl p3.6;`
458			`cpl p3.6;`
459			`cpl p3.6;`
460			`cpl p3.6;`
461			`cpl p3.6;`
462			`clr tcon.6 ;stop counter 1`
463			`mov r2, #078h ;`
464			`mov r3, #000h ;`
465			`mov r4, #009h ;`
466			`mov r5, #002h ;`
467			`acall test1 ;`
468
469			`mov tl1, #0fch ; load counter 1`
470			`mov th1, #050h ;`
471			`setb tcon.6 ;start counter 1`
472			`cpl p3.6;`
473			`cpl p3.6;`
474			`cpl p3.6;`
475			`cpl p3.6;`
476			`cpl p3.6;`
477			`cpl p3.6;`
478			`cpl p3.6;`
479			`cpl p3.6;`
480			`cpl p3.6;`
481			`cpl p3.6;`
482			`clr tcon.6 ;stop counter 1`
483			`mov r2, #088h ;`
484			`mov r3, #050h ;`
485			`mov r4, #051h ;`
486			`mov r5, #003h ;`
487			`acall test1 ;`
488			`;`
489			`; mode 3`
490			`;`
491			`mov tmod, #070h ; t/c 1 in mode 3`
492			`mov th1, #000h ;load counter 1`
493			`mov tl1, #000h ;`
494			`setb tcon.6 ;start counter 1`
495			`cpl p3.6;`
496			`cpl p3.6;`
497			`cpl p3.6;`
498			`cpl p3.6;`
499			`cpl p3.6;`
500			`cpl p3.6;`
501			`cpl p3.6;`
502			`cpl p3.6;`
503			`clr tcon.6 ;stop counter 1`
504			`mov r2, #098h ;`
505			`mov r3, #000h ;`
506			`mov r4, #000h ;`
507			`mov r5, #003h ;`
508			`acall test1 ;`
509
510			`mov tl1, #0fch ; load counter 1`
511			`mov th1, #0ffh ;`
512			`setb tcon.6 ;start counter 1`
513			`cpl p3.6;`
514			`cpl p3.6;`
515			`cpl p3.6;`
516			`cpl p3.6;`
517			`cpl p3.6;`
518			`cpl p3.6;`
519			`cpl p3.6;`
520			`cpl p3.6;`
521			`cpl p3.6;`
522
523
524			`cpl p3.6;`
525			`cpl p3.6;`
526			`cpl p3.6;`
527			`clr tcon.6 ;stop counter 1`
528			`mov r2, #0a8h ;`
529			`mov r3, #0ffh ;`
530			`mov r4, #0fch ;`
531			`mov r5, #003h ;`
532			`acall test1 ;`
533
534			`mov p0, #002h ; test counter 1 done!`
535
536
537			`end`