OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [asm/] [v/] [xram.v] - Blame information for rev 186

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 simont
 
2
///
3
/// created by oc8051 rom maker
4
/// author: Simon Teran (simont@opencores.org)
5
///
6
/// source file: D:\tmp\asm\xram.hex
7
/// date: 10.7.02
8
/// time: 10:36:12
9
///
10
 
11
module oc8051_rom (rst, clk, addr, ea_int, data1, data2, data3);
12
 
13
parameter INT_ROM_WID= 7;
14
 
15
input rst, clk;
16
input [15:0] addr;
17
output ea_int;
18
output [7:0] data1, data2, data3;
19
reg [7:0] data1, data2, data3;
20
reg [7:0] buff [65535:0];
21
integer i;
22
 
23
wire ea;
24
 
25
assign ea = | addr[15:INT_ROM_WID];
26
assign ea_int = ! ea;
27
 
28
initial
29
begin
30
    for (i=0; i<65536; i=i+1)
31
      buff [i] = 8'h00;
32
#2
33
 
34
    buff [16'h00_00] = 8'h02;
35
    buff [16'h00_01] = 8'h00;
36
    buff [16'h00_02] = 8'h35;
37
    buff [16'h00_03] = 8'h90;
38
    buff [16'h00_04] = 8'h00;
39
    buff [16'h00_05] = 8'h00;
40
    buff [16'h00_06] = 8'h74;
41
    buff [16'h00_07] = 8'h01;
42
    buff [16'h00_08] = 8'hF0;
43
    buff [16'h00_09] = 8'hFF;
44
    buff [16'h00_0a] = 8'h7E;
45
    buff [16'h00_0b] = 8'h00;
46
    buff [16'h00_0c] = 8'h74;
47
    buff [16'h00_0d] = 8'hFF;
48
    buff [16'h00_0e] = 8'h2F;
49
    buff [16'h00_0f] = 8'hF5;
50
    buff [16'h00_10] = 8'h82;
51
    buff [16'h00_11] = 8'hEE;
52
    buff [16'h00_12] = 8'h34;
53
    buff [16'h00_13] = 8'hFF;
54
    buff [16'h00_14] = 8'hF5;
55
    buff [16'h00_15] = 8'h83;
56
    buff [16'h00_16] = 8'hE0;
57
    buff [16'h00_17] = 8'h04;
58
    buff [16'h00_18] = 8'hFD;
59
    buff [16'h00_19] = 8'h74;
60
    buff [16'h00_1a] = 8'h00;
61
    buff [16'h00_1b] = 8'h2F;
62
    buff [16'h00_1c] = 8'hF5;
63
    buff [16'h00_1d] = 8'h82;
64
    buff [16'h00_1e] = 8'hEE;
65
    buff [16'h00_1f] = 8'h34;
66
    buff [16'h00_20] = 8'h00;
67
    buff [16'h00_21] = 8'hF5;
68
    buff [16'h00_22] = 8'h83;
69
    buff [16'h00_23] = 8'hED;
70
    buff [16'h00_24] = 8'hF0;
71
    buff [16'h00_25] = 8'h0F;
72
    buff [16'h00_26] = 8'hBF;
73
    buff [16'h00_27] = 8'h00;
74
    buff [16'h00_28] = 8'h01;
75
    buff [16'h00_29] = 8'h0E;
76
    buff [16'h00_2a] = 8'hE4;
77
    buff [16'h00_2b] = 8'hB5;
78
    buff [16'h00_2c] = 8'h07;
79
    buff [16'h00_2d] = 8'hDE;
80
    buff [16'h00_2e] = 8'hEE;
81
    buff [16'h00_2f] = 8'hB4;
82
    buff [16'h00_30] = 8'h08;
83
    buff [16'h00_31] = 8'hDA;
84
    buff [16'h00_32] = 8'h80;
85
    buff [16'h00_33] = 8'hFE;
86
    buff [16'h00_34] = 8'h22;
87
    buff [16'h00_35] = 8'h78;
88
    buff [16'h00_36] = 8'h7F;
89
    buff [16'h00_37] = 8'hE4;
90
    buff [16'h00_38] = 8'hF6;
91
    buff [16'h00_39] = 8'hD8;
92
    buff [16'h00_3a] = 8'hFD;
93
    buff [16'h00_3b] = 8'h75;
94
    buff [16'h00_3c] = 8'h81;
95
    buff [16'h00_3d] = 8'h07;
96
    buff [16'h00_3e] = 8'h02;
97
    buff [16'h00_3f] = 8'h00;
98
    buff [16'h00_40] = 8'h03;
99
end
100
 
101
always @(posedge clk)
102
begin
103
  data1 <= #1 buff [addr];
104
  data2 <= #1 buff [addr+1];
105
  data3 <= #1 buff [addr+2];
106
end
107
 
108
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.