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[/] [8051/] [trunk/] [bench/] [in/] [lcall.in] - Blame information for rev 96

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///
/// created by oc8051 rom maker
/// author: Simon Teran (simont@opencores.org)
///
/// source file: D:\verilog\oc8051\test\lcall.hex
/// date: 19.6.02
/// time: 10:15:08
///
75
20
00
D2
02
12
00
0E
85
20
80
02
00
12
75
80
0A
22
00
00

Line No.	Rev	Author	Line
1	96	simont	`///`
2			`/// created by oc8051 rom maker`
3			`/// author: Simon Teran (simont@opencores.org)`
4			`///`
5			`/// source file: D:\verilog\oc8051\test\lcall.hex`
6			`/// date: 19.6.02`
7			`/// time: 10:15:08`
8			`///`
9			`75`
10			`20`
11			`00`
12			`D2`
13			`02`
14			`12`
15			`00`
16			`0E`
17			`85`
18			`20`
19			`80`
20			`02`
21			`00`
22			`12`
23			`75`
24			`80`
25			`0A`
26			`22`
27			`00`
28			`00`

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[/] [8051/] [trunk/] [bench/] [in/] [lcall.in] - Blame information for rev 96