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/*
===================
test source program
testdmuls.src
 
Jan.03 2003
===================
 
address           size wait width device
00000000-00001FFF  8K  0    32    ROM
00010000-00011FFF  8K  3    32    ROM
00020000-00021FFF  8K  0    16    ROM
00030000-00031FFF  8K  3    16    ROM
ABCD0000-ABCD0003   4  3    32    PIO
ABCD0100-ABCD0103   4  3    32    UART
ABCD0200-ABCD0207   8  3    32    SYS
FFFCE000-FFFCFFFF  8K  0    32    RAM
FFFDE000-FFFDFFFF  8K  3    32    RAM
FFFEE000-FFFEFFFF  8K  0    16    RAM
FFFFE000-FFFFFFFF  8K  3    16    RAM
*/
 
.equ _rom0, 0x00000000
.equ _rom1, 0x00010000
.equ _rom2, 0x00020000
.equ _rom3, 0x00030000
.equ _pio,  0xabcd0000
.equ _uart, 0xabcd0100
.equ _sys,  0xabcd0200
.equ _ram0, 0xfffce000
.equ _ram1, 0xfffde000
.equ _ram2, 0xfffee000
.equ _ram3, 0xffffe000
 
.org _rom0
.long _rom0 + _init - _rom0
.long _ram0 + 0x02000
 
.org 0x0400
 
/**************
 Initialization
 **************/
_init:
_start:
 mov    #0, r14
_test:
 mov.l  _pfail, r13 !fail address
 bra    _testgo
 nop
_pfail: .long _fail
_testgo:
 
/************************
 DMULS.L Rm, Rn
 ************************/
 mov.l  _ptestvalue1, r1
 mov.l  _ptestvalue2, r2
 
 dmuls.l r2, r1
 dmuls.l r1, r2
 dmuls.l r2, r1
 dmuls.l r1, r2 !You should check mult contention,here.
 
_testloop:
 mov.l  @r1+, r3
 mov.l  @r1+, r4
 mov.l  @r1+, r5
 mov.l  @r1+, r6
 
 dmuls.l r4, r3
 
 sts    mach, r3 !You should check mult contention,here.
 sts    macl, r4
 
!----
 cmp/eq r5, r3
 bt     .+6
 jmp    @r13
 nop
!----
 cmp/eq r6, r4
 bt     .+6
 jmp    @r13
 nop
!----
 cmp/eq r2, r1
 bf     _testloop
 bra    _testfinish
 nop
!----
 .align 4
_ptestvalue1: .long _testvalue1
_ptestvalue2: .long _testvalue2
 
 .align 4
_testvalue1:
 .long  0x00000002 !Rn
 .long  0x00000003 !Rm
 .long  0x00000000 !MACH
 .long  0x00000006 !MACL
 
 .long  0x12345678
 .long  0x9abcdef0
 .long  0xf8cc93d6
 .long  0x242d2080
 
 .long  0x00000001
 .long  0xffffffff
 .long  0xffffffff
 .long  0xffffffff
 
 .long  0xffffffff
 .long  0x00000001
 .long  0xffffffff
 .long  0xffffffff
 
 .long  0x7fffffff
 .long  0x80000000
 .long  0xc0000000
 .long  0x80000000
 
 .long  0x80000000
 .long  0x7fffffff
 .long  0xc0000000
 .long  0x80000000
 
 .long  0xffffffff
 .long  0xffffffff
 .long  0x00000000
 .long  0x00000001
 
 .long  0x7fffffff
 .long  0x7fffffff
 .long  0x3fffffff
 .long  0x00000001
 
 .long  0x80000000
 .long  0x80000000
 .long  0x40000000
 .long  0x00000000
_testvalue2:
 
_testfinish:
/*********************************************************
 Move to another Next ROM area to check hardware operation
 *********************************************************/
 mov.l _pbranch_table, r13
 add r14, r13
 mov.l @r13, r12
 jmp @r12
 add #4, r14
.align 4
_pbranch_table: .long _branch_table
_branch_table:
 .long _rom1+_test
 .long _rom2+_test
 .long _rom3+_test
 .long _rom0+_pass
 
/**************
 Congraturation
 **************/
_pass:
 mov.l _ppass_value, r0
 mov.l _ppass_value, r1
 mov.l r0, @r1
 bra   _pass
 nop
.align 4
_ppass_value: .long 0x12345678
 
/**********
 You Failed
 **********/
_fail:
 mov.l _pfail_value, r0
 mov.l _pfail_value, r1
 bra   _fail
 nop
.align 4
_pfail_value: .long 0x88888888
 
.end

Line No.	Rev	Author	Line
1	2	thorn_aitc	`/*`
2			`===================`
3			`test source program`
4			`testdmuls.src`
5
6			`Jan.03 2003`
7			`===================`
8
9			`address size wait width device`
10			`00000000-00001FFF 8K 0 32 ROM`
11			`00010000-00011FFF 8K 3 32 ROM`
12			`00020000-00021FFF 8K 0 16 ROM`
13			`00030000-00031FFF 8K 3 16 ROM`
14			`ABCD0000-ABCD0003 4 3 32 PIO`
15			`ABCD0100-ABCD0103 4 3 32 UART`
16			`ABCD0200-ABCD0207 8 3 32 SYS`
17			`FFFCE000-FFFCFFFF 8K 0 32 RAM`
18			`FFFDE000-FFFDFFFF 8K 3 32 RAM`
19			`FFFEE000-FFFEFFFF 8K 0 16 RAM`
20			`FFFFE000-FFFFFFFF 8K 3 16 RAM`
21			`*/`
22
23			`.equ _rom0, 0x00000000`
24			`.equ _rom1, 0x00010000`
25			`.equ _rom2, 0x00020000`
26			`.equ _rom3, 0x00030000`
27			`.equ _pio, 0xabcd0000`
28			`.equ _uart, 0xabcd0100`
29			`.equ _sys, 0xabcd0200`
30			`.equ _ram0, 0xfffce000`
31			`.equ _ram1, 0xfffde000`
32			`.equ _ram2, 0xfffee000`
33			`.equ _ram3, 0xffffe000`
34
35			`.org _rom0`
36			`.long _rom0 + _init - _rom0`
37			`.long _ram0 + 0x02000`
38
39			`.org 0x0400`
40
41			`/**************`
42			`Initialization`
43			`**************/`
44			`_init:`
45			`_start:`
46			`mov #0, r14`
47			`_test:`
48			`mov.l _pfail, r13 !fail address`
49			`bra _testgo`
50			`nop`
51			`_pfail: .long _fail`
52			`_testgo:`
53
54			`/************************`
55			`DMULS.L Rm, Rn`
56			`************************/`
57			`mov.l _ptestvalue1, r1`
58			`mov.l _ptestvalue2, r2`
59
60			`dmuls.l r2, r1`
61			`dmuls.l r1, r2`
62			`dmuls.l r2, r1`
63			`dmuls.l r1, r2 !You should check mult contention,here.`
64
65			`_testloop:`
66			`mov.l @r1+, r3`
67			`mov.l @r1+, r4`
68			`mov.l @r1+, r5`
69			`mov.l @r1+, r6`
70
71			`dmuls.l r4, r3`
72
73			`sts mach, r3 !You should check mult contention,here.`
74			`sts macl, r4`
75
76			`!----`
77			`cmp/eq r5, r3`
78			`bt .+6`
79			`jmp @r13`
80			`nop`
81			`!----`
82			`cmp/eq r6, r4`
83			`bt .+6`
84			`jmp @r13`
85			`nop`
86			`!----`
87			`cmp/eq r2, r1`
88			`bf _testloop`
89			`bra _testfinish`
90			`nop`
91			`!----`
92			`.align 4`
93			`_ptestvalue1: .long _testvalue1`
94			`_ptestvalue2: .long _testvalue2`
95
96			`.align 4`
97			`_testvalue1:`
98			`.long 0x00000002 !Rn`
99			`.long 0x00000003 !Rm`
100			`.long 0x00000000 !MACH`
101			`.long 0x00000006 !MACL`
102
103			`.long 0x12345678`
104			`.long 0x9abcdef0`
105			`.long 0xf8cc93d6`
106			`.long 0x242d2080`
107
108			`.long 0x00000001`
109			`.long 0xffffffff`
110			`.long 0xffffffff`
111			`.long 0xffffffff`
112
113			`.long 0xffffffff`
114			`.long 0x00000001`
115			`.long 0xffffffff`
116			`.long 0xffffffff`
117
118			`.long 0x7fffffff`
119			`.long 0x80000000`
120			`.long 0xc0000000`
121			`.long 0x80000000`
122
123			`.long 0x80000000`
124			`.long 0x7fffffff`
125			`.long 0xc0000000`
126			`.long 0x80000000`
127
128			`.long 0xffffffff`
129			`.long 0xffffffff`
130			`.long 0x00000000`
131			`.long 0x00000001`
132
133			`.long 0x7fffffff`
134			`.long 0x7fffffff`
135			`.long 0x3fffffff`
136			`.long 0x00000001`
137
138			`.long 0x80000000`
139			`.long 0x80000000`
140			`.long 0x40000000`
141			`.long 0x00000000`
142			`_testvalue2:`
143
144			`_testfinish:`
145			`/*********************************************************`
146			`Move to another Next ROM area to check hardware operation`
147			`*********************************************************/`
148			`mov.l _pbranch_table, r13`
149			`add r14, r13`
150			`mov.l @r13, r12`
151			`jmp @r12`
152			`add #4, r14`
153			`.align 4`
154			`_pbranch_table: .long _branch_table`
155			`_branch_table:`
156			`.long _rom1+_test`
157			`.long _rom2+_test`
158			`.long _rom3+_test`
159			`.long _rom0+_pass`
160
161			`/**************`
162			`Congraturation`
163			`**************/`
164			`_pass:`
165			`mov.l _ppass_value, r0`
166			`mov.l _ppass_value, r1`
167			`mov.l r0, @r1`
168			`bra _pass`
169			`nop`
170			`.align 4`
171			`_ppass_value: .long 0x12345678`
172
173			`/**********`
174			`You Failed`
175			`**********/`
176			`_fail:`
177			`mov.l _pfail_value, r0`
178			`mov.l _pfail_value, r1`
179			`bra _fail`
180			`nop`
181			`.align 4`
182			`_pfail_value: .long 0x88888888`
183
184			`.end`

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[/] [Aquarius/] [trunk/] [verification/] [sha_testsource/] [testdmuls.src] - Blame information for rev 12