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srmcqueen |
----------------------------------------------------------------------
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---- ----
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---- Basic DES Block Cypher IP Core ----
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---- ----
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---- Implementation of DES-56 ECB mode IP core. ----
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---- ----
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---- To Do: ----
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---- - ----
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---- ----
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---- Author(s): ----
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---- - Steven R. McQueen, srmcqueen@opencores.org ----
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---- ----
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----------------------------------------------------------------------
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---- ----
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---- Copyright (C) 2003 Steven R. McQueen ----
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---- ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- and/or modify it under the terms of the GNU Lesser General ----
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---- Public License as published by the Free Software Foundation; ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- later version. ----
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---- ----
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---- This source is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- details. ----
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---- ----
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---- You should have received a copy of the GNU Lesser General ----
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---- Public License along with this source; if not, download it ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- ----
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----------------------------------------------------------------------
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--
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-- CVS Revision History
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--
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-- $Log: not supported by cvs2svn $
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srmcqueen |
-- Revision 1.1.1.1 2003/10/20 03:51:08 srmcqueen
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-- First Upload, working module
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srmcqueen |
--
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srmcqueen |
--
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srmcqueen |
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-- This module implements the DES 56-bit Key Block Cypher. It expects to receive the 64-bit
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-- data block to be encrypted or decrypted on the indata bus, and the 64-bit key on the inKey
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-- bus. When the DS signal is high, encryption/decryption begins. If the DECIPHER signal is
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-- low when the DS signal is raised, the operation will be encryption. If the DECIPHER signal
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-- is high when the DS signal goes high, the operation will be decryption. With each clock
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-- cycle, one round of encryption is performed. After 16 rounds, the resulting message block
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-- is presented on the OUTDATA bus and the RDY signal is set high.
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--
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-- Comments, questions and suggestions may be directed to the author at srmcqueen@mcqueentech.com.
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srmcqueen |
-- 2005/09/02
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-- Optimized key handling
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-- added optional signals, changed RDY to be low on reset
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-- Perttu Fagerlund
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srmcqueen |
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srmcqueen |
-- 2005/10/15
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-- Added comments
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-- Steven R. McQueen
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--
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--
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.all;
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srmcqueen |
-- Uncomment the following lines to use the declarations that are
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-- provided for instantiating Xilinx primitive components.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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srmcqueen |
ENTITY des56 IS
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PORT(
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indata : IN std_logic_vector (0 TO 63);
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inkey : IN std_logic_vector (0 TO 63);
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outdata : OUT std_logic_vector (0 TO 63);
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decipher : IN std_logic;
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ds : IN std_logic;
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clk : IN std_logic;
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rst : IN std_logic;
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rdy_next_next_cycle : OUT std_logic; -- output will be ready in two clock cycles - optional signal
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rdy_next_cycle : OUT std_logic; -- output will be ready in one clock cycle - optional signal
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rdy : OUT std_logic -- output is ready NOW
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);
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srmcqueen |
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srmcqueen |
END des56 ;
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srmcqueen |
architecture des of des56 is
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srmcqueen |
-- ***********************************************************
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-- * The following attributes are useful in Xilinx ISE
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-- * for debugging purposes. They have been commented
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-- * out to permit logic optimization.
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-- ***********************************************************
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srmcqueen |
--attribute keep: string;
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--attribute nodelay: string;
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--attribute s: string;
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--attribute nodelay of indata: signal is "true";
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--attribute nodelay of inkey: signal is "true";
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--attribute nodelay of decipher: signal is "true";
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--attribute nodelay of ds: signal is "true";
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--attribute nodelay of clk: signal is "true";
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--attribute nodelay of rst: signal is "true";
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--attribute nodelay of rdy: signal is "true";
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--attribute nodelay of outdata: signal is "true";
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--attribute s of indata: signal is "yes";
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--attribute s of inkey: signal is "yes";
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--attribute s of decipher: signal is "yes";
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--attribute s of ds: signal is "yes";
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--attribute s of clk: signal is "yes";
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--attribute s of rst: signal is "yes";
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--attribute s of rdy: signal is "yes";
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--attribute s of outdata: signal is "yes";
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--signal xclk: std_logic;
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--attribute keep of xclk: signal is "true";
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-- mykey and inmsg are inputs to the encryption round logic
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-- they will get new values on each clock
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-- outmsg is the result of the encryption round, it will become inmsg for the next round
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-- there are 16 encryption rounds in DES
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signal mykey: std_logic_vector(0 to 47);
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--attribute keep of mykey: signal is "true";
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signal inmsg: std_logic_vector(0 to 63);
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--attribute keep of inmsg: signal is "true";
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signal outmsg: std_logic_vector(0 to 63);
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--attribute keep of outmsg: signal is "true";
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-- round counters. countup is used for encryption, countdown is for decryption
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-- mycounter takes its value from countup or countdown
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signal countup: integer range 0 to 16;
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signal countdown: integer range 0 to 16;
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signal mycounter: integer range 0 to 16;
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--attribute keep of mycounter: signal is "true";
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-- the decrypt register holds the decrypt/encrypt switch
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signal decrypt: std_logic;
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signal ready: std_logic;
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srmcqueen |
-- **********************************************
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-- * New key registers.
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-- **********************************************
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signal key_l : std_logic_vector(0 to 27);
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signal key_r : std_logic_vector(0 to 27);
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signal keylr : std_logic_vector(0 to 55);
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-- ******************************************************************
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-- * various work signals. I want most of them to be wires, but
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-- * they may be registers or latches, depending on the synthesizer
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-- ******************************************************************
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srmcqueen |
signal d: std_logic_vector(0 to 47);
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signal f: std_logic_vector(0 to 31);
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signal b1: std_logic_vector(0 to 5);
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signal b2: std_logic_vector(0 to 5);
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signal b3: std_logic_vector(0 to 5);
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signal b4: std_logic_vector(0 to 5);
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signal b5: std_logic_vector(0 to 5);
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signal b6: std_logic_vector(0 to 5);
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signal b7: std_logic_vector(0 to 5);
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signal b8: std_logic_vector(0 to 5);
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signal s1: std_logic_vector(0 to 3);
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signal s2: std_logic_vector(0 to 3);
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signal s3: std_logic_vector(0 to 3);
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signal s4: std_logic_vector(0 to 3);
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signal s5: std_logic_vector(0 to 3);
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signal s6: std_logic_vector(0 to 3);
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signal s7: std_logic_vector(0 to 3);
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signal s8: std_logic_vector(0 to 3);
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begin
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srmcqueen |
-- ***************************************************************************************************
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-- * Route wires to copy the key value for the next encryption round
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-- ***************************************************************************************************
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keylr <= key_l & key_r;
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mykey <= keylr(13) & keylr(16) & keylr(10) & keylr(23) & keylr(0) & keylr(4) & keylr(2) & keylr(27) &
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keylr(14) & keylr(5) & keylr(20) & keylr(9) & keylr(22) & keylr(18) & keylr(11) & keylr(3) &
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keylr(25) & keylr(7) & keylr(15) & keylr(6) & keylr(26) & keylr(19) & keylr(12) & keylr(1) &
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keylr(40) & keylr(51) & keylr(30) & keylr(36) & keylr(46) & keylr(54) & keylr(29) & keylr(39) &
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keylr(50) & keylr(44) & keylr(32) & keylr(47) & keylr(43) & keylr(48) & keylr(38) & keylr(55) &
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keylr(33) & keylr(52) & keylr(45) & keylr(41) & keylr(49) & keylr(35) & keylr(28) & keylr(31);
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SetKey: process (clk, countup, decipher)
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-- *********************************************************************************************
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-- * New key management logic by Perttu Fagerlund
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-- * On the first clock, the first round key is registered. Thereafter, the round key is simply
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-- * shifted by the necessary number of bits. This saves more than 57% of the required register
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-- * logic cells over the previous code, which directly registered all of the round keys at once.
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-- *
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-- * A very slight speed increase may be realized due to shorter signal paths in the final fit.
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-- *
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-- * Use the current value of COUNTUP to determine which round of encryption is next.
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-- * Load the KEY_L and KEY_R registers with the appropriate round key value.
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-- * Note that on the first pass, the round key is not available, and must be
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-- * loaded directly from the input signals. The correct value is determined by
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-- * the state of the DECIPHER signal.
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-- *********************************************************************************************
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srmcqueen |
begin
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if rising_edge(clk) then
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case countup is
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when 0 =>
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srmcqueen |
if (decipher = '0') then
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-- these are readily shifted left by one !
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key_l <= inkey(48) & inkey(40) & inkey(32) & inkey(24) & inkey(16) & inkey(8) & inkey(0) &
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inkey(57) & inkey(49) & inkey(41) & inkey(33) & inkey(25) & inkey(17) & inkey(9) & inkey(1) &
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inkey(58) & inkey(50) & inkey(42) & inkey(34) & inkey(26) & inkey(18) & inkey(10) & inkey(2) &
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inkey(59) & inkey(51) & inkey(43) & inkey(35) & inkey(56);
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key_r <= inkey(54) & inkey(46) & inkey(38) & inkey(30) & inkey(22) & inkey(14) & inkey(6) &
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inkey(61) & inkey(53) & inkey(45) & inkey(37) & inkey(29) & inkey(21) & inkey(13) & inkey(5) &
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inkey(60) & inkey(52) & inkey(44) & inkey(36) & inkey(28) & inkey(20) & inkey(12) & inkey(4) &
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inkey(27) & inkey(19) & inkey(11) & inkey(3) & inkey(62);
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else
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key_l <= inkey(56) & inkey(48) & inkey(40) & inkey(32) & inkey(24) & inkey(16) & inkey(8) & inkey(0) &
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inkey(57) & inkey(49) & inkey(41) & inkey(33) & inkey(25) & inkey(17) & inkey(9) & inkey(1) &
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inkey(58) & inkey(50) & inkey(42) & inkey(34) & inkey(26) & inkey(18) & inkey(10) & inkey(2) &
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inkey(59) & inkey(51) & inkey(43) & inkey(35);
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key_r <= inkey(62) & inkey(54) & inkey(46) & inkey(38) & inkey(30) & inkey(22) & inkey(14) & inkey(6) &
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inkey(61) & inkey(53) & inkey(45) & inkey(37) & inkey(29) & inkey(21) & inkey(13) & inkey(5) &
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inkey(60) & inkey(52) & inkey(44) & inkey(36) & inkey(28) & inkey(20) & inkey(12) & inkey(4) &
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inkey(27) & inkey(19) & inkey(11) & inkey(3);
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end if;
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2 |
srmcqueen |
when 1 =>
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4 |
srmcqueen |
if (decipher = '1') then
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233 |
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key_l(0 to 27) <= key_l(27) & key_l(0 to 26);
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234 |
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key_r(0 to 27) <= key_r(27) & key_r(0 to 26);
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235 |
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else
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236 |
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key_l(0 to 27) <= key_l(1 to 27) & key_l(0);
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237 |
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key_r(0 to 27) <= key_r(1 to 27) & key_r(0);
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238 |
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end if;
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239 |
2 |
srmcqueen |
when 2 =>
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240 |
4 |
srmcqueen |
if (decipher = '1') then
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241 |
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key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
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242 |
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key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
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243 |
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else
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244 |
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key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
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245 |
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key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
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246 |
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end if;
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247 |
2 |
srmcqueen |
when 3 =>
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248 |
4 |
srmcqueen |
if (decipher = '1') then
|
249 |
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key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
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250 |
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key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
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251 |
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else
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252 |
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key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
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253 |
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key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
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254 |
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end if;
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255 |
2 |
srmcqueen |
when 4 =>
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256 |
4 |
srmcqueen |
if (decipher = '1') then
|
257 |
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key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
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258 |
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key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
259 |
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else
|
260 |
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key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
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261 |
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key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
262 |
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end if;
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263 |
2 |
srmcqueen |
when 5 =>
|
264 |
4 |
srmcqueen |
if (decipher = '1') then
|
265 |
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key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
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266 |
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key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
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267 |
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else
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268 |
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key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
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269 |
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key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
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270 |
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end if;
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271 |
2 |
srmcqueen |
when 6 =>
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272 |
4 |
srmcqueen |
if (decipher = '1') then
|
273 |
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key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
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274 |
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key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
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275 |
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else
|
276 |
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key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
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277 |
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key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
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278 |
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end if;
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279 |
2 |
srmcqueen |
when 7 =>
|
280 |
4 |
srmcqueen |
if (decipher = '1') then
|
281 |
|
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key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
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282 |
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key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
283 |
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else
|
284 |
|
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key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
285 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
286 |
|
|
end if;
|
287 |
2 |
srmcqueen |
when 8 =>
|
288 |
4 |
srmcqueen |
if (decipher = '1') then
|
289 |
|
|
key_l(0 to 27) <= key_l(27) & key_l(0 to 26);
|
290 |
|
|
key_r(0 to 27) <= key_r(27) & key_r(0 to 26);
|
291 |
|
|
else
|
292 |
|
|
key_l(0 to 27) <= key_l(1 to 27) & key_l(0);
|
293 |
|
|
key_r(0 to 27) <= key_r(1 to 27) & key_r(0);
|
294 |
|
|
end if;
|
295 |
2 |
srmcqueen |
when 9 =>
|
296 |
4 |
srmcqueen |
if (decipher = '1') then
|
297 |
|
|
key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
|
298 |
|
|
key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
299 |
|
|
else
|
300 |
|
|
key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
301 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
302 |
|
|
end if;
|
303 |
2 |
srmcqueen |
when 10 =>
|
304 |
4 |
srmcqueen |
if (decipher = '1') then
|
305 |
|
|
key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
|
306 |
|
|
key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
307 |
|
|
else
|
308 |
|
|
key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
309 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
310 |
|
|
end if;
|
311 |
2 |
srmcqueen |
when 11 =>
|
312 |
4 |
srmcqueen |
if (decipher = '1') then
|
313 |
|
|
key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
|
314 |
|
|
key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
315 |
|
|
else
|
316 |
|
|
key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
317 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
318 |
|
|
end if;
|
319 |
2 |
srmcqueen |
when 12 =>
|
320 |
4 |
srmcqueen |
if (decipher = '1') then
|
321 |
|
|
key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
|
322 |
|
|
key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
323 |
|
|
else
|
324 |
|
|
key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
325 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
326 |
|
|
end if;
|
327 |
2 |
srmcqueen |
when 13 =>
|
328 |
4 |
srmcqueen |
if (decipher = '1') then
|
329 |
|
|
key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
|
330 |
|
|
key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
331 |
|
|
else
|
332 |
|
|
key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
333 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
334 |
|
|
end if;
|
335 |
2 |
srmcqueen |
when 14 =>
|
336 |
4 |
srmcqueen |
if (decipher = '1') then
|
337 |
|
|
key_l(0 to 27) <= key_l(26 to 27) & key_l(0 to 25);
|
338 |
|
|
key_r(0 to 27) <= key_r(26 to 27) & key_r(0 to 25);
|
339 |
|
|
else
|
340 |
|
|
key_l(0 to 27) <= key_l(2 to 27) & key_l(0 to 1);
|
341 |
|
|
key_r(0 to 27) <= key_r(2 to 27) & key_r(0 to 1);
|
342 |
|
|
end if;
|
343 |
2 |
srmcqueen |
when 15 =>
|
344 |
4 |
srmcqueen |
if (decipher = '1') then
|
345 |
|
|
key_l(0 to 27) <= key_l(27) & key_l(0 to 26);
|
346 |
|
|
key_r(0 to 27) <= key_r(27) & key_r(0 to 26);
|
347 |
|
|
else
|
348 |
|
|
key_l(0 to 27) <= key_l(1 to 27) & key_l(0);
|
349 |
|
|
key_r(0 to 27) <= key_r(1 to 27) & key_r(0);
|
350 |
|
|
end if;
|
351 |
2 |
srmcqueen |
when others =>
|
352 |
|
|
end case;
|
353 |
|
|
end if;
|
354 |
|
|
|
355 |
|
|
end process SetKey;
|
356 |
|
|
|
357 |
|
|
|
358 |
4 |
srmcqueen |
|
359 |
|
|
-- **********************************************************************************************
|
360 |
|
|
-- * Load the message word for the next encryption round
|
361 |
|
|
-- * As in SetKey, the data must be taken from the input ports on the first round.
|
362 |
|
|
-- * For all other rounds, the data value is taken from the OUTMSG signal. This signal
|
363 |
|
|
-- * is produced by combinatorial logic.
|
364 |
|
|
-- *
|
365 |
|
|
-- * The first round of this cycle can be the last round of the previous cycle. Output is
|
366 |
|
|
-- * driven at this time.
|
367 |
|
|
-- **********************************************************************************************
|
368 |
2 |
srmcqueen |
SetData: process (clk, countup, rst, ds)
|
369 |
|
|
variable C17: std_logic_vector(1 to 64);
|
370 |
|
|
begin
|
371 |
|
|
if rst = '1' then
|
372 |
4 |
srmcqueen |
-- rdy <= '1'; -- Original implementation - rdy is set high at reset
|
373 |
|
|
rdy <= '0'; -- Optional implementation - rdy is set low at reset
|
374 |
2 |
srmcqueen |
elsif rising_edge(clk) then
|
375 |
4 |
srmcqueen |
rdy <= '0';
|
376 |
|
|
|
377 |
2 |
srmcqueen |
case countup is
|
378 |
|
|
when 0 =>
|
379 |
|
|
if ds = '1' then
|
380 |
4 |
srmcqueen |
-- new data: clock INMSG values directly from input signal
|
381 |
2 |
srmcqueen |
inmsg <= indata(57) & indata(49) & indata(41) & indata(33) & indata(25) & indata(17) & indata(9) & indata(1) &
|
382 |
|
|
indata(59) & indata(51) & indata(43) & indata(35) & indata(27) & indata(19) & indata(11) & indata(3) &
|
383 |
|
|
indata(61) & indata(53) & indata(45) & indata(37) & indata(29) & indata(21) & indata(13) & indata(5) &
|
384 |
|
|
indata(63) & indata(55) & indata(47) & indata(39) & indata(31) & indata(23) & indata(15) & indata(7) &
|
385 |
|
|
indata(56) & indata(48) & indata(40) & indata(32) & indata(24) & indata(16) & indata(8) & indata(0) &
|
386 |
|
|
indata(58) & indata(50) & indata(42) & indata(34) & indata(26) & indata(18) & indata(10) & indata(2) &
|
387 |
|
|
indata(60) & indata(52) & indata(44) & indata(36) & indata(28) & indata(20) & indata(12) & indata(4) &
|
388 |
|
|
indata(62) & indata(54) & indata(46) & indata(38) & indata(30) & indata(22) & indata(14) & indata(6);
|
389 |
|
|
rdy <= '0'; -- Manage the "Data ready" signal
|
390 |
|
|
end if;
|
391 |
|
|
if ready = '0' then --ready is really a "crypto in progress" signal
|
392 |
4 |
srmcqueen |
-- Copy previous round output message data into local wire
|
393 |
2 |
srmcqueen |
C17(1 to 32) := outmsg(32 to 63);
|
394 |
|
|
C17(33 to 64) := outmsg(0 to 31);
|
395 |
4 |
srmcqueen |
|
396 |
|
|
-- clock output message data to output vector. C17 was not strictly required but it made things easier for me.
|
397 |
2 |
srmcqueen |
outdata <= C17(40) & C17(8) & C17(48) & C17(16) & C17(56) & C17(24) & C17(64) & C17(32) &
|
398 |
|
|
C17(39) & C17(7) & C17(47) & C17(15) & C17(55) & C17(23) & C17(63) & C17(31) &
|
399 |
|
|
C17(38) & C17(6) & C17(46) & C17(14) & C17(54) & C17(22) & C17(62) & C17(30) &
|
400 |
|
|
C17(37) & C17(5) & C17(45) & C17(13) & C17(53) & C17(21) & C17(61) & C17(29) &
|
401 |
|
|
C17(36) & C17(4) & C17(44) & C17(12) & C17(52) & C17(20) & C17(60) & C17(28) &
|
402 |
|
|
C17(35) & C17(3) & C17(43) & C17(11) & C17(51) & C17(19) & C17(59) & C17(27) &
|
403 |
|
|
C17(34) & C17(2) & C17(42) & C17(10) & C17(50) & C17(18) & C17(58) & C17(26) &
|
404 |
|
|
C17(33) & C17(1) & C17(41) & C17(9) & C17(49) & C17(17) & C17(57) & C17(25);
|
405 |
4 |
srmcqueen |
rdy <= '1'; -- indicate that valid output is on the bus
|
406 |
2 |
srmcqueen |
end if;
|
407 |
|
|
when others =>
|
408 |
4 |
srmcqueen |
inmsg <= outmsg; -- clock previous round output into next round input vector
|
409 |
|
|
rdy <= '0'; -- manage the "data ready" signal
|
410 |
2 |
srmcqueen |
end case;
|
411 |
|
|
end if;
|
412 |
|
|
|
413 |
|
|
end process setdata;
|
414 |
|
|
|
415 |
|
|
|
416 |
4 |
srmcqueen |
-- *************************************************************
|
417 |
|
|
-- * This handles the READY signal and counts the counters
|
418 |
|
|
-- *************************************************************
|
419 |
2 |
srmcqueen |
Control: process (clk, ready, ds, RST, countup)
|
420 |
|
|
|
421 |
|
|
begin
|
422 |
|
|
|
423 |
|
|
if RST = '1' then
|
424 |
4 |
srmcqueen |
-- assign reset values
|
425 |
2 |
srmcqueen |
ready <= '1';
|
426 |
|
|
countup <= 0;
|
427 |
4 |
srmcqueen |
rdy_next_cycle <= '0';
|
428 |
|
|
rdy_next_next_cycle <= '0';
|
429 |
2 |
srmcqueen |
|
430 |
|
|
elsif rising_edge(clk) then
|
431 |
4 |
srmcqueen |
rdy_next_cycle <= '0';
|
432 |
|
|
rdy_next_next_cycle <= '0';
|
433 |
2 |
srmcqueen |
if ready = '1' then
|
434 |
|
|
if ds = '1' then
|
435 |
4 |
srmcqueen |
-- data is being accepted. Assign starting clock and Data Ready values
|
436 |
2 |
srmcqueen |
ready <= '0';
|
437 |
|
|
countup <= 1;
|
438 |
|
|
end if;
|
439 |
|
|
else
|
440 |
|
|
if countup = 0 then
|
441 |
4 |
srmcqueen |
-- if counter is cleared and no input data, then
|
442 |
|
|
-- indicate that device is waiting for work
|
443 |
2 |
srmcqueen |
if ds = '0' then
|
444 |
|
|
ready <= '1';
|
445 |
|
|
end if;
|
446 |
4 |
srmcqueen |
elsif countup < 14 then
|
447 |
|
|
-- for counter = 1-13, just increment the counter
|
448 |
2 |
srmcqueen |
countup <= countup + 1;
|
449 |
4 |
srmcqueen |
elsif countup < 15 then
|
450 |
|
|
-- for counter = 14, increment the counter and
|
451 |
|
|
-- indicate that data will be ready in two clocks
|
452 |
|
|
countup <= countup + 1;
|
453 |
|
|
rdy_next_next_cycle <= '1';
|
454 |
2 |
srmcqueen |
else
|
455 |
4 |
srmcqueen |
-- for counter = 15, increment the counter and
|
456 |
|
|
-- indicate that data will be ready on the next clock
|
457 |
2 |
srmcqueen |
countup <= 0;
|
458 |
4 |
srmcqueen |
rdy_next_cycle <= '1';
|
459 |
2 |
srmcqueen |
end if;
|
460 |
|
|
end if;
|
461 |
|
|
end if;
|
462 |
|
|
|
463 |
|
|
end process control;
|
464 |
|
|
|
465 |
|
|
|
466 |
|
|
-- Combinatorial Logic
|
467 |
|
|
-- all of this takes around 7-8ns. Is there a way to make it faster?
|
468 |
|
|
--
|
469 |
|
|
-- expand 32 bits of the message word to 48 bits, mix it with the round key,
|
470 |
|
|
-- then load it into 6-bit indexes.
|
471 |
|
|
b1 <= (inmsg(63) & inmsg(36) & inmsg(32 to 35)) xor (mykey(0) & mykey(5) & mykey(1 to 4));
|
472 |
|
|
b2 <= (inmsg(35) & inmsg(40) & inmsg(36 to 39)) xor (mykey(6) & mykey(11) & mykey(7 to 10));
|
473 |
|
|
b3 <= (inmsg(39) & inmsg(44) & inmsg(40 to 43)) xor (mykey(12) & mykey(17) & mykey(13 to 16));
|
474 |
|
|
b4 <= (inmsg(43) & inmsg(48) & inmsg(44 to 47)) xor (mykey(18) & mykey(23) & mykey(19 to 22));
|
475 |
|
|
b5 <= (inmsg(47) & inmsg(52) & inmsg(48 to 51)) xor (mykey(24) & mykey(29) & mykey(25 to 28));
|
476 |
|
|
b6 <= (inmsg(51) & inmsg(56) & inmsg(52 to 55)) xor (mykey(30) & mykey(35) & mykey(31 to 34));
|
477 |
|
|
b7 <= (inmsg(55) & inmsg(60) & inmsg(56 to 59)) xor (mykey(36) & mykey(41) & mykey(37 to 40));
|
478 |
|
|
b8 <= (inmsg(59) & inmsg(32) & inmsg(60 to 63)) xor (mykey(42) & mykey(47) & mykey(43 to 46));
|
479 |
|
|
|
480 |
|
|
-- 8 select statements to look up 4-bit S Box values based on the 6-bit indexes.
|
481 |
|
|
with b1 select
|
482 |
|
|
s1 <= x"e" when "000000",
|
483 |
|
|
x"4" when "000001",
|
484 |
|
|
x"d" when "000010",
|
485 |
|
|
x"1" when "000011",
|
486 |
|
|
x"2" when "000100",
|
487 |
|
|
x"f" when "000101",
|
488 |
|
|
x"b" when "000110",
|
489 |
|
|
x"8" when "000111",
|
490 |
|
|
x"3" when "001000",
|
491 |
|
|
x"a" when "001001",
|
492 |
|
|
x"6" when "001010",
|
493 |
|
|
x"c" when "001011",
|
494 |
|
|
x"5" when "001100",
|
495 |
|
|
x"9" when "001101",
|
496 |
|
|
x"0" when "001110",
|
497 |
|
|
x"7" when "001111",
|
498 |
|
|
x"0" when "010000",
|
499 |
|
|
x"f" when "010001",
|
500 |
|
|
x"7" when "010010",
|
501 |
|
|
x"4" when "010011",
|
502 |
|
|
x"e" when "010100",
|
503 |
|
|
x"2" when "010101",
|
504 |
|
|
x"d" when "010110",
|
505 |
|
|
x"1" when "010111",
|
506 |
|
|
x"a" when "011000",
|
507 |
|
|
x"6" when "011001",
|
508 |
|
|
x"c" when "011010",
|
509 |
|
|
x"b" when "011011",
|
510 |
|
|
x"9" when "011100",
|
511 |
|
|
x"5" when "011101",
|
512 |
|
|
x"3" when "011110",
|
513 |
|
|
x"8" when "011111",
|
514 |
|
|
x"4" when "100000",
|
515 |
|
|
x"1" when "100001",
|
516 |
|
|
x"e" when "100010",
|
517 |
|
|
x"8" when "100011",
|
518 |
|
|
x"d" when "100100",
|
519 |
|
|
x"6" when "100101",
|
520 |
|
|
x"2" when "100110",
|
521 |
|
|
x"b" when "100111",
|
522 |
|
|
x"f" when "101000",
|
523 |
|
|
x"c" when "101001",
|
524 |
|
|
x"9" when "101010",
|
525 |
|
|
x"7" when "101011",
|
526 |
|
|
x"3" when "101100",
|
527 |
|
|
x"a" when "101101",
|
528 |
|
|
x"5" when "101110",
|
529 |
|
|
x"0" when "101111",
|
530 |
|
|
x"f" when "110000",
|
531 |
|
|
x"c" when "110001",
|
532 |
|
|
x"8" when "110010",
|
533 |
|
|
x"2" when "110011",
|
534 |
|
|
x"4" when "110100",
|
535 |
|
|
x"9" when "110101",
|
536 |
|
|
x"1" when "110110",
|
537 |
|
|
x"7" when "110111",
|
538 |
|
|
x"5" when "111000",
|
539 |
|
|
x"b" when "111001",
|
540 |
|
|
x"3" when "111010",
|
541 |
|
|
x"e" when "111011",
|
542 |
|
|
x"a" when "111100",
|
543 |
|
|
x"0" when "111101",
|
544 |
|
|
x"6" when "111110",
|
545 |
|
|
x"d" when "111111",
|
546 |
|
|
"XXXX" when others;
|
547 |
|
|
|
548 |
|
|
|
549 |
|
|
with b2 select
|
550 |
|
|
s2 <= x"f" when "000000",
|
551 |
|
|
x"1" when "000001",
|
552 |
|
|
x"8" when "000010",
|
553 |
|
|
x"e" when "000011",
|
554 |
|
|
x"6" when "000100",
|
555 |
|
|
x"b" when "000101",
|
556 |
|
|
x"3" when "000110",
|
557 |
|
|
x"4" when "000111",
|
558 |
|
|
x"9" when "001000",
|
559 |
|
|
x"7" when "001001",
|
560 |
|
|
x"2" when "001010",
|
561 |
|
|
x"d" when "001011",
|
562 |
|
|
x"c" when "001100",
|
563 |
|
|
x"0" when "001101",
|
564 |
|
|
x"5" when "001110",
|
565 |
|
|
x"a" when "001111",
|
566 |
|
|
x"3" when "010000",
|
567 |
|
|
x"d" when "010001",
|
568 |
|
|
x"4" when "010010",
|
569 |
|
|
x"7" when "010011",
|
570 |
|
|
x"f" when "010100",
|
571 |
|
|
x"2" when "010101",
|
572 |
|
|
x"8" when "010110",
|
573 |
|
|
x"e" when "010111",
|
574 |
|
|
x"c" when "011000",
|
575 |
|
|
x"0" when "011001",
|
576 |
|
|
x"1" when "011010",
|
577 |
|
|
x"a" when "011011",
|
578 |
|
|
x"6" when "011100",
|
579 |
|
|
x"9" when "011101",
|
580 |
|
|
x"b" when "011110",
|
581 |
|
|
x"5" when "011111",
|
582 |
|
|
x"0" when "100000",
|
583 |
|
|
x"e" when "100001",
|
584 |
|
|
x"7" when "100010",
|
585 |
|
|
x"b" when "100011",
|
586 |
|
|
x"a" when "100100",
|
587 |
|
|
x"4" when "100101",
|
588 |
|
|
x"d" when "100110",
|
589 |
|
|
x"1" when "100111",
|
590 |
|
|
x"5" when "101000",
|
591 |
|
|
x"8" when "101001",
|
592 |
|
|
x"c" when "101010",
|
593 |
|
|
x"6" when "101011",
|
594 |
|
|
x"9" when "101100",
|
595 |
|
|
x"3" when "101101",
|
596 |
|
|
x"2" when "101110",
|
597 |
|
|
x"f" when "101111",
|
598 |
|
|
x"d" when "110000",
|
599 |
|
|
x"8" when "110001",
|
600 |
|
|
x"a" when "110010",
|
601 |
|
|
x"1" when "110011",
|
602 |
|
|
x"3" when "110100",
|
603 |
|
|
x"f" when "110101",
|
604 |
|
|
x"4" when "110110",
|
605 |
|
|
x"2" when "110111",
|
606 |
|
|
x"b" when "111000",
|
607 |
|
|
x"6" when "111001",
|
608 |
|
|
x"7" when "111010",
|
609 |
|
|
x"c" when "111011",
|
610 |
|
|
x"0" when "111100",
|
611 |
|
|
x"5" when "111101",
|
612 |
|
|
x"e" when "111110",
|
613 |
|
|
x"9" when "111111",
|
614 |
|
|
"XXXX" when others;
|
615 |
|
|
|
616 |
|
|
with b3 select
|
617 |
|
|
s3 <= x"a" when "000000",
|
618 |
|
|
x"0" when "000001",
|
619 |
|
|
x"9" when "000010",
|
620 |
|
|
x"e" when "000011",
|
621 |
|
|
x"6" when "000100",
|
622 |
|
|
x"3" when "000101",
|
623 |
|
|
x"f" when "000110",
|
624 |
|
|
x"5" when "000111",
|
625 |
|
|
x"1" when "001000",
|
626 |
|
|
x"d" when "001001",
|
627 |
|
|
x"c" when "001010",
|
628 |
|
|
x"7" when "001011",
|
629 |
|
|
x"b" when "001100",
|
630 |
|
|
x"4" when "001101",
|
631 |
|
|
x"2" when "001110",
|
632 |
|
|
x"8" when "001111",
|
633 |
|
|
x"d" when "010000",
|
634 |
|
|
x"7" when "010001",
|
635 |
|
|
x"0" when "010010",
|
636 |
|
|
x"9" when "010011",
|
637 |
|
|
x"3" when "010100",
|
638 |
|
|
x"4" when "010101",
|
639 |
|
|
x"6" when "010110",
|
640 |
|
|
x"a" when "010111",
|
641 |
|
|
x"2" when "011000",
|
642 |
|
|
x"8" when "011001",
|
643 |
|
|
x"5" when "011010",
|
644 |
|
|
x"e" when "011011",
|
645 |
|
|
x"c" when "011100",
|
646 |
|
|
x"b" when "011101",
|
647 |
|
|
x"f" when "011110",
|
648 |
|
|
x"1" when "011111",
|
649 |
|
|
x"d" when "100000",
|
650 |
|
|
x"6" when "100001",
|
651 |
|
|
x"4" when "100010",
|
652 |
|
|
x"9" when "100011",
|
653 |
|
|
x"8" when "100100",
|
654 |
|
|
x"f" when "100101",
|
655 |
|
|
x"3" when "100110",
|
656 |
|
|
x"0" when "100111",
|
657 |
|
|
x"b" when "101000",
|
658 |
|
|
x"1" when "101001",
|
659 |
|
|
x"2" when "101010",
|
660 |
|
|
x"c" when "101011",
|
661 |
|
|
x"5" when "101100",
|
662 |
|
|
x"a" when "101101",
|
663 |
|
|
x"e" when "101110",
|
664 |
|
|
x"7" when "101111",
|
665 |
|
|
x"1" when "110000",
|
666 |
|
|
x"a" when "110001",
|
667 |
|
|
x"d" when "110010",
|
668 |
|
|
x"0" when "110011",
|
669 |
|
|
x"6" when "110100",
|
670 |
|
|
x"9" when "110101",
|
671 |
|
|
x"8" when "110110",
|
672 |
|
|
x"7" when "110111",
|
673 |
|
|
x"4" when "111000",
|
674 |
|
|
x"f" when "111001",
|
675 |
|
|
x"e" when "111010",
|
676 |
|
|
x"3" when "111011",
|
677 |
|
|
x"b" when "111100",
|
678 |
|
|
x"5" when "111101",
|
679 |
|
|
x"2" when "111110",
|
680 |
|
|
x"c" when "111111",
|
681 |
|
|
"XXXX" when others;
|
682 |
|
|
|
683 |
|
|
with b4 select
|
684 |
|
|
s4 <= x"7" when "000000",
|
685 |
|
|
x"d" when "000001",
|
686 |
|
|
x"e" when "000010",
|
687 |
|
|
x"3" when "000011",
|
688 |
|
|
x"0" when "000100",
|
689 |
|
|
x"6" when "000101",
|
690 |
|
|
x"9" when "000110",
|
691 |
|
|
x"a" when "000111",
|
692 |
|
|
x"1" when "001000",
|
693 |
|
|
x"2" when "001001",
|
694 |
|
|
x"8" when "001010",
|
695 |
|
|
x"5" when "001011",
|
696 |
|
|
x"b" when "001100",
|
697 |
|
|
x"c" when "001101",
|
698 |
|
|
x"4" when "001110",
|
699 |
|
|
x"f" when "001111",
|
700 |
|
|
x"d" when "010000",
|
701 |
|
|
x"8" when "010001",
|
702 |
|
|
x"b" when "010010",
|
703 |
|
|
x"5" when "010011",
|
704 |
|
|
x"6" when "010100",
|
705 |
|
|
x"f" when "010101",
|
706 |
|
|
x"0" when "010110",
|
707 |
|
|
x"3" when "010111",
|
708 |
|
|
x"4" when "011000",
|
709 |
|
|
x"7" when "011001",
|
710 |
|
|
x"2" when "011010",
|
711 |
|
|
x"c" when "011011",
|
712 |
|
|
x"1" when "011100",
|
713 |
|
|
x"a" when "011101",
|
714 |
|
|
x"e" when "011110",
|
715 |
|
|
x"9" when "011111",
|
716 |
|
|
x"a" when "100000",
|
717 |
|
|
x"6" when "100001",
|
718 |
|
|
x"9" when "100010",
|
719 |
|
|
x"0" when "100011",
|
720 |
|
|
x"c" when "100100",
|
721 |
|
|
x"b" when "100101",
|
722 |
|
|
x"7" when "100110",
|
723 |
|
|
x"d" when "100111",
|
724 |
|
|
x"f" when "101000",
|
725 |
|
|
x"1" when "101001",
|
726 |
|
|
x"3" when "101010",
|
727 |
|
|
x"e" when "101011",
|
728 |
|
|
x"5" when "101100",
|
729 |
|
|
x"2" when "101101",
|
730 |
|
|
x"8" when "101110",
|
731 |
|
|
x"4" when "101111",
|
732 |
|
|
x"3" when "110000",
|
733 |
|
|
x"f" when "110001",
|
734 |
|
|
x"0" when "110010",
|
735 |
|
|
x"6" when "110011",
|
736 |
|
|
x"a" when "110100",
|
737 |
|
|
x"1" when "110101",
|
738 |
|
|
x"d" when "110110",
|
739 |
|
|
x"8" when "110111",
|
740 |
|
|
x"9" when "111000",
|
741 |
|
|
x"4" when "111001",
|
742 |
|
|
x"5" when "111010",
|
743 |
|
|
x"b" when "111011",
|
744 |
|
|
x"c" when "111100",
|
745 |
|
|
x"7" when "111101",
|
746 |
|
|
x"2" when "111110",
|
747 |
|
|
x"e" when "111111",
|
748 |
|
|
"XXXX" when others;
|
749 |
|
|
|
750 |
|
|
with b5 select
|
751 |
|
|
s5 <= x"2" when "000000",
|
752 |
|
|
x"c" when "000001",
|
753 |
|
|
x"4" when "000010",
|
754 |
|
|
x"1" when "000011",
|
755 |
|
|
x"7" when "000100",
|
756 |
|
|
x"a" when "000101",
|
757 |
|
|
x"b" when "000110",
|
758 |
|
|
x"6" when "000111",
|
759 |
|
|
x"8" when "001000",
|
760 |
|
|
x"5" when "001001",
|
761 |
|
|
x"3" when "001010",
|
762 |
|
|
x"f" when "001011",
|
763 |
|
|
x"d" when "001100",
|
764 |
|
|
x"0" when "001101",
|
765 |
|
|
x"e" when "001110",
|
766 |
|
|
x"9" when "001111",
|
767 |
|
|
x"e" when "010000",
|
768 |
|
|
x"b" when "010001",
|
769 |
|
|
x"2" when "010010",
|
770 |
|
|
x"c" when "010011",
|
771 |
|
|
x"4" when "010100",
|
772 |
|
|
x"7" when "010101",
|
773 |
|
|
x"d" when "010110",
|
774 |
|
|
x"1" when "010111",
|
775 |
|
|
x"5" when "011000",
|
776 |
|
|
x"0" when "011001",
|
777 |
|
|
x"f" when "011010",
|
778 |
|
|
x"a" when "011011",
|
779 |
|
|
x"3" when "011100",
|
780 |
|
|
x"9" when "011101",
|
781 |
|
|
x"8" when "011110",
|
782 |
|
|
x"6" when "011111",
|
783 |
|
|
x"4" when "100000",
|
784 |
|
|
x"2" when "100001",
|
785 |
|
|
x"1" when "100010",
|
786 |
|
|
x"b" when "100011",
|
787 |
|
|
x"a" when "100100",
|
788 |
|
|
x"d" when "100101",
|
789 |
|
|
x"7" when "100110",
|
790 |
|
|
x"8" when "100111",
|
791 |
|
|
x"f" when "101000",
|
792 |
|
|
x"9" when "101001",
|
793 |
|
|
x"c" when "101010",
|
794 |
|
|
x"5" when "101011",
|
795 |
|
|
x"6" when "101100",
|
796 |
|
|
x"3" when "101101",
|
797 |
|
|
x"0" when "101110",
|
798 |
|
|
x"e" when "101111",
|
799 |
|
|
x"b" when "110000",
|
800 |
|
|
x"8" when "110001",
|
801 |
|
|
x"c" when "110010",
|
802 |
|
|
x"7" when "110011",
|
803 |
|
|
x"1" when "110100",
|
804 |
|
|
x"e" when "110101",
|
805 |
|
|
x"2" when "110110",
|
806 |
|
|
x"d" when "110111",
|
807 |
|
|
x"6" when "111000",
|
808 |
|
|
x"f" when "111001",
|
809 |
|
|
x"0" when "111010",
|
810 |
|
|
x"9" when "111011",
|
811 |
|
|
x"a" when "111100",
|
812 |
|
|
x"4" when "111101",
|
813 |
|
|
x"5" when "111110",
|
814 |
|
|
x"3" when "111111",
|
815 |
|
|
"XXXX" when others;
|
816 |
|
|
|
817 |
|
|
with b6 select
|
818 |
|
|
s6 <= x"c" when "000000",
|
819 |
|
|
x"1" when "000001",
|
820 |
|
|
x"a" when "000010",
|
821 |
|
|
x"f" when "000011",
|
822 |
|
|
x"9" when "000100",
|
823 |
|
|
x"2" when "000101",
|
824 |
|
|
x"6" when "000110",
|
825 |
|
|
x"8" when "000111",
|
826 |
|
|
x"0" when "001000",
|
827 |
|
|
x"d" when "001001",
|
828 |
|
|
x"3" when "001010",
|
829 |
|
|
x"4" when "001011",
|
830 |
|
|
x"e" when "001100",
|
831 |
|
|
x"7" when "001101",
|
832 |
|
|
x"5" when "001110",
|
833 |
|
|
x"b" when "001111",
|
834 |
|
|
x"a" when "010000",
|
835 |
|
|
x"f" when "010001",
|
836 |
|
|
x"4" when "010010",
|
837 |
|
|
x"2" when "010011",
|
838 |
|
|
x"7" when "010100",
|
839 |
|
|
x"c" when "010101",
|
840 |
|
|
x"9" when "010110",
|
841 |
|
|
x"5" when "010111",
|
842 |
|
|
x"6" when "011000",
|
843 |
|
|
x"1" when "011001",
|
844 |
|
|
x"d" when "011010",
|
845 |
|
|
x"e" when "011011",
|
846 |
|
|
x"0" when "011100",
|
847 |
|
|
x"b" when "011101",
|
848 |
|
|
x"3" when "011110",
|
849 |
|
|
x"8" when "011111",
|
850 |
|
|
x"9" when "100000",
|
851 |
|
|
x"e" when "100001",
|
852 |
|
|
x"f" when "100010",
|
853 |
|
|
x"5" when "100011",
|
854 |
|
|
x"2" when "100100",
|
855 |
|
|
x"8" when "100101",
|
856 |
|
|
x"c" when "100110",
|
857 |
|
|
x"3" when "100111",
|
858 |
|
|
x"7" when "101000",
|
859 |
|
|
x"0" when "101001",
|
860 |
|
|
x"4" when "101010",
|
861 |
|
|
x"a" when "101011",
|
862 |
|
|
x"1" when "101100",
|
863 |
|
|
x"d" when "101101",
|
864 |
|
|
x"b" when "101110",
|
865 |
|
|
x"6" when "101111",
|
866 |
|
|
x"4" when "110000",
|
867 |
|
|
x"3" when "110001",
|
868 |
|
|
x"2" when "110010",
|
869 |
|
|
x"c" when "110011",
|
870 |
|
|
x"9" when "110100",
|
871 |
|
|
x"5" when "110101",
|
872 |
|
|
x"f" when "110110",
|
873 |
|
|
x"a" when "110111",
|
874 |
|
|
x"b" when "111000",
|
875 |
|
|
x"e" when "111001",
|
876 |
|
|
x"1" when "111010",
|
877 |
|
|
x"7" when "111011",
|
878 |
|
|
x"6" when "111100",
|
879 |
|
|
x"0" when "111101",
|
880 |
|
|
x"8" when "111110",
|
881 |
|
|
x"d" when "111111",
|
882 |
|
|
"XXXX" when others;
|
883 |
|
|
|
884 |
|
|
with b7 select
|
885 |
|
|
s7 <= x"4" when "000000",
|
886 |
|
|
x"b" when "000001",
|
887 |
|
|
x"2" when "000010",
|
888 |
|
|
x"e" when "000011",
|
889 |
|
|
x"f" when "000100",
|
890 |
|
|
x"0" when "000101",
|
891 |
|
|
x"8" when "000110",
|
892 |
|
|
x"d" when "000111",
|
893 |
|
|
x"3" when "001000",
|
894 |
|
|
x"c" when "001001",
|
895 |
|
|
x"9" when "001010",
|
896 |
|
|
x"7" when "001011",
|
897 |
|
|
x"5" when "001100",
|
898 |
|
|
x"a" when "001101",
|
899 |
|
|
x"6" when "001110",
|
900 |
|
|
x"1" when "001111",
|
901 |
|
|
x"d" when "010000",
|
902 |
|
|
x"0" when "010001",
|
903 |
|
|
x"b" when "010010",
|
904 |
|
|
x"7" when "010011",
|
905 |
|
|
x"4" when "010100",
|
906 |
|
|
x"9" when "010101",
|
907 |
|
|
x"1" when "010110",
|
908 |
|
|
x"a" when "010111",
|
909 |
|
|
x"e" when "011000",
|
910 |
|
|
x"3" when "011001",
|
911 |
|
|
x"5" when "011010",
|
912 |
|
|
x"c" when "011011",
|
913 |
|
|
x"2" when "011100",
|
914 |
|
|
x"f" when "011101",
|
915 |
|
|
x"8" when "011110",
|
916 |
|
|
x"6" when "011111",
|
917 |
|
|
x"1" when "100000",
|
918 |
|
|
x"4" when "100001",
|
919 |
|
|
x"b" when "100010",
|
920 |
|
|
x"d" when "100011",
|
921 |
|
|
x"c" when "100100",
|
922 |
|
|
x"3" when "100101",
|
923 |
|
|
x"7" when "100110",
|
924 |
|
|
x"e" when "100111",
|
925 |
|
|
x"a" when "101000",
|
926 |
|
|
x"f" when "101001",
|
927 |
|
|
x"6" when "101010",
|
928 |
|
|
x"8" when "101011",
|
929 |
|
|
x"0" when "101100",
|
930 |
|
|
x"5" when "101101",
|
931 |
|
|
x"9" when "101110",
|
932 |
|
|
x"2" when "101111",
|
933 |
|
|
x"6" when "110000",
|
934 |
|
|
x"b" when "110001",
|
935 |
|
|
x"d" when "110010",
|
936 |
|
|
x"8" when "110011",
|
937 |
|
|
x"1" when "110100",
|
938 |
|
|
x"4" when "110101",
|
939 |
|
|
x"a" when "110110",
|
940 |
|
|
x"7" when "110111",
|
941 |
|
|
x"9" when "111000",
|
942 |
|
|
x"5" when "111001",
|
943 |
|
|
x"0" when "111010",
|
944 |
|
|
x"f" when "111011",
|
945 |
|
|
x"e" when "111100",
|
946 |
|
|
x"2" when "111101",
|
947 |
|
|
x"3" when "111110",
|
948 |
|
|
x"c" when "111111",
|
949 |
|
|
"XXXX" when others;
|
950 |
|
|
|
951 |
|
|
with b8 select
|
952 |
|
|
s8 <= x"d" when "000000",
|
953 |
|
|
x"2" when "000001",
|
954 |
|
|
x"8" when "000010",
|
955 |
|
|
x"4" when "000011",
|
956 |
|
|
x"6" when "000100",
|
957 |
|
|
x"f" when "000101",
|
958 |
|
|
x"b" when "000110",
|
959 |
|
|
x"1" when "000111",
|
960 |
|
|
x"a" when "001000",
|
961 |
|
|
x"9" when "001001",
|
962 |
|
|
x"3" when "001010",
|
963 |
|
|
x"e" when "001011",
|
964 |
|
|
x"5" when "001100",
|
965 |
|
|
x"0" when "001101",
|
966 |
|
|
x"c" when "001110",
|
967 |
|
|
x"7" when "001111",
|
968 |
|
|
x"1" when "010000",
|
969 |
|
|
x"f" when "010001",
|
970 |
|
|
x"d" when "010010",
|
971 |
|
|
x"8" when "010011",
|
972 |
|
|
x"a" when "010100",
|
973 |
|
|
x"3" when "010101",
|
974 |
|
|
x"7" when "010110",
|
975 |
|
|
x"4" when "010111",
|
976 |
|
|
x"c" when "011000",
|
977 |
|
|
x"5" when "011001",
|
978 |
|
|
x"6" when "011010",
|
979 |
|
|
x"b" when "011011",
|
980 |
|
|
x"0" when "011100",
|
981 |
|
|
x"e" when "011101",
|
982 |
|
|
x"9" when "011110",
|
983 |
|
|
x"2" when "011111",
|
984 |
|
|
x"7" when "100000",
|
985 |
|
|
x"b" when "100001",
|
986 |
|
|
x"4" when "100010",
|
987 |
|
|
x"1" when "100011",
|
988 |
|
|
x"9" when "100100",
|
989 |
|
|
x"c" when "100101",
|
990 |
|
|
x"e" when "100110",
|
991 |
|
|
x"2" when "100111",
|
992 |
|
|
x"0" when "101000",
|
993 |
|
|
x"6" when "101001",
|
994 |
|
|
x"a" when "101010",
|
995 |
|
|
x"d" when "101011",
|
996 |
|
|
x"f" when "101100",
|
997 |
|
|
x"3" when "101101",
|
998 |
|
|
x"5" when "101110",
|
999 |
|
|
x"8" when "101111",
|
1000 |
|
|
x"2" when "110000",
|
1001 |
|
|
x"1" when "110001",
|
1002 |
|
|
x"e" when "110010",
|
1003 |
|
|
x"7" when "110011",
|
1004 |
|
|
x"4" when "110100",
|
1005 |
|
|
x"a" when "110101",
|
1006 |
|
|
x"8" when "110110",
|
1007 |
|
|
x"d" when "110111",
|
1008 |
|
|
x"f" when "111000",
|
1009 |
|
|
x"c" when "111001",
|
1010 |
|
|
x"9" when "111010",
|
1011 |
|
|
x"0" when "111011",
|
1012 |
|
|
x"3" when "111100",
|
1013 |
|
|
x"5" when "111101",
|
1014 |
|
|
x"6" when "111110",
|
1015 |
|
|
x"b" when "111111",
|
1016 |
|
|
"XXXX" when others;
|
1017 |
|
|
|
1018 |
|
|
|
1019 |
|
|
-- Munge the S Boxes, then mix with the other 32 bits of the message word
|
1020 |
|
|
outmsg(32 to 63) <= (s4(3) & s2(2) & s5(3) & s6(0) & s8(0) & s3(3) & s7(3) & s5(0) &
|
1021 |
|
|
s1(0) & s4(2) & s6(2) & s7(1) & s2(0) & s5(1) & s8(2) & s3(1) &
|
1022 |
|
|
s1(1) & s2(3) & s6(3) & s4(1) & s8(3) & s7(2) & s1(2) & s3(0) &
|
1023 |
|
|
s5(2) & s4(0) & s8(1) & s2(1) & s6(1) & s3(2) & s1(3) & s7(0)) xor inmsg(0 to 31);
|
1024 |
|
|
|
1025 |
|
|
-- the first 32 bits of the round output are the last 32 bits of the round input.
|
1026 |
|
|
outmsg(0 to 31) <= inmsg(32 to 63);
|
1027 |
|
|
|
1028 |
|
|
end des;
|
1029 |
4 |
srmcqueen |
|