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URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

Subversion Repositories RISCMCU

[/] [RISCMCU/] [trunk/] [asm/] [riscmcu.inc] - Blame information for rev 28

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Line No. Rev Author Line
1 18 yapzihe
 
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;***** I/O Register Definitions
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.equ    SREG    =$3f
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.equ    GIMSK   =$3b
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.equ    TIMSK   =$39
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.equ    TIFR    =$38
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.equ    MCUCR   =$35
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.equ    TCCR0   =$33
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.equ    TCNT0   =$32
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.equ    PORTB   =$18
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.equ    DDRB    =$17
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.equ    PINB    =$16
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.equ    PORTC   =$15
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.equ    DDRC    =$14
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.equ    PINC    =$13
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.equ    PORTD   =$12
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.equ    DDRD    =$11
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.equ    PIND    =$10
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;***** Bit Definitions
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.equ    INT0    =6
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.equ    TOIE0   =1
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.equ    TOV0    =1
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.equ    ISC01   =1
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.equ    ISC00   =0
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.equ    CS02    =2
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.equ    CS01    =1
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.equ    CS00    =0
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.def    ZP      =r30
39
 

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