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URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

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[/] [RISCMCU/] [trunk/] [asm/] [simple_calculator.asm] - Blame information for rev 28

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1 9 yapzihe
.include "riscmcu.inc"
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3
.def    key = r16
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.def    temp = r17
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.def    B = r18
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.def    C = r19
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.def    addsub = r24
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.def    counter = r25
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.def    tcount = r26
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.def    led = r27
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.cseg
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        rjmp    reset
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        rjmp    extint
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        rjmp    timer
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extint:
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        clr     B
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        clr     C
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        clr     addsub
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        out     portb,c
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        reti
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timer:
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        in      temp,sreg
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        inc     tcount
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        cpi     tcount,24
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        brne    tback
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        clr     tcount
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        cpi     led,0b10000
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        brne    t4
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        ldi     led,0b0001
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t4:     com     led
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        out     portc,led
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        com     led
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        lsl     led
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        out     sreg,temp
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tback:  reti
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reset:
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        clr     B
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        clr     C
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        clr     addsub
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        ldi     counter,3
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        ldi     led,0b0001
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        ldi     temp,0b11110000
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        out     ddrd,temp
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        ser     temp
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        out     ddrb,temp       ; PORT B as output
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        out     ddrc,temp       ; PORT C as output
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        out     portc,temp      ; PORT C leds OFF
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        out     portd,temp      ; PORT D output HI
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        out     gimsk,temp      ; Enable external interrupt
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        out     timsk,temp      ; Enable Timer interrupt
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        ldi     temp,5
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        out     tccr0,temp      ; timer clock source = divide by 1024
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        rcall   ldtable
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        sei
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;*************************************************
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; Detect Keys
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rescan: rcall   sdelay
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        sbi     portd,6
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        cbi     portd,4
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        ldi     zp,table
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        in      key,pind
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        cbr     key,$F0
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        cpi     key,$0F
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        brne    press
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        sbi     portd,4
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        cbi     portd,5
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        ldi     zp,table+1
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        in      key,pind
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        cbr     key,$F0
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        cpi     key,$0F
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        brne    press
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        sbi     portd,5
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        cbi     portd,6
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        ldi     zp,table+2
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        in      key,pind
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        cbr     key,$F0
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        cpi     key,$0F
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        brne    press
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        rjmp    rescan
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press:
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        rcall   sdelay
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        in      temp,pind
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        cbr     temp,$F0
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        cpse    key,temp
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        rjmp    rescan
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        sbrs    key,1
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        subi    zp,-3
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        sbrs    key,2
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        subi    zp,-6
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        sbrs    key,3
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        subi    zp,-9
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        ld      key,Z
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;*************************************************
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; Operation
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        cpi     key,$A
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        breq    addkey
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        cpi     key,$B
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        breq    subkey
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        swap    B
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        cbr     B,$0f
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        add     B,key
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        out     portb,B
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        rjmp    holding
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addkey:
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        cbr     addsub,$01
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        rjmp    arith
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subkey:
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        sbr     addsub,$01
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arith:
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        swap    addsub
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        sbrc    addsub,0
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        rjmp    subf
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        rcall   BCDadd
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        out     portb,C
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        rcall   overflow
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        clr     B
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        rjmp    holding
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subf:
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        rcall   BCDsub
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        out     portb,C
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        rcall   overflow
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        clr     B
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        rjmp    holding
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;*************************************************
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; Key press released ?
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holding:
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        rcall   sdelay
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        in      key,pind
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        cbr     key,$F0
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        ldi     temp,$0F
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        cpse    key,temp
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        rjmp    holding
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        rjmp    rescan
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;*************************************************
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; overflow ?
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overflow:
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        sbrs    b,0
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        ret
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        cli
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        sbi     ddrd,7
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        cbi     portd,7
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        rcall   delay
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        sbi     portd,7
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        cbi     ddrd,7
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        sei
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        ret
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;*************************************************
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; Short Delay
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sdelay:
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        clr     temp
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s10:    dec     temp
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        brne    s10
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        ret
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;*************************************************
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; Load Table
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ldtable:
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        ldi     ZP,table
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        ldi     temp,1
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        st      Z+,temp
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        ldi     temp,2
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        st      Z+,temp
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        ldi     temp,3
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        st      Z+,temp
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        ldi     temp,4
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        st      Z+,temp
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        ldi     temp,5
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        st      Z+,temp
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        ldi     temp,6
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        st      Z+,temp
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        ldi     temp,7
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        st      Z+,temp
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        ldi     temp,8
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        st      Z+,temp
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        ldi     temp,9
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        st      Z+,temp
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        ldi     temp,$B
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        st      Z+,temp
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        ldi     temp,0
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        st      Z+,temp
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        ldi     temp,$A
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        st      Z+,temp
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        ret
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;*******************************************
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delay:
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del:    ldi     ZP,count
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        ld      temp,Z
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        dec     temp
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        st      Z,temp
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        brne    del
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        ldi     ZP,count+1
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        ld      temp,Z
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        dec     temp
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        st      Z,temp
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        brne    del
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        dec     counter
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        brne    del
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        ldi     counter,3
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        ret
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;***** Subroutine Register Variables
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.def    BCD1    =r19            ;BCD input value #1
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.def    BCD2    =r18            ;BCD input value #2
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.def    tmpadd  =r16            ;temporary register
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;***** Code
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BCDadd:
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        ldi     tmpadd,6        ;value to be added later
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        add     BCD1,BCD2       ;add the numbers binary
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        clr     BCD2            ;clear BCD carry
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        brcc    add_0           ;if carry not clear
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        ldi     BCD2,1          ;    set BCD carry
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add_0:  brhs    add_1           ;if half carry not set
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        add     BCD1,tmpadd     ;    add 6 to LSD
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        brhs    add_2           ;    if half carry not set (LSD <= 9)
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        subi    BCD1,6          ;        restore value
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        rjmp    add_2           ;else
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add_1:  add     BCD1,tmpadd     ;    add 6 to LSD
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add_2:  swap    tmpadd
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        add     BCD1,tmpadd     ;add 6 to MSD
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        brcs    add_4           ;if carry not set (MSD <= 9)
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        sbrs    BCD2,0          ;    if previous carry not set
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        subi    BCD1,$60        ;       restore value
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add_3:  ret                     ;else
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add_4:  ldi     BCD2,1          ;    set BCD carry
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        ret
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;***** Subroutine Register Variables
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.def    BCDa    =r19            ;BCD input value #1
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.def    BCDb    =r18            ;BCD input value #2
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;***** Code
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BCDsub:
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        sub     BCDa,BCDb       ;subtract the numbers binary
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        clr     BCDb
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        brcc    sub_0           ;if carry not clear
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        ldi     BCDb,1          ;    store carry in BCDB1, bit 0
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sub_0:  brhc    sub_1           ;if half carry not clear
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        subi    BCDa,$06        ;    LSD = LSD - 6
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sub_1:  sbrs    BCDb,0          ;if previous carry not set
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        ret                     ;    return
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        subi    BCDa,$60        ;subtract 6 from MSD
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        ldi     BCDb,1          ;set underflow carry
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        brcc    sub_2           ;if carry not clear
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        ldi     BCDb,1          ;    clear underflow carry
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sub_2:  ret
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.dseg
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table:  .byte   12
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count:  .byte   2

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