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*
** FLEX 9 DISK DRIVERS
*
* FOR SYS09BUG ON THE DIGILENT SPARTAN 3 STARTER BOARD
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE DIGILENT SPARTAN 3 STARTER BOARD HAS 1MBYTE OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 128K IS USED AS A ROM DISK
* THE REMAINING RAM IS USED FOR A RAM DISK
*
*
CFLAG   EQU $01     CARRY FLAG
VFLAG   EQU $02     OVERFLOW FLAG
ZFLAG   EQU $04     ZERO FLAG
NFLAG   EQU $08     NEGATIVE FLAG
IFLAG   EQU $10     IRQ MASK CC
HFLAG   EQU $20     HALF CARRY
FFLAG   EQU $40     FIRQ MASK CC
EFLAG   EQU $80     ENTIRE FLAG
*
MAPPAG  EQU $00     PAGE $0000 DAT ADDRESS
*
* Serial Port
*
ACIAS   EQU $E000
ACIAC1  EQU ACIAS
ACIAD1  EQU ACIAS+1
DELCON  EQU 1250    Delay (Processor clock in MHz * 50)
*
* XMODEM Control characters
*
SOH     EQU $01
EOT     EQU $04
ACK     EQU $06
NAK     EQU $15
CAN     EQU $18
*
* Some dummy Constants
*
RMAXTRK EQU 64
RMAXSEC EQU 255
RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC
*
* Start
*
        ORG $0100
START   LBSR  UFSUB
        JMP  [$F800]  Jump to monitor on Completion.
*
*
* RAM SPACE
*
DRVNUM  FCB  0
TRACK   FCB  0
SECTOR  FCB  0
CHKSUM  FCB  0
BLKNUM  FCB  0 Xmodem block number
BYTCNT  FCB  0 Xmodem byte count
XSTATE  FDB  0 Xmodem State Vector
DELCNT  FCB  $00,$00,$00 Xmodem Poll timer
MAXTRK  FCB  0
MAXSEC  FCB  0
        ORG  $0200
*
* SECTOR BUFFER
*
BUFFER  RMB  256
*
*
* recieve char from remote drive.
* timeout if no response for approx 1s.
* Entry: no parameters
* Exit:  (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
RCHAR   PSHS    X,Y
*
        LDX     #1000         1000x inner loop
RCHAR1  LDY     #DELCON       delay constant for inner loop (approx 1ms).
RCHAR2  LDA     ACIAC1        test for recieved char
        ASRA
        BCS     RCHAR3        get character
        LEAY    -1,Y          else, continue to count delay
        BNE     RCHAR2
        LEAX    -1,X
        BNE     RCHAR1
        PULS    X,Y,PC        return with error if timed out
*
RCHAR3  LDA     ACIAD1        return data (carry bit still set)
        PULS    X,Y,PC
*
*
* transmit char to remote drive.
* timeout if no response for approx 1s. (allows for use of hardware flow control)
* Entry: (A) = char to transmit
* Exit:  (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
SCHAR   PSHS    X,Y
        PSHS    A
*
        LDX     #1000         1000x inner loop
SCHAR1  LDY     #DELCON       delay constant for inner loop (approx 1ms).
SCHAR2  LDA     ACIAC1        test for space in transmit FIFO
        ASRA
        ASRA
        BCS     SCHAR3        send character
        LEAY    -1,Y          else, continue to count delay
        BNE     SCHAR2
        LEAX    -1,X
        BNE     SCHAR1
        PULS    A
        PULS    X,Y,PC        return with error if timed out
*
SCHAR3  PULS    A
        STA     ACIAD1        send data (carry bit still set)
        PULS    X,Y,PC
*
** 'UF' Format IDE Drive to FLEX standard.
*
DISFOS  FCB $0A,$0D
        FCC 'Formating IDE disk... '
        FCB $0A,$0D
        FCC 'Drive Number ?'
        FCB 4
MESS6   FCB $0A,$0D,4
        FCC 'IDE drive not allocated! '
        FCB 4
UFMSG1  FCB $0A,$0D
        FCC 'Format Complete'
        FCB 4
*
UFSUB   JSR  INITDR
        LDX #DISFOS
        JSR PDATA1
UFSUB1  LBSR RCHAR
        BCC  UFSUB1
        LBSR SCHAR
        CMPA #'0'
        LBLO UFEXIT
        CMPA #'3'
        LBHI  UFEXIT
        SUBA #'0'
        TFR  A,B
        STB DRVNUM
        LDX #DRVNUM-3
        JSR DRVSEL
*
* set up free chain
*
        LDX #BUFFER clear out buffer
        CLRA
        CLRB
DFL1    STA 0,X+
        DECB
        BNE DFL1
*
        CLR TRACK
        LDA #1
        STA SECTOR
DFL2    LDX #BUFFER
        LDA TRACK
        STA 0,X
        LDA SECTOR
        INCA
        CMPA #RMAXSEC+1 last sector on track?
        BNE DFL3
        INC 0,X
        LDA #1
DFL3    STA 1,X
        LDA TRACK
        LDB SECTOR
        JSR WRITSC
        INC SECTOR
        LDA SECTOR
        CMPA #RMAXSEC+1
        BNE DFL2
        LDA #1
        STA  SECTOR
        INC TRACK
        LDA TRACK
        CMPA #RMAXTRK
        BNE DFL2
* break free chain at last track/sector
        LDX  #BUFFER
        LDA  #RMAXTRK-1
        LDB  #RMAXSEC
        JSR  READSC
        LDX  #BUFFER
        CLR  0,X
        CLR  1,X
        LDA  #RMAXTRK-1
        LDB  #RMAXSEC
        JSR  WRITSC
* set up sector structure, SIR, directory etc
        LDX  #BUFFER
        CLRA
        LDB  #RMAXSEC
        JSR  READSC
        LDX  #BUFFER
        CLR  0,X break end of directory chain
        CLR  1,X
        CLRA
        LDB  #RMAXSEC
        JSR  WRITSC
*
        LDX  #BUFFER
        CLRA
        LDB  #3 set up SIR
        JSR  READSC
        LDX  #BUFFER
        CLR  0,X break forward link
        CLR  1,X
        LDD  #$5241 set volume name (RAMDISK )
        STD  16,X
        LDD  #$4D44
        STD  18,X
        LDD  #$4953
        STD  20,X
        LDD  #$4B20
        STD  22,X
        LDD  #1 volume number
        STD  27,X
        LDD  #$0101 first trk/sec  01-01
        STD  29,X
        LDA  #RMAXTRK-1
        LDB  #RMAXSEC
        STD  31,X
        STD  38,X
        LDD  #RTOTSEC total DATA sectors (2912-14)
        STD  33,X
*
        LDA #01 month   set default creation date (SYS09's birthday!)
        STA 35,X
        LDA #07 day
        STA 36,X
        LDA #07 year
        STA 37,X
*
RF3     CLRA
        LDB  #3
        JSR  WRITSC
*
* Not sure what this is about
* put bootstrap on track 0 sector 1
*
*        LDX #BUFFER
*        CLRA
*        LDB #1
*        JSR READSC
*        LDX #BUFFER
*        LDA #$AA set the init flag
*        STA 0,X
*        LDA  #$55
*        STA 1,X
*        CLRA
*        LDB #1
*        JSR WRITSC
*
*  Write Boot sector
*
        LDX  #$C000
        CLRA         TRACK 0
        LDB  #$01    SECTOR 1
        STA  TRACK
        STB  SECTOR
        LBSR WRITSC
*
UFEXIT  LDX #UFMSG1
        JMP PDATA1
*
* Read a byte from the serial port
*
LRBYTE  PSHS B
        BSR  LRHEX                  Get hex digit.
        ASLA
        ASLA                           Shift to msb.
        ASLA
        ASLA
        TFR  A,B                    Save in B.
        BSR  LRHEX                  Get next digit.
        PSHS B
        ADDA 0,S+                    Add together bytes.
        PULS B,PC
*
LRHEX   JSR  INTER
        BVS  LRHEX
        SUBA #$30                   Remove ascii bias.
        BMI  LRHEX
        CMPA #$09                   Number?
        BLE  LRHEX1                 Yes.
        CMPA #$11                   Keep testing.
        BMI  LRHEX
        CMPA #$16
        BGT  LRHEX
        SUBA #$07
LRHEX1  RTS
*
* ACIA INPUT TEST
*
INTEST  LDA ACIAC1
        BITA #$01
        RTS
*
* RESET ACIA
*
ACIRST  LDA #$03 master reset
        STA  ACIAC1
        LDA #$11
        STA ACIAC1
        RTS
*
* ACIA INPUT
*
INTER   LDA  #16
        STA  DELCNT+0
        CLR  DELCNT+1
        CLR  DELCNT+2
INTER0  LDA  ACIAC1
        BITA #$01
        BNE  INTER1
        BITA #$78
        BEQ  INTER2
        BSR  ACIRST
        BRA  INTER
*
INTER1  LDA  ACIAD1
        ANDCC #VFLAG
        RTS
*
INTER2  DEC  DELCNT+2
        BNE  INTER0
        DEC  DELCNT+1
        BNE  INTER0
        DEC  DELCNT+0
        BNE  INTER0
        CLRA
        ORCC #VFLAG
        RTS
*
* ACIA OUTPUT
*
OUTTER  PSHS A
*
OUTTE1  LDA ACIAC1
        BITA #$02
        BNE  OUTTE2
        BITA #$78
        BEQ  OUTTE1
        BSR  ACIRST
        BRA  OUTTE1
*
OUTTE2  PULS A
        STA ACIAD1
        RTS
*
* Print Data
*
PDATA0  BSR  OUTTER
PDATA1  LDA  ,X+
        CMPA #$04
        BNE  PDATA0
        RTS
*
** FLEX 9 IDE DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE XSA-3S1000
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
*
*
IMASK  EQU $10     IRQ MASK CC
FMASK  EQU $40     FIRQ MASK CC
*
CF_BASE    EQU $E100
CF_DATA    EQU CF_BASE+0
CF_ERROR   EQU CF_BASE+2 ; read error
CF_FEATURE EQU CF_BASE+2 ; write feature
CF_SCNT    EQU CF_BASE+4
CF_SNUM    EQU CF_BASE+6
CF_CLO     EQU CF_BASE+8
CF_CHI     EQU CF_BASE+10
CF_HEAD    EQU CF_BASE+12
CF_STATUS  EQU CF_BASE+14 ; read status
CF_COMAND  EQU CF_BASE+14 ; write command
CF_AUX     EQU CF_BASE+30
*
* Command Equates
*
CMDREAD    EQU $20 ; Read Single sector
CMDWRITE   EQU $30 ; Write Single sector
AUXRESET   EQU $06
AUXRSTREL  EQU $02
HEADLBA    EQU $E0
*
* Status bit equates
*
BSY        EQU $80
DRDY       EQU $40
DRQ        EQU $08
ERR        EQU $01
*
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
INITDR LDD #AUXRESET
       STD CF_AUX
       LDD #AUXRSTREL
       STD CF_AUX
       LDD  #HEADLBA
       STD  CF_HEAD
       BRA WAITRDY
*
* RESTORE DISK DRIVER (SEEK TRACK 00)
*
RESTR1 BSR   DRVSEL
       CLRA           ; Track 0
       LDB   #$01     ; Sector 1
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEKTS PSHS A
       CLRA
       DECB
       STD  CF_SNUM
       LDB ,S
       STD  CF_CLO
       LDB  DRVNUM
       STD  CF_CHI
       LDB  #$01
       STD  CF_SCNT
       CLRB
       PULS A,PC
*
* READ SECTORS FROM CF
*
*
READSC BSR  SEEKTS
       LDD  #CMDREAD ; IDE READ MULTIPLE
       STD  CF_COMAND
       BSR  WAITRDY
*
* READ LOOP
*
       PSHS Y
       LDY #256
RDLP1  BSR  WAITDRQ
       LDD  CF_DATA
       STB  ,X+
       LEAY -1,Y
       BNE  RDLP1
       PULS Y
*
       BSR  WAITRDY
       CLRB
       RTS
*
* WRITE SECTOR TO CF
*
WRITSC BSR  SEEKTS   ; SEEK TRACK & SECTOR
       LDD  #CMDWRITE ; IDE WRITE MULTIPLE
       STD  CF_COMAND
       BSR  WAITRDY
*
* WRITE LOOP
*
       PSHS Y
       LDY #256
       CLRA
WRTLP1 BSR  WAITDRQ
       LDB  ,X+
       STD  CF_DATA
       LEAY -1,Y
       BNE  WRTLP1
       PULS Y
*
       BSR  WAITRDY
       CLRB
       RTS
*
* CHECK FOR BUSY
* Doubles as VERIFY
*
BUSY   CLRB            Never busy
       RTS
*
* DRIVE SELECT DISK DRIVER
*
DRVSEL LDA   3,X       GET DRIVE # FROM FCB
       CMPA  #3
       BLS   DRVS2     IF > 3, SET IT TO 0
       CLRA
DRVS2  STA   DRVNUM
       CLRB            ; SET Z, CLEAR C
       RTS
*
* CHECK DRIVE READY DISK DRIVER
*
CHKDRV LDA  3,X
       CLRB             ; CLEAR C, SET Z
       RTS
*
* WAIT UNTIL READY
*
WAITRDY LDD  CF_STATUS
        BITB #BSY
        BNE  WAITRDY
        LDD  CF_STATUS
        BITB #DRDY
        BEQ  WAITRDY
        RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDD  CF_STATUS
        BITB #DRQ
        BEQ  WAITDRQ
        RTS
*
*******************************************************
*
* Bootstrap FLEX Loader
*
* SBUG1.8 loads the bootstap loader at $C000
* however the Flex adaption manual has the
* bootstrap loader residing at $C100
*
******************************************************
*
* Equates
*
STACK   EQU $C0FF
SCTBUF  EQU $C300
*
* Start of Utility
*
        ORG $C000
BOOT    BRA LOAD0
        FCB 0,0,0
TRK     FCB 0        File start track
SCT     FCB 0        File start sector
DNS     FCB 0        Density Flag (not used)
TADR    FDB $C000    Transfer address
LADR    FDB 0        Load Address
DRNUM   FCB 0        Drive number 0
*
LOAD0   LDS  #STACK   Set up stack
        LDD  TRK      Set up start track and sector
        STD  SCTBUF
        LDY  #SCTBUF+256
*
* Perform actual file load
*
LOAD1   BSR GETCH    Get acharcater
        CMPA #$02    Data record hearder ?
        BEQ  LOAD2   Skip, is so
        CMPA #$16    Xfr address hearder ?
        BNE LOAD1    Loop if neither
*
* Get transfer address
*
        BSR  GETCH
        STA  TADR
        BSR  GETCH
        STA  TADR+1
        BRA  LOAD1
*
* Load data record
*
LOAD2  BSR  GETCH  Get load address
       STA  LADR
       BSR  GETCH
       STA  LADR+1
       BSR  GETCH  Get Bytes count
       TFR  A,B
       TSTB
       BEQ  LOAD1 Loop if count = 0
       LDX  LADR  Get load address
LOAD3  PSHS B,X
       BSR  GETCH  Get data character
       PULS B,X
       STA  ,X+    Store at load address
       DECB
       BNE  LOAD3  Loop until count = 0
       BRA  LOAD1
*
* Get Character routine
* Reads a sector if needed
*
GETCH  CMPY #SCTBUF+256 out of data ?
       BNE  GETCH4      Go read Character if not
GETCH2 LDX  #SCTBUF     Point to buffer
       LDD  0,X         Get forward Link
       BEQ  GO          if zero, file is loaded
       BSR  READ        Read next sector
       BNE  BOOT        start over if error
       LDY  #SCTBUF+4   Point past link
GETCH4 LDA  ,Y+         Else, get a character
       RTS
*
* File is loaded, Jump to it
*
GO     JMP  [TADR]      Jump to transfer address
 
*
** FLEX 9 IDE DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE XSA-3S1000
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
*
*IMASK  EQU $10     IRQ MASK CC
*FMASK  EQU $40     FIRQ MASK CC
*
*CF_BASE    EQU $E100
*CF_DATA    EQU CF_BASE+0
*CF_ERROR   EQU CF_BASE+2 ; read error
*CF_FEATURE EQU CF_BASE+2 ; write feature
*CF_SCNT  EQU CF_BASE+4
*CF_SNUM  EQU CF_BASE+6
*CF_CLO   EQU CF_BASE+8
*CF_CHI   EQU CF_BASE+10
*CF_HEAD    EQU CF_BASE+12
*CF_STATUS  EQU CF_BASE+14 ; read status
*CF_COMAND  EQU CF_BASE+14 ; write command
*CF_AUX     EQU CF_BASE+30
*
* Command Equates
*
*CMDREAD    EQU $20 ; Read Single sector
*CMDWRITE   EQU $30 ; Write Single sector
*HEADLBA    EQU $E0
*AUXRESET   EQU $06
*AUXRSTREL  EQU $02
*
* Status bit equates
*
*BSY        EQU $80
*DRDY       EQU $40
*DRQ        EQU $08
*ERR        EQU $01
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEK   PSHS A
       CLRA
       DECB
       STD  CF_SNUM
       LDB  ,S
       STD  CF_CLO
       LDB  DRNUM
       STD  CF_CHI
       LDB  #$01
       STD  CF_SCNT
       CLRB
       PULS A,PC
*
* READ SECTORS FROM CF
*
*
READ   BSR  SEEK
       LDD  #CMDREAD ; IDE READ MULTIPLE
       STD  CF_COMAND
       BSR  WTRDY
*
* READ LOOP
*
       PSHS Y
       LDY #256
READ1  BSR  WTDRQ
       LDD  CF_DATA
       STB  ,X+
       LEAY -1,Y
       BNE  READ1
       PULS Y
*
       BSR  WTRDY
       CLRB
       RTS
*
* WAIT UNTIL READY
*
WTRDY   LDD  CF_STATUS
        BITB #BSY
        BNE  WTRDY
        LDD  CF_STATUS
        BITB #DRDY
        BEQ  WTRDY
        RTS
*
* WAIT FOR DATA REQUEST
*
WTDRQ   LDD  CF_STATUS
        BITB #DRQ
        BEQ  WTDRQ
        RTS
*
       END START

Line No.	Rev	Author	Line
1	47	davidgb	`*`
2			`** FLEX 9 DISK DRIVERS`
3			`*`
4			`* FOR SYS09BUG ON THE DIGILENT SPARTAN 3 STARTER BOARD`
5			`* WITH I/O MAPPED AT $XE000`
6			`* AND ROM MAPPED AT $XF000`
7			`* THE DIGILENT SPARTAN 3 STARTER BOARD HAS 1MBYTE OF SRAM`
8			`* THE FIRST 64K IS USED BY FLEX,`
9			`* THE SECOND 128K IS USED AS A ROM DISK`
10			`* THE REMAINING RAM IS USED FOR A RAM DISK`
11			`*`
12			`*`
13			`CFLAG EQU $01 CARRY FLAG`
14			`VFLAG EQU $02 OVERFLOW FLAG`
15			`ZFLAG EQU $04 ZERO FLAG`
16			`NFLAG EQU $08 NEGATIVE FLAG`
17			`IFLAG EQU $10 IRQ MASK CC`
18			`HFLAG EQU $20 HALF CARRY`
19			`FFLAG EQU $40 FIRQ MASK CC`
20			`EFLAG EQU $80 ENTIRE FLAG`
21			`*`
22			`MAPPAG EQU $00 PAGE $0000 DAT ADDRESS`
23			`*`
24			`* Serial Port`
25			`*`
26			`ACIAS EQU $E000`
27			`ACIAC1 EQU ACIAS`
28			`ACIAD1 EQU ACIAS+1`
29			`DELCON EQU 1250 Delay (Processor clock in MHz * 50)`
30			`*`
31			`* XMODEM Control characters`
32			`*`
33			`SOH EQU $01`
34			`EOT EQU $04`
35			`ACK EQU $06`
36			`NAK EQU $15`
37			`CAN EQU $18`
38			`*`
39			`* Some dummy Constants`
40			`*`
41			`RMAXTRK EQU 64`
42			`RMAXSEC EQU 255`
43			`RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC`
44			`*`
45			`* Start`
46			`*`
47			`ORG $0100`
48			`START LBSR UFSUB`
49			`JMP [$F800] Jump to monitor on Completion.`
50			`*`
51			`*`
52			`* RAM SPACE`
53			`*`
54			`DRVNUM FCB 0`
55			`TRACK FCB 0`
56			`SECTOR FCB 0`
57			`CHKSUM FCB 0`
58			`BLKNUM FCB 0 Xmodem block number`
59			`BYTCNT FCB 0 Xmodem byte count`
60			`XSTATE FDB 0 Xmodem State Vector`
61			`DELCNT FCB $00,$00,$00 Xmodem Poll timer`
62			`MAXTRK FCB 0`
63			`MAXSEC FCB 0`
64			`ORG $0200`
65			`*`
66			`* SECTOR BUFFER`
67			`*`
68			`BUFFER RMB 256`
69			`*`
70			`*`
71			`* recieve char from remote drive.`
72			`* timeout if no response for approx 1s.`
73			`* Entry: no parameters`
74			`* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.`
75			`*`
76			`RCHAR PSHS X,Y`
77			`*`
78			`LDX #1000 1000x inner loop`
79			`RCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).`
80			`RCHAR2 LDA ACIAC1 test for recieved char`
81			`ASRA`
82			`BCS RCHAR3 get character`
83			`LEAY -1,Y else, continue to count delay`
84			`BNE RCHAR2`
85			`LEAX -1,X`
86			`BNE RCHAR1`
87			`PULS X,Y,PC return with error if timed out`
88			`*`
89			`RCHAR3 LDA ACIAD1 return data (carry bit still set)`
90			`PULS X,Y,PC`
91			`*`
92			`*`
93			`* transmit char to remote drive.`
94			`* timeout if no response for approx 1s. (allows for use of hardware flow control)`
95			`* Entry: (A) = char to transmit`
96			`* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.`
97			`*`
98			`SCHAR PSHS X,Y`
99			`PSHS A`
100			`*`
101			`LDX #1000 1000x inner loop`
102			`SCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).`
103			`SCHAR2 LDA ACIAC1 test for space in transmit FIFO`
104			`ASRA`
105			`ASRA`
106			`BCS SCHAR3 send character`
107			`LEAY -1,Y else, continue to count delay`
108			`BNE SCHAR2`
109			`LEAX -1,X`
110			`BNE SCHAR1`
111			`PULS A`
112			`PULS X,Y,PC return with error if timed out`
113			`*`
114			`SCHAR3 PULS A`
115			`STA ACIAD1 send data (carry bit still set)`
116			`PULS X,Y,PC`
117			`*`
118			`** 'UF' Format IDE Drive to FLEX standard.`
119			`*`
120			`DISFOS FCB $0A,$0D`
121			`FCC 'Formating IDE disk... '`
122			`FCB $0A,$0D`
123			`FCC 'Drive Number ?'`
124			`FCB 4`
125			`MESS6 FCB $0A,$0D,4`
126			`FCC 'IDE drive not allocated! '`
127			`FCB 4`
128			`UFMSG1 FCB $0A,$0D`
129			`FCC 'Format Complete'`
130			`FCB 4`
131			`*`
132			`UFSUB JSR INITDR`
133			`LDX #DISFOS`
134			`JSR PDATA1`
135			`UFSUB1 LBSR RCHAR`
136			`BCC UFSUB1`
137			`LBSR SCHAR`
138			`CMPA #'0'`
139			`LBLO UFEXIT`
140			`CMPA #'3'`
141			`LBHI UFEXIT`
142			`SUBA #'0'`
143			`TFR A,B`
144			`STB DRVNUM`
145			`LDX #DRVNUM-3`
146			`JSR DRVSEL`
147			`*`
148			`* set up free chain`
149			`*`
150			`LDX #BUFFER clear out buffer`
151			`CLRA`
152			`CLRB`
153			`DFL1 STA 0,X+`
154			`DECB`
155			`BNE DFL1`
156			`*`
157			`CLR TRACK`
158			`LDA #1`
159			`STA SECTOR`
160			`DFL2 LDX #BUFFER`
161			`LDA TRACK`
162			`STA 0,X`
163			`LDA SECTOR`
164			`INCA`
165			`CMPA #RMAXSEC+1 last sector on track?`
166			`BNE DFL3`
167			`INC 0,X`
168			`LDA #1`
169			`DFL3 STA 1,X`
170			`LDA TRACK`
171			`LDB SECTOR`
172			`JSR WRITSC`
173			`INC SECTOR`
174			`LDA SECTOR`
175			`CMPA #RMAXSEC+1`
176			`BNE DFL2`
177			`LDA #1`
178			`STA SECTOR`
179			`INC TRACK`
180			`LDA TRACK`
181			`CMPA #RMAXTRK`
182			`BNE DFL2`
183			`* break free chain at last track/sector`
184			`LDX #BUFFER`
185			`LDA #RMAXTRK-1`
186			`LDB #RMAXSEC`
187			`JSR READSC`
188			`LDX #BUFFER`
189			`CLR 0,X`
190			`CLR 1,X`
191			`LDA #RMAXTRK-1`
192			`LDB #RMAXSEC`
193			`JSR WRITSC`
194			`* set up sector structure, SIR, directory etc`
195			`LDX #BUFFER`
196			`CLRA`
197			`LDB #RMAXSEC`
198			`JSR READSC`
199			`LDX #BUFFER`
200			`CLR 0,X break end of directory chain`
201			`CLR 1,X`
202			`CLRA`
203			`LDB #RMAXSEC`
204			`JSR WRITSC`
205			`*`
206			`LDX #BUFFER`
207			`CLRA`
208			`LDB #3 set up SIR`
209			`JSR READSC`
210			`LDX #BUFFER`
211			`CLR 0,X break forward link`
212			`CLR 1,X`
213			`LDD #$5241 set volume name (RAMDISK )`
214			`STD 16,X`
215			`LDD #$4D44`
216			`STD 18,X`
217			`LDD #$4953`
218			`STD 20,X`
219			`LDD #$4B20`
220			`STD 22,X`
221			`LDD #1 volume number`
222			`STD 27,X`
223			`LDD #$0101 first trk/sec 01-01`
224			`STD 29,X`
225			`LDA #RMAXTRK-1`
226			`LDB #RMAXSEC`
227			`STD 31,X`
228			`STD 38,X`
229			`LDD #RTOTSEC total DATA sectors (2912-14)`
230			`STD 33,X`
231			`*`
232			`LDA #01 month set default creation date (SYS09's birthday!)`
233			`STA 35,X`
234			`LDA #07 day`
235			`STA 36,X`
236			`LDA #07 year`
237			`STA 37,X`
238			`*`
239			`RF3 CLRA`
240			`LDB #3`
241			`JSR WRITSC`
242			`*`
243			`* Not sure what this is about`
244			`* put bootstrap on track 0 sector 1`
245			`*`
246			`* LDX #BUFFER`
247			`* CLRA`
248			`* LDB #1`
249			`* JSR READSC`
250			`* LDX #BUFFER`
251			`* LDA #$AA set the init flag`
252			`* STA 0,X`
253			`* LDA #$55`
254			`* STA 1,X`
255			`* CLRA`
256			`* LDB #1`
257			`* JSR WRITSC`
258			`*`
259			`* Write Boot sector`
260			`*`
261			`LDX #$C000`
262			`CLRA TRACK 0`
263			`LDB #$01 SECTOR 1`
264			`STA TRACK`
265			`STB SECTOR`
266			`LBSR WRITSC`
267			`*`
268			`UFEXIT LDX #UFMSG1`
269			`JMP PDATA1`
270			`*`
271			`* Read a byte from the serial port`
272			`*`
273			`LRBYTE PSHS B`
274			`BSR LRHEX Get hex digit.`
275			`ASLA`
276			`ASLA Shift to msb.`
277			`ASLA`
278			`ASLA`
279			`TFR A,B Save in B.`
280			`BSR LRHEX Get next digit.`
281			`PSHS B`
282			`ADDA 0,S+ Add together bytes.`
283			`PULS B,PC`
284			`*`
285			`LRHEX JSR INTER`
286			`BVS LRHEX`
287			`SUBA #$30 Remove ascii bias.`
288			`BMI LRHEX`
289			`CMPA #$09 Number?`
290			`BLE LRHEX1 Yes.`
291			`CMPA #$11 Keep testing.`
292			`BMI LRHEX`
293			`CMPA #$16`
294			`BGT LRHEX`
295			`SUBA #$07`
296			`LRHEX1 RTS`
297			`*`
298			`* ACIA INPUT TEST`
299			`*`
300			`INTEST LDA ACIAC1`
301			`BITA #$01`
302			`RTS`
303			`*`
304			`* RESET ACIA`
305			`*`
306			`ACIRST LDA #$03 master reset`
307			`STA ACIAC1`
308			`LDA #$11`
309			`STA ACIAC1`
310			`RTS`
311			`*`
312			`* ACIA INPUT`
313			`*`
314			`INTER LDA #16`
315			`STA DELCNT+0`
316			`CLR DELCNT+1`
317			`CLR DELCNT+2`
318			`INTER0 LDA ACIAC1`
319			`BITA #$01`
320			`BNE INTER1`
321			`BITA #$78`
322			`BEQ INTER2`
323			`BSR ACIRST`
324			`BRA INTER`
325			`*`
326			`INTER1 LDA ACIAD1`
327			`ANDCC #VFLAG`
328			`RTS`
329			`*`
330			`INTER2 DEC DELCNT+2`
331			`BNE INTER0`
332			`DEC DELCNT+1`
333			`BNE INTER0`
334			`DEC DELCNT+0`
335			`BNE INTER0`
336			`CLRA`
337			`ORCC #VFLAG`
338			`RTS`
339			`*`
340			`* ACIA OUTPUT`
341			`*`
342			`OUTTER PSHS A`
343			`*`
344			`OUTTE1 LDA ACIAC1`
345			`BITA #$02`
346			`BNE OUTTE2`
347			`BITA #$78`
348			`BEQ OUTTE1`
349			`BSR ACIRST`
350			`BRA OUTTE1`
351			`*`
352			`OUTTE2 PULS A`
353			`STA ACIAD1`
354			`RTS`
355			`*`
356			`* Print Data`
357			`*`
358			`PDATA0 BSR OUTTER`
359			`PDATA1 LDA ,X+`
360			`CMPA #$04`
361			`BNE PDATA0`
362			`RTS`
363			`*`
364			`** FLEX 9 IDE DISK DRIVERS`
365			`*`
366			`* FOR SYS09BUG 1.2 ON THE XSA-3S1000`
367			`* WITH I/O MAPPED AT $XE000`
368			`* AND ROM MAPPED AT $XF000`
369			`*`
370			`*`
371			`IMASK EQU $10 IRQ MASK CC`
372			`FMASK EQU $40 FIRQ MASK CC`
373			`*`
374			`CF_BASE EQU $E100`
375			`CF_DATA EQU CF_BASE+0`
376			`CF_ERROR EQU CF_BASE+2 ; read error`
377			`CF_FEATURE EQU CF_BASE+2 ; write feature`
378			`CF_SCNT EQU CF_BASE+4`
379			`CF_SNUM EQU CF_BASE+6`
380			`CF_CLO EQU CF_BASE+8`
381			`CF_CHI EQU CF_BASE+10`
382			`CF_HEAD EQU CF_BASE+12`
383			`CF_STATUS EQU CF_BASE+14 ; read status`
384			`CF_COMAND EQU CF_BASE+14 ; write command`
385			`CF_AUX EQU CF_BASE+30`
386			`*`
387			`* Command Equates`
388			`*`
389			`CMDREAD EQU $20 ; Read Single sector`
390			`CMDWRITE EQU $30 ; Write Single sector`
391			`AUXRESET EQU $06`
392			`AUXRSTREL EQU $02`
393			`HEADLBA EQU $E0`
394			`*`
395			`* Status bit equates`
396			`*`
397			`BSY EQU $80`
398			`DRDY EQU $40`
399			`DRQ EQU $08`
400			`ERR EQU $01`
401			`*`
402			`*`
403			`* INITIALIZE CF CARD FOR 8 BIT LBA MODE`
404			`*`
405			`INITDR LDD #AUXRESET`
406			`STD CF_AUX`
407			`LDD #AUXRSTREL`
408			`STD CF_AUX`
409			`LDD #HEADLBA`
410			`STD CF_HEAD`
411			`BRA WAITRDY`
412			`*`
413			`* RESTORE DISK DRIVER (SEEK TRACK 00)`
414			`*`
415			`RESTR1 BSR DRVSEL`
416			`CLRA ; Track 0`
417			`LDB #$01 ; Sector 1`
418			`*`
419			`* Seek track and sector`
420			`* A holds track number (0 - ??)`
421			`* B holds sector number (1 - ??)`
422			`* Sector numbers starts from 1`
423			`* subtract 1 to start from sector 0 on CF`
424			`*`
425			`SEEKTS PSHS A`
426			`CLRA`
427			`DECB`
428			`STD CF_SNUM`
429			`LDB ,S`
430			`STD CF_CLO`
431			`LDB DRVNUM`
432			`STD CF_CHI`
433			`LDB #$01`
434			`STD CF_SCNT`
435			`CLRB`
436			`PULS A,PC`
437			`*`
438			`* READ SECTORS FROM CF`
439			`*`
440			`*`
441			`READSC BSR SEEKTS`
442			`LDD #CMDREAD ; IDE READ MULTIPLE`
443			`STD CF_COMAND`
444			`BSR WAITRDY`
445			`*`
446			`* READ LOOP`
447			`*`
448			`PSHS Y`
449			`LDY #256`
450			`RDLP1 BSR WAITDRQ`
451			`LDD CF_DATA`
452			`STB ,X+`
453			`LEAY -1,Y`
454			`BNE RDLP1`
455			`PULS Y`
456			`*`
457			`BSR WAITRDY`
458			`CLRB`
459			`RTS`
460			`*`
461			`* WRITE SECTOR TO CF`
462			`*`
463			`WRITSC BSR SEEKTS ; SEEK TRACK & SECTOR`
464			`LDD #CMDWRITE ; IDE WRITE MULTIPLE`
465			`STD CF_COMAND`
466			`BSR WAITRDY`
467			`*`
468			`* WRITE LOOP`
469			`*`
470			`PSHS Y`
471			`LDY #256`
472			`CLRA`
473			`WRTLP1 BSR WAITDRQ`
474			`LDB ,X+`
475			`STD CF_DATA`
476			`LEAY -1,Y`
477			`BNE WRTLP1`
478			`PULS Y`
479			`*`
480			`BSR WAITRDY`
481			`CLRB`
482			`RTS`
483			`*`
484			`* CHECK FOR BUSY`
485			`* Doubles as VERIFY`
486			`*`
487			`BUSY CLRB Never busy`
488			`RTS`
489			`*`
490			`* DRIVE SELECT DISK DRIVER`
491			`*`
492			`DRVSEL LDA 3,X GET DRIVE # FROM FCB`
493			`CMPA #3`
494			`BLS DRVS2 IF > 3, SET IT TO 0`
495			`CLRA`
496			`DRVS2 STA DRVNUM`
497			`CLRB ; SET Z, CLEAR C`
498			`RTS`
499			`*`
500			`* CHECK DRIVE READY DISK DRIVER`

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