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                                    MOTOROLA
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                                    FREEWARE
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                             8-BIT CROSS ASSEMBLERS
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                                  USER'S MANUAL
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                                     EDITED BY
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                                   KEVIN ANDERSON
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                             FIELD APPLICATIONS ENGINEER
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                           TABLE OF CONTENTS
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CHAPTER 1.........................................................  1
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76
     1.1   INTRODUCTION ..........................................  1
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     1.2   ASSEMBLY LANGUAGE .....................................  1
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     1.3   OPERATING ENVIRONMENT .................................  2
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     1.4   ASSEMBLER PROCESSING ..................................  2
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81
CHAPTER 2 ........................................................  3
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83
     2.1   INTRODUCTION ..........................................  3
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     2.2   SOURCE STATEMENT FORMAT ...............................  3
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          2.2.1   Label Field ....................................  3
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          2.2.2   Operation Field ................................  4
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          2.2.3   Operand Field ..................................  4
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               2.2.3.1  M6800/6801 Operand Syntax ................  5
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               2.2.3.2  M6800/M68HC04 Operand Syntax .............  5
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               2.2.3.3  M6805/M68HC05 Operand Syntax .............  5
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               2.2.3.4  M6809 Operand Syntax .....................  5
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               2.2.3.5  M68HC11 Operand Syntax ...................  6
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               2.2.3.6  Expressions ..............................  6
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               2.2.3.7  Operators ................................  7
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               2.2.3.8  Symbols ..................................  7
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               2.2.3.9  Constants ................................  7
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          2.2.4   Comment Field ..................................  8
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     2.3   ASSEMBLER OUTPUT ......................................  9
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100
CHAPTER 3 - RUNNING THE ASSEMBLERS ...............................  10
101
 
102
     3.1   ASSEMBLER INVOCATION ..................................  10
103
     3.2   ERROR MESSAGES ........................................  11
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105
CHAPTER 4 - ASSEMBLER DIRECTIVES .................................  12
106
 
107
     4.1   INTRODUCTION ..........................................  12
108
     4.2   BSZ - BLOCK STORAGE OF ZEROS ..........................  12
109
     4.3   EQU - EQUATE SYMBOL TO A VALUE ........................  13
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     4.4   FCB - FORM CONSTANT BYTE ..............................  13
111
     4.5   FCC - FORM CONSTANT CHARACTER STRING ..................  13
112
     4.6   FDB - FROM DOUBLE BYTE CONSTANT .......................  13
113
     4.7   FILL - FILL MEMORY ....................................  14
114
     4.8   OPT - ASSEMBLER OUTPUT OPTIONS ........................  14
115
     4.9   ORG - SET PROGRAM COUNTER TO ORIGIN ...................  14
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     4.10   PAGE - TOP OF PAGE ...................................  15
117
     4.11   RMB - RESERVE MEMORY BYTES ...........................  15
118
     4.12   ZMB - ZERO MEMORY BYTES ..............................  15
119
 
120
APPENDIX A - CHARACTER SET .......................................  16
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122
APPENDIX B - ADDRESSING MODES ....................................  18
123
 
124
     B.1   M6800/M6801 ADDRESSING MODES ..........................  18
125
     B.2   M6804/68HC04 ADDRESSING MODES .........................  19
126
     B.3   M6805/68HC05 ADDRESSING MODES .........................  21
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                                i
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                           TABLE OF CONTENTS
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140
     B.4   M6809 ADDRESSING MODES ................................  22
141
     B.5   M68HC11 ADDRESSING MODES ..............................  26
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143
APPENDIX C - DIRECTIVE SUMMARY ...................................  28
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145
APPENDIX D - ASSEMBLER LISTING FORMAT ............................  29
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147
APPENDIX E - S-RECORD INFORMATION ................................  30
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149
     E.1   INTRODUCTION ..........................................  30
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     E.2   S-RECORD CONTENT ......................................  30
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     E.3   S-RECORD TYPES ........................................  30
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     E.4   S-RECORD EXAMPLE ......................................  31
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                                ii
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                               CHAPTER 1
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                          GENERAL INFORMATION
206
 
207
 
208
1.1   INTRODUCTION
209
 
210
This is the user's reference manual for the IBM-PC hosted Motorola
211
Freeware 8 bit cross assemblers.  It details the features and
212
capabilities of the cross assemblers, assembler syntax and directives,
213
options, and listings. It is intended as a detailed reference and an
214
introduction for those unfamiliar with Motorola assembler syntax and
215
format.  Those experienced with Motorola assembler products may wish
216
to examine the file ASEMBLER.DOC available with the cross assemblers,
217
which briefly describes the differences between these assemblers and
218
earlier, non-pc based versions.
219
 
220
Assemblers are programs that process assembly language source program
221
statements and translate them into executable machine language object
222
files.  A programmer writes his source program using any text editor
223
or word processor that can produce an ASCII text output.  With some
224
word processors this is known as "non document" mode.  Non document
225
mode produces a file without the non-printable embedded control
226
characters that are used in document formating.  (Caution: assembling
227
a file that has been formatted with embedded control characters may
228
produce assembler errors.  The solution is to convert the source file
229
to ASCII text.) Once the source code is written, the source file is
230
assembled by processing the file via the assembler.
231
 
232
Cross assemblers (such as the Motorola Freeware Assemblers) allow
233
source programs written and edited on one computer (the host) to
234
generate executable code for another computer (the target).  The
235
executable object file can then be downloaded and run on the target
236
system.  In this case the host is an IBM-PC or compatible and the
237
target system is based on a Motorola 8-bit microprocessor (6800, 6801,
238
6803, 6805, 68HC05, 6809, or 68HC11).
239
 
240
The assemblers are the executable programs AS*.EXE where * is any of
241
0, 1, 4, 5, 9, or 11 depending on which microprocessor you are writing
242
code for.  The details of executing the assembler programs are found
243
in Chapter 3.  The assembly language format and syntax for the various
244
processors is very similar with slight variations due to varied
245
programming resources (instructions, addressing modes, and registers).
246
These variations are explained in Appendix B.
247
 
248
 
249
1.2   ASSEMBLY LANGUAGE
250
 
251
The symbolic language used to code source programs to be processed by
252
the Assembler is called assembly language. The language is a
253
collection of mnemonic symbols representing: operations (i.e., machine
254
instruction mnemonics or directives to the assembler), symbolic names,
255
operators, and special symbols. The assembly language provides
256
mnemonic operation codes for all machine instructions in the
257
instruction set. The instructions are defined and explained in the
258
Programming Reference Manuals for the specific devices, available from
259
Motorola. The assembly language also contains mnemonic directives
260
 
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264
 
265
 
266
 
267
                                   Freeware Assemblers User's Manual
268
 
269
 
270
which specify auxiliary actions to be performed by the Assembler.
271
These directives are not always translated into machine language.
272
 
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274
1.3   OPERATING ENVIRONMENT
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276
These assemblers will run on any IBM-PC, XT, AT, PS-2, or true
277
compatible.  The assemblers may be run off of a floppy disk drive or
278
they may be copied onto a hard drive for execution.  DOS 2.0 or later
279
is required.
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282
1.4   ASSEMBLER PROCESSING
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284
The Macro Assembler is a two-pass assembler. During the first pass,
285
the source program is read to develop the symbol table. During the
286
second pass, the object file is created (assembled) with reference to
287
the table developed in pass one. It is during the second pass that
288
the source program listing is also produced.
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Each source statement is processed completely before the next source
291
statement is read. As each statement is processed, the Assembler
292
examines the label, operation code, and operand fields. The operation
293
code table is scanned for a match with a known opcode.  During the
294
processing of a standard operation code mnemonic, the standard
295
machine code is inserted into the object file. If an Assembler
296
directive is being processed, the proper action is taken.
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298
Any errors that are detected by the Assembler are displayed before the
299
actual line containing the error is printed. If no source listing is
300
being produced, error messages are still displayed to indicate that
301
the assembly process did not proceed normally.
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                                 2
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                                   Freeware Assemblers User's Manual
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                              CHAPTER 2
337
                   CODING ASSEMBLY LANGUAGE PROGRAMS
338
 
339
 
340
2.1   INTRODUCTION
341
 
342
Programs written in assembly language consist of a sequence of source
343
statements. Each source statement consists of a sequence of ASCII
344
characters ending with a carriage return.  Appendix A contains a list
345
of the supported character set.
346
 
347
 
348
2.2   SOURCE  STATEMENT FORMAT
349
 
350
Each source statement may include up to four fields:  a label (or "*"
351
for a comment line), an operation (instruction mneumonic or assembler
352
directive), an operand, and a comment.
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355
2.2.1   Label Field
356
 
357
The label field occurs as the first field of a source statement. The
358
label field can take one of the following forms:
359
 
360
1. An asterisk (*) as the first character in the label field indicates
361
that the rest of the source statement is a comment. Comments are
362
ignored by the Assembler, and are printed on the source listing only
363
for the programmer's information.
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2. A whitespace character (blank or tab) as the first character
366
indicates that the label field is empty. The line has no label and is
367
not a comment.
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3. A symbol character as the first character indicates that the line
370
has a label. Symbol characters are the upper or lower case letters a-
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z,  digits 0-9, and the special characters, period (.), dollar sign
372
($), and underscore (_). Symbols consist of one to 15 characters, the
373
first of which must be alphabetic or the special characters period (.)
374
or underscore (_).  All characters are significant and upper and lower
375
case letters are distinct.
376
 
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A symbol may occur only once in the label field. If a symbol does
378
occur more than once in a label field, then each reference to that
379
symbol will be flagged with an error.
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With the exception of some directives, a label is assigned the value
382
of the program counter of the first byte of the instruction or data
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being assembled. The value assigned to the label is absolute.
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Labels may optionally be ended with a colon (:).  If the colon is
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used it is not part of the label but merely acts to set the label off
386
from the rest of the source line.  Thus the following code fragments
387
are equivalent:
388
 
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     here:  deca
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            bne here
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                                 3
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                                   Freeware Assemblers User's Manual
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     here   deca
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            bne here
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A label may appear on a line by itself.  The assembler interprets this
406
as set the value of the label equal to the current value of the
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program counter.
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The symbol table has room for at least 2000 symbols of length 8
410
characters or less.  Additional characters up to 15 are permissible at
411
the expense of decreasing the maximum number of symbols possible in
412
the table.
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415
2.2.2   Operation Field
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The operation field occurs after the label field, and must be preceded
418
by at least one whitespace character. The operation field must contain
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a legal opcode mneumonic or an assembler directive.  Upper case
420
characters in this field are converted to lower case before being
421
checked as a legal mneumonic.  Thus 'nop', 'NOP', and 'NoP' are
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recognized as the same mneumonic. Entries in the operation field may
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be one of two types:
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Opcode. These correspond directly to the machine instructions. The
426
operation code includes any register name associated with the
427
instruction.  These register names must not be separated from the
428
opcode with any whitespace characters.  Thus 'clra' means clear
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accumulator A, but 'clr a' means clear memory location identified by
430
the label 'a'.
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Directive. These are special operation codes known to the Assembler
433
which control the assembly process rather than being translated into
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machine instructions.
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2.2.3   Operand Field
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The operand field's interpretation is dependent on the contents of the
440
operation field. The operand field, if required, must follow the
441
operation field, and must be preceded by at least one whitespace
442
character. The operand field may contain a symbol, an expression, or a
443
combination of symbols and expressions separated by commas.
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The operand field of machine instructions is used to specify the
446
addressing mode of the instruction, as well as the operand of the
447
instruction.   The following tables summarize the operand field
448
formats for the various processor families. (NOTE:  in these tables
449
parenthesis "()" signify optional elements and angle brackets "<>"
450
denote an expression is inserted.  These syntax elements are present
451
only for clarification of the format and are not inserted as part of
452
the actual source program.  All other characters are significant and
453
must be used when required.)
454
 
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460
                                 4
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                                   Freeware Assemblers User's Manual
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468
2.2.3.1  M6800/6801 Operand Syntax
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470
The format of the operand field for M6800/6801 instructions is:
471
 
472
     Operand Format           M6800/M6801 Addressing Mode
473
     --------------           ---------------------------
474
     no operand               accumulator and inherent
475
     <expression>             direct, extended, or relative
476
     #<expression>            immediate
477
     <expression>,X           indexed
478
 
479
Details of the M6800/6801 addressing modes may be found in Appendix B.
480
 
481
 
482
2.2.3.2  M6804/68HC Operand Syntax
483
 
484
For the M6804/68HC04, the following operand formats exist:
485
 
486
     Operand Format                M6804/68HC04 Addressing Mode
487
     --------------                ----------------------------
488
     no operand                    accumulator and inherent
489
     <expression>                  direct, extended, or relative
490
     #<expression>                 immediate
491
     <expression>                  bit set or clear
492
     <expression>,<expression>     bit test and branch
493
     [<x> or <y>]                  register indirect
494
     <expression>,#<expression>    move indirect
495
 
496
Details of the M6804/68HC04 addressing modes may be found in Appendix
497
B.
498
 
499
 
500
2.2.3.3  M6805/M68HC05 Operand Syntax
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502
For the M6805/68HC05, the operand formats are:
503
 
504
     Operand Format                M6805/68HC05 Addressing Mode
505
     --------------                ----------------------------
506
     no operand                    accumulator and inherent
507
     <expression>                  direct, extended, or relative
508
     #<expression>                 immediate
509
     <expression>,X                indexed
510
     <expression>,<expression>     bit set or clear
511
     <expression>,<expression>,<expression>     bit test and branch
512
 
513
Details of the M6805/68HC05 addressing modes may be found in Appendix
514
B.
515
 
516
 
517
2.2.3.4  M6809 Operand Syntax
518
 
519
For the M6809, the following  operand formats are used:
520
 
521
 
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523
 
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                                 5
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                                   Freeware Assemblers User's Manual
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     Operand Format           M6809 Addressing Mode
535
     --------------           ---------------------
536
     no operand               accumulator and inherent
537
     <expression>             direct, extended, or relative
538
     #<expression>            immediate
539
     <expression>,X           indexed
540
     <<expression>            forced direct
541
     ><expression>            forced extended
542
     <expression>]            extended indirect
543
     <expression>,R           indexed
544
     <<expression>,R          forced 8-bit offset indexed
545
     ><expression>,R          forced 16-bit offset indexed
546
     [<expression>,R]         indexed indirect
547
     <[<expression>,R]        forced 8-bit offset indexed indirect
548
     >[<expression>,R]        forced 16-bit offset indexed indirect
549
     Q+                       auto increment by 1
550
     Q++                      auto increment by 2
551
     [Q++]                    auto increment indirect
552
     -Q                       auto decrement by
553
     --Q                      auto decrement by 2
554
     [--Q]                    auto decrement indirect
555
     W1,[W2,...,Wn]           immediate
556
 
557
where R is one of the registers PCR, S, U, X, or Y, and Q is one of
558
the registers S, U, X, or Y.   Wi  (i=1 to n) is one of the symbols A,
559
B, CC, D, DP, PC, S, U, X, or Y.
560
 
561
Details of the M6809 addressing modes may be found in Appendix B.
562
 
563
 
564
2.2.3.5  M68HC11 Operand Syntax
565
 
566
For the M68HC11, the following operand formats exist:
567
 
568
     Operand Format                M68HC11 Addressing Mode
569
     --------------                -----------------------
570
     no operand                    accumulator and inherent
571
     <expression>                  direct, extended, or relative
572
     #<expression>                 immediate
573
     <expression>,X                indexed with X register
574
     <expression>,Y                indexed with Y register
575
     <expression> <expression>     bit set or clear
576
     <expression> <expression> <expression>     bit test and branch
577
 
578
The bit manipulation instruction operands are separated by spaces in
579
this case since the HC11 allows bit manipulation instructions on
580
indexed addresses.  Thus a ',X' or ',Y' may be added to the final two
581
formats above to form the indexed effective address calculation.
582
 
583
Details of the M68HC11 addressing modes may be found in Appendix B.
584
The operand fields of assembler directives are described in Chapter 4.
585
 
586
 
587
2.2.3.6  Expressions.  An expression is a combination of symbols,
588
constants, algebraic operators, and parentheses. The expression is
589
used to specify a value which is to be used as an operand.
590
 
591
 
592
                                6
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595
 
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                                   Freeware Assemblers User's Manual
598
 
599
 
600
Expressions may consist of symbols, constants, or the character '*'
601
(denoting the current value of the program counter) joined together by
602
one of the operators: + - * / % & | ^ .
603
 
604
 
605
2.2.3.7  Operators.  The operators are the same as in c:
606
 
607
     +    add
608
     -    subtract
609
     *    multiply
610
     /    divide
611
     %    remainder after division
612
     &    bitwise and
613
     |    bitwise or
614
     ^    bitwise exclusive or
615
 
616
Expressions are evaluated left to right and there is no provision for
617
parenthesized expressions.  Arithmetic is carried out in signed two-
618
complement integer precision (that's 16 bits on the IBM PC).
619
 
620
 
621
2.2.3.8  Symbols.  Each symbol is associated with a 16-bit integer
622
value which is used in place of the symbol during the expression
623
evaluation.  The asterisk (*) used in an expression as a symbol
624
represents the current value of the location counter (the first byte
625
of a multi-byte instruction).
626
 
627
 
628
2.2.3.9  Constants.  Constants represent quantities of data that do
629
not vary in value during the execution of a program.  Constants may be
630
presented to the assembler in one of five formats: decimal,
631
hexadecimal, binary, or octal, or ASCII.  The programmer indicates the
632
number format to the assembler with the following prefixes:
633
 
634
     $    HEX
635
     %    BINARY
636
     @    OCTAL
637
     '    ASCII
638
 
639
Unprefixed constants are interpreted as decimal.  The assembler
640
converts all constants to binary machine code and are displayed in the
641
assembly listing as hex.
642
 
643
A decimal constant consists of a string of numeric digits. The value
644
of a decimal constant must fall in the range 0-65535, inclusive.  The
645
following example shows both valid and invalid decimal constants:
646
 
647
     VALID     INVALID   REASON INVALID
648
     -----     -------   --------------
649
     12        123456    more than 5 digits
650
     12345     12.3      invalid character
651
 
652
A hexadecimal constant consists of a maximum of four characters from
653
the set of digits (0-9) and the upper case alphabetic letters (A-F),
654
and is preceded by a dollar sign ($).  Hexadecimal constants must be
655
 
656
 
657
 
658
                                 7
659
 
660
 
661
 
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663
                                   Freeware Assemblers User's Manual
664
 
665
 
666
in the range $0000 to $FFFF. The following example shows both valid
667
and invalid hexadecimal constants:
668
 
669
     VALID     INVALID   REASON INVALID
670
     -----     -------   --------------
671
     $12       ABCD      no preceding "$"
672
     $ABCD     $G2A      invalid character
673
     $001F     $2F018    too many digits
674
 
675
A binary constant consists of a maximum of 16 ones or zeros preceded
676
by a percent sign (%).  The following example shows both valid and
677
invalid binary constants:
678
 
679
     VALID     INVALID             REASON INVALID
680
     -----     -------             --------------
681
     %00101    1010101             missing percent
682
     %1        %10011000101010111  too many digits
683
     %10100    %210101             invalid digit
684
 
685
An octal constant consists of a maximum of six numeric digits,
686
excluding the digits 8 and 9, preceded by a commercial at-sign (@).
687
Octal constants must be in the ranges @0 to @177777.  The following
688
example shows both valid and invalid octal constan
689
ts:
690
 
691
     VALID     INVALID   REASON INVALID
692
     -----     -------   --------------
693
     @17634    @2317234  too many digits
694
     @377      @277272   out of range
695
     @177600   @23914    invalid character
696
 
697
A single ASCII character can be used as a constant in expressions.
698
ASCII constants are preceded by a single quote ('). Any character,
699
including the single quote, can be used as a character constant.   The
700
following example shows both valid and inval
701
id character constants:
702
 
703
     VALID     INVALID   REASON INVALID
704
     -----     -------   --------------
705
     '*        'VALID    too long
706
 
707
For the invalid case above the assembler will not indicate an error.
708
Rather it will assemble the first character and ignore the remainder.
709
 
710
 
711
2.2.4   Comment Field
712
 
713
The last field of an Assembler source statement is the comment field.
714
This field is optional and is only printed on the source listing for
715
documentation purposes. The comment field is separated from the
716
operand field (or from the operation field if no operand is required)
717
by at least one whitespace character. The comment field can contain
718
any printable ASCII characters.
719
 
720
 
721
 
722
 
723
 
724
                                 8
725
 
726
 
727
 
728
 
729
                                   Freeware Assemblers User's Manual
730
 
731
 
732
2.3   ASSEMBLER OUTPUT
733
 
734
The Assembler output includes an optional listing of the source
735
program and an object file which is in the Motorola S Record format.
736
Details of the S Record format may be found in Appendix E.   The
737
Assembler will normally suppress the printing of the source listing.
738
This condition, as well as others, can be overridden via options
739
supplied on the command line that invoked the Assembler.
740
 
741
Each line of the listing contains a reference line number, the address
742
and bytes assembled, and the original source input line.  If an input
743
line causes more than 6 bytes to be output (e.g. a long FCC
744
directive), additional bytes (up to 64) are listed on succeeding lines
745
with no address preceding them.
746
 
747
The assembly listing may optionally contain a symbol table or a cross
748
reference table of all symbols appearing in the program. These are
749
always printed at the end of the assembly listing if either the symbol
750
table or cross reference table options (Paragraph 4.8) are in effect.
751
The symbol table contains the name of each symbol, along with its
752
defined value. The cross reference table additionally contains the
753
assembler-maintained source line number of every reference to every
754
symbol. The format of the cross reference table is shown in Appendix
755
D.
756
 
757
 
758
 
759
 
760
 
761
 
762
 
763
 
764
 
765
 
766
 
767
 
768
 
769
 
770
 
771
 
772
 
773
 
774
 
775
 
776
 
777
 
778
 
779
 
780
 
781
 
782
 
783
 
784
 
785
 
786
 
787
 
788
 
789
 
790
                                 9
791
 
792
 
793
 
794
 
795
                                   Freeware Assemblers User's Manual
796
 
797
 
798
                              CHAPTER 3
799
                        RUNNING THE ASSEMBLERS
800
 
801
 
802
3.1   ASSEMBLER INVOCATION
803
 
804
The Motorola Freeware Assembly programs are named as*.exe where '*' is
805
any of 0, 1, 4, 5, 9, or 11 depending on which processor family you
806
wish to assemble code for.  For example, to generate M6800 code run
807
the as0.exe program.  To generate M68HC05 code run the as5.exe
808
program, and so forth.  To run the assembler enter the following
809
command line:
810
 
811
         as*   file1 (file2 . . . ) ( - option1 option2 . . . )
812
 
813
where file1, file2, etc are the names of the source files you wish to
814
assemble.  The source filenames may have extensions but the assembler
815
does not check for any particular extension ( however, do not use the
816
.S19 extension since that is the extension of the object file created
817
by the assembler.  Its creation would overwrite the source file when
818
it is written to the disk).
819
 
820
The options are one or more of the following:
821
 
822
     l    enables output listing
823
     no   disables output listing (default).
824
     cre  enables the cross reference table generation
825
     s    enables the symbol table generation
826
     c    enables cycle counting
827
     noc  disables cycle counting
828
 
829
The minus sign preceding the option should be separated from the last
830
file name by a space.  These options may also be indicated to the
831
assembler by the use of the OPT directive in the source file.  The OPT
832
directive is described in Paragraph 4.8.
833
 
834
The object file created is written to disk and given the name
835
'FILENAME.S19' where 'FILENAME' is the name of the first source file
836
specified on the command line.  Any errors and the optional listing
837
(if specified) are displayed on the screen.  The listing and/or error
838
messages may be saved to a file for later examination or printing by
839
append an i/o redirection command to the command line.  On the PC i/o
840
redirection is indicated with the greater-than ('>') symbol followed
841
by any new or existing file name.
842
 
843
Command line examples:
844
 
845
The command line
846
 
847
         as5 myfile
848
 
849
would run the M6805/68HC05 assembler on the source file 'myfile'.  The
850
object file would be written to 'myfile.s19' and any errors would
851
appear on the screen.
852
 
853
 
854
 
855
 
856
                                 10
857
 
858
 
859
 
860
 
861
                                   Freeware Assemblers User's Manual
862
 
863
 
864
The command line
865
 
866
         as9 test.asm nexttest.s -l
867
 
868
would run the M6809 assembler on the source files 'test.asm' and
869
'nexttest.s'.  The object file would be written to 'test.s19' and any
870
errors and the assembly listing would appear on the screen.
871
 
872
The command line
873
 
874
         as9 test.asm nexttest.s -l cre s >test.lst
875
 
876
would run the M6809 assembler on the source files 'test.asm' and
877
'nexttest.s'.  The object file would be written to 'test.s19'.  A
878
listing would be created followed by a symbol table and cross
879
reference which would all be written to the file test.lst
880
.
881
 
882
3.2   ERROR MESSAGES
883
 
884
Error diagnostic messages are placed in the listing file just before
885
the line containing the error.  The format of the error line is:
886
 
887
             Line_number:   Description of error
888
 
889
                                  or
890
 
891
             Line_number:   Warning ---- Description of error
892
 
893
Errors in pass one cause cancellation of pass two.  Warning do not
894
cause cancellation of pass two but are indications of a possible
895
problem.  Error messages are meant to be self-explanatory.
896
 
897
If more than one file is being assembled, the file name precedes the
898
error:
899
 
900
             File_name,Line_number:  Description of error
901
 
902
Some errors are classed as fatal and cause an immediate termination of
903
the assembly.  Generally this happens when a temporary file cannot be
904
created or is lost during assembly.
905
 
906
 
907
 
908
 
909
 
910
 
911
 
912
 
913
 
914
 
915
 
916
 
917
 
918
 
919
 
920
 
921
 
922
                                11
923
 
924
 
925
 
926
 
927
                                   Freeware Assemblers User's Manual
928
 
929
 
930
                              CHAPTER 4
931
                         ASSEMBLER DIRECTIVES
932
 
933
 
934
4.1   INTRODUCTION
935
 
936
The Assembler directives are instructions to the Assembler, rather
937
than instructions to be directly translated into object code. This
938
chapter describes the directives that are recognized by the Freeware
939
Assemblers. Detailed descriptions of each directive are arranged
940
alphabetically. The notations used in this chapter are:
941
 
942
  ( )  Parentheses denote an optional element.
943
 
944
  XYZ  The names of the directives are printed in capital letters.
945
 
946
  < >  The element names are printed in lower case and contained in
947
angle brackets.  All elements outside of the angle brackets '<>' must
948
be specified as-is. For example, the syntactical element (<number>,)
949
requires the comma to be specified if the optional element <number> is
950
selected. The following elements are used in the subsequent
951
descriptions:
952
 
953
 
954
     <comment>      A statement's comment field
955
     <label>        A statement label
956
     <expression>   An Assembler expression
957
     <expr>         An Assembler expression
958
     <number>       A numeric constant
959
     <string>       A string of ASCII characters
960
     <delimiter>    A string delimiter
961
     <option>       An Assembler option
962
     <symbol>       An Assembler symbol
963
     <sym>          An Assembler symbol
964
     <sect>         A relocatable program section
965
     <reg list>     M6809 register list
966
     <reg exp>      M6809 register expression
967
 
968
 
969
In the following descriptions of the various directives, the syntax,
970
or format, of the directive is given first.  This will be followed
971
with the directive's description.
972
 
973
4.2   BSZ - BLOCK STORAGE OF ZEROS
974
 
975
                   (<label>) BSZ <expression> (<comment>)
976
 
977
The BSZ directive causes the Assembler to allocate a block of bytes.
978
Each byte is assigned the initial value of zero. The number of bytes
979
allocated is given by the expression in the operand field. If the
980
expression contains symbols that are either undefined or forward
981
referenced (i.e. the definition occurs later on in the file), or if
982
the expression has a value of zero, an error will be generated.
983
 
984
 
985
 
986
 
987
 
988
                                 12
989
 
990
 
991
 
992
 
993
                                   Freeware Assemblers User's Manual
994
 
995
 
996
4.3   EQU - EQUATE SYMBOL TO A VALUE
997
 
998
                   <label> EQU <expression> (<comment>)
999
 
1000
The EQU directive assigns the value of the expression in the operand
1001
field to the label. The EQU directive assigns a value other than the
1002
program counter to the label. The label cannot be redefined anywhere
1003
else in the program.  The expression cannot contain any forward
1004
references or undefined symbols.  Equates with forward references are
1005
flagged with Phasing Errors.
1006
 
1007
4.4   FCB - FORM CONSTANT BYTE
1008
 
1009
         (<label>) FCB <expr>(,<expr>,...,<expr>) (<comment>)
1010
 
1011
The FCB directive may have one or more operands separated by commas.
1012
The value of each operand is truncated to eight bits, and is stored in
1013
a single byte of the object program.  Multiple operands are stored in
1014
successive bytes. The operand may be a numeric constant, a character
1015
constant, a symbol, or an expression. If multiple operands are
1016
present, one or more of them can be null (two adjacent commas), in
1017
which case a single byte of zero will be assigned for that operand.
1018
An error will occur if the upper eight bits of the evaluated operands'
1019
values are not all ones or all zeros.
1020
 
1021
4.5   FCC - FORM CONSTANT CHARACTER STRING
1022
 
1023
         (<label>) FCC <delimiter><string><delimiter> (<comment>)
1024
 
1025
The FCC  directive is used to store ASCII strings into consecutive
1026
bytes of memory.  The byte storage begins at the current program
1027
counter.  The label is assigned to the first byte in the string. Any
1028
of the printable ASCII characters can be contained in the string.  The
1029
string is specified  between two identical delimiters which can be any
1030
printable ASCII character. The first non-blank character after the FCC
1031
directive is used as the delimiter.
1032
 
1033
Example:
1034
 
1035
     LABEL1    FCC  , ABC,
1036
 
1037
assembles ASCII ABC at location LABEL1
1038
 
1039
 
1040
4.6 FDB - FORM DOUBLE BYTE CONSTANT
1041
 
1042
         (<label>) FDB <expr>(,<expr>,...,<expr>) (<comment>)
1043
 
1044
The FDB directive may have one or more operands separated by commas.
1045
The 16-bit value corresponding to each operand is stored into two
1046
consecutive bytes of the object program.  The storage begins at the
1047
current program counter.  The label is assigned to the first 16-bit
1048
value. Multiple operands are stored in successive bytes.  The operand
1049
may be a numeric constant, a character constant, a symbol, or an
1050
expression. If multiple operands are present, one or more of them can
1051
 
1052
 
1053
 
1054
                                 13
1055
 
1056
 
1057
 
1058
 
1059
                                   Freeware Assemblers User's Manual
1060
 
1061
 
1062
be null (two adjacent commas), in which case two bytes of zeros will
1063
be assigned for that operand.
1064
 
1065
4.7 FILL - FILL MEMORY
1066
 
1067
                   (<label>) FILL <expression>,<expression>
1068
 
1069
The FILL directive causes the assembler to initialize an area of
1070
memory with a constant value.  The first expression signifies the one
1071
byte value to be placed in the memory and the second expression
1072
indicates the total number of successive bytes to be initialized.  The
1073
first expression must evaluate to the range 0-255.  Expressions cannot
1074
contain forward references or undefined symbols.
1075
 
1076
4.8 OPT - ASSEMBLER OUTPUT OPTIONS
1077
 
1078
         OPT <option>(,<option>,...,<option>) (<comment>)
1079
 
1080
The OPT directive is used to control the format of the Assembler
1081
output. The options are specified in the operand field, separated by
1082
commas. All options have a default condition.  Some options can be
1083
initialized from the command line that invoked the Assembler, however
1084
the options contained in the source file take precedence over any
1085
entered on the command line. In the following descriptions, the
1086
parenthetical inserts specify "DEFAULT", if the option is the default
1087
condition.  All options must be entered in lower case.
1088
 
1089
  c -  Enable cycle counting in the listing.  The total cycle count
1090
for that instruction will appear in the listing after the assembled
1091
bytes and before the source code.
1092
 
1093
  cre -  Print a cross reference table at the end of the source
1094
listing. This option, if used, must be specified before the first
1095
symbol in the source program is encountered.  The cross reference
1096
listing format may be found in Appendix D.
1097
 
1098
   l -  Print the listing from this point on.  A description of the
1099
listing format can be found in Appendix D.
1100
 
1101
   noc -  (DEFAULT) Disable cycle counting in the listing.  If the "c"
1102
option was used previously in the program, this option will cause
1103
cycle counting to cease until the next "OPT c" statement.
1104
 
1105
  nol -   (DEFAULT)  Do not print the listing from this point on.  An
1106
"OPT l" can re-enble listing at a later point in the program.
1107
 
1108
   s -  Print symbol table at end of source listing.  The symbol table
1109
format can be found in Appendix D.
1110
 
1111
 
1112
4.9 ORG - SET PROGRAM COUNTER TO ORIGIN
1113
 
1114
                   ORG <expression> (<comment>)
1115
 
1116
The ORG directive changes the program counter to the value specified
1117
by the expression in the operand field. Subsequent statements are
1118
 
1119
 
1120
                                 14
1121
 
1122
 
1123
 
1124
 
1125
                                   Freeware Assemblers User's Manual
1126
 
1127
 
1128
assembled into memory locations starting with the new program counter
1129
value. If no ORG directive is encountered in a source program, the
1130
program counter is initialized to zero.  Expressions cannot contain
1131
forward references or undefined symbols.
1132
 
1133
 
1134
4.10 PAGE - TOP OF PAGE
1135
 
1136
                   PAGE
1137
 
1138
The PAGE directive causes the Assembler to advance the paper to the
1139
top of the next page. If no source listing is being produced, the PAGE
1140
directive will have no effect. The directive is not printed on the
1141
source listing.
1142
 
1143
 
1144
4.11 RMB - RESERVE MEMORY BYTES
1145
 
1146
                (<label>) RMB <expression> (<comment>)
1147
 
1148
The RMB directive causes the location counter to be advanced by the
1149
value of the expression in the operand field. This directive reserves
1150
a block of memory the length of which in bytes is equal to the value
1151
of the expression. The block of memory reserved is not initialized to
1152
any given value. The expression cannot contain any forward references
1153
or undefined symbols.  This directive is commonly used to reserve a
1154
scratchpad or table area for later use.
1155
 
1156
4.12 ZMB - ZERO MEMORY BYTES  (same as BSZ)
1157
 
1158
                  (<label>) ZMB <expression> (<comment>)
1159
 
1160
The ZMB directive causes the Assembler to allocate a block of bytes.
1161
Each byte is assigned the initial value of zero. The number of bytes
1162
allocated is given by the expression in the operand field. If the
1163
expression contains symbols that are either undefined or forward
1164
references, or if the expression has a value of zero, an error will be
1165
generated.
1166
 
1167
 
1168
 
1169
 
1170
 
1171
 
1172
 
1173
 
1174
 
1175
 
1176
 
1177
 
1178
 
1179
 
1180
 
1181
 
1182
 
1183
 
1184
 
1185
 
1186
                                 15
1187
 
1188
 
1189
 
1190
 
1191
                                   Freeware Assemblers User's Manual
1192
 
1193
 
1194
                               APPENDIX A
1195
                              CHARACTER SET
1196
 
1197
 
1198
The character set recognized by the Freeware Assemblers is a subset of
1199
ASCII. The ASCII code is shown in the following figure. The following
1200
characters are recognized by the Assembler:
1201
 
1202
        1. The upper case letters A through Z and lower case letters a
1203
           through z.
1204
 
1205
        2. The digits 0 through 9.
1206
 
1207
        3. Five arithmetic operators:  +, -, *, / and % (remainder
1208
           after division).
1209
 
1210
        4. Three logical operators:  &, |, and ^.
1211
 
1212
        5. The special symbol characters:  underscore (_), period (.),
1213
           and dollar sign ($).  Only the underscore and period may be
1214
           used as the first character of a symbol.
1215
 
1216
        6. The characters used as prefixes for constants and
1217
           addressing modes:
1218
 
1219
               #    Immediate addressing
1220
               $    Hexadecimal constant
1221
               &    Decimal constant
1222
               @    Octal constant
1223
               %    Binary constant
1224
               '    ASCII character constant
1225
 
1226
        7. The characters used as suffixes for constants and
1227
           addressing modes:
1228
 
1229
               ,X   Indexed addressing
1230
               ,PCR M6809 indexed addressing
1231
               ,S   M6809 indexed addressing
1232
               ,U   M6809 indexed addressing
1233
               ,Y   M6809 and M68HC11 indexed addressing
1234
 
1235
        8. Three separator characters:  space, carriage return, and
1236
           comma.
1237
 
1238
        9. The character "*" to indicate comments.  Comments may
1239
           contain any printable characters from the ASCII set.
1240
 
1241
       10. The special symbol backslash "\" to indicate line
1242
           continuation.  When the assembler encounters the line
1243
           continuation character it fetches the next line and adds it
1244
           to the end of the first line.  This continues until a line
1245
           is seen which doesn't end with a backslash or until the
1246
           system maximum buffer size has been collected (typically
1247
           greater or equal to 256).
1248
 
1249
 
1250
 
1251
 
1252
                                16
1253
 
1254
 
1255
 
1256
 
1257
                                   Freeware Assemblers User's Manual
1258
 
1259
 
1260
       11. For the M6809 Assembler, the character "<" preceding an
1261
           expression to indicate direct addressing mode or 8-bit
1262
           offset in indexed mode, and the character ">" preceding an
1263
           expression to indicate extended addressing mode or 16-bit
1264
           offset in indexed mode.
1265
 
1266
      12. For the M6809 Assembler, the characters used to indicate
1267
          auto increment and auto decrement in the indexed mode:  +,
1268
          ++, -, --.
1269
 
1270
 
1271
 
1272
 
1273
                         ASCII CHARACTER CODES
1274
 
1275
 
1276
           BITS 4 to 6 -- 0    1    2    3    4    5    6    7
1277
           -----------    -------------------------------------
1278
 
1279
 
1280
                B    1    SOH  DC1  :    1    A    Q    a    q
1281
                I    2    STX  DC2  !    2    B    R    b    r
1282
                T    3    ETX  DC3  #    3    C    S    c    s
1283
                S    4    EOT  DC4  $    4    D    T    d    t
1284
                     5    ENQ  NAK  %    5    E    U    e    u
1285
 
1286
                     7    BEL  ETB  '    7    G    W    g    w
1287
                T    8    BS   CAN  (    8    H    X    h    x
1288
                O    9    HT   EM   )    9    I    Y    i    y
1289
                     A    LF   SUB  *    :    J    Z    j    z
1290
                3    B    VT   ESC  +    ;    K    [    k    {
1291
                     C    FF   FS   ,    <    L    \    l    ;
1292
                     D    CR   GS   -    =    M    ]    m    }
1293
                     E    SO   RS   .    >    N    ^    n    ~
1294
                     F    S1   US   /    ?    O    _    o    DEL
1295
 
1296
 
1297
 
1298
 
1299
 
1300
 
1301
 
1302
 
1303
 
1304
 
1305
 
1306
 
1307
 
1308
 
1309
 
1310
 
1311
 
1312
 
1313
 
1314
 
1315
 
1316
 
1317
 
1318
                                17
1319
 
1320
 
1321
 
1322
 
1323
                                   Freeware Assemblers User's Manual
1324
 
1325
 
1326
                              APPENDIX B
1327
                           ADDRESSING MODES
1328
 
1329
B.1   M6800/M6801 ADDRESSING MODES.
1330
 
1331
INHERENT OR ACCUMULATOR ADDRESSING
1332
The M6800 includes some instructions which require no operands. These
1333
instructions are self-contained and employ the inherent addressing or
1334
the accumulator addressing mode.
1335
 
1336
 
1337
IMMEDIATE ADDRESSING
1338
Immediate addressing refers to the use of one or two bytes of
1339
information that immediately follow the operation code in memory.
1340
Immediate addressing is indicated by preceding the operand field with
1341
the pound sign or number sign character (#). The expression following
1342
the # will be assigned one or two bytes of storage, depending on the
1343
instruction.
1344
 
1345
 
1346
RELATIVE ADDRESSING
1347
Relative addressing is used by branch instructions. Branches can only
1348
be executed within the range -126 to +129 bytes relative to the first
1349
byte of the branch instruction.  For this mode, the programmer
1350
specifies the branch address expression and places it in the operand
1351
field. The actual branch offset is calculated by the assembler and put
1352
into the second byte of the branch instruction.  The offset is the
1353
two's complement of the difference between the location of the byte
1354
immediately following the branch instruction and the location of the
1355
destination of the branch.  Branches out of bounds are flagged as
1356
errors by the assembler.
1357
 
1358
 
1359
INDEXED ADDRESSING
1360
Indexed addressing is relative to the index register. The address is
1361
calculated at the time of instruction execution by adding a one-byte
1362
displacement (in the second byte of the instruction) to the current
1363
contents of the X register. Since no sign extension is performed on
1364
this one-byte displacement, the offset cannot be negative. Indexed
1365
addressing is indicated by the characters ",X" following the
1366
expression in the operand field. The special case of ",X", without a
1367
preceding expression, is treated as "0,X".
1368
 
1369
 
1370
DIRECT AND EXTENDED ADDRESSING
1371
Direct and extended addressing utilize one (direct) or two (extended)
1372
bytes to contain the address of the operand. Direct addressing is
1373
limited to the first 256 bytes of memory. Direct and extended
1374
addressing are indicated by only having an expression in the operand
1375
field. Direct addressing will be used by the Assembler whenever
1376
possible.
1377
 
1378
 
1379
 
1380
 
1381
 
1382
 
1383
 
1384
                                18
1385
 
1386
 
1387
 
1388
 
1389
                                   Freeware Assemblers User's Manual
1390
 
1391
 
1392
B.2   M6804/M68HC04 ADDRESSING MODES.
1393
 
1394
INHERENT OR ACCUMULATOR ADDRESSING
1395
The M6800 includes some instructions which require no operands. These
1396
instructions are self-contained and employ the inherent addressing or
1397
the accumulator addressing mode.
1398
 
1399
 
1400
IMMEDIATE ADDRESSING
1401
Immediate addressing refers to the use of one byte of information that
1402
immediately follows the operation code in memory. Immediate addressing
1403
is indicated by preceding the operand field with the pound sign or
1404
number sign character (#). The expression following the # will be
1405
assigned one byte of storage.
1406
 
1407
 
1408
RELATIVE ADDRESSING
1409
Relative addressing is used by branch instructions. Branches can only
1410
be executed within the range -15 to +16 bytes relative to the first
1411
byte of the branch instruction.  For this mode, the programmer
1412
specifies the branch address expression and places it in the operand
1413
field. The actual branch offset is calculated by the assembler and put
1414
into the second byte of the branch instruction.  The offset is the
1415
two's complement of the difference between the location of the byte
1416
immediately following the branch instruction and the location of the
1417
destination of the branch.  Branches out of bounds are flagged as
1418
errors by the assembler.
1419
 
1420
 
1421
DIRECT AND EXTENDED ADDRESSING
1422
Direct and extended addressing utilize byte to contain the address of
1423
the operand. Direct addressing is limited to the first 256 bytes of
1424
memory.  Extended addressing concatenates the four least-significant
1425
bits of the opcode with the byte following the opcode to form a 12-bit
1426
address. Direct and extended addressing are indicated by only having
1427
an expression in the operand field.  Direct addressing will be used by
1428
the Assembler whenever possible.
1429
 
1430
 
1431
SHORT DIRECT
1432
Some opcodes allow 4 memory locations in data space ram ($80, $81,
1433
$82, and $83 to be referenced as part of the opcode.  The opcode
1434
determines the data space RAM location, and the instruction is only
1435
one byte.  The X and Y registers are at locations $80 and $81,
1436
respectively.   An expression used with short direct addressing must
1437
not be forward referenced (that is its definition must occur before,
1438
not after this point in the file) and must equate to the range $80-
1439
$83.
1440
 
1441
 
1442
BIT SET AND CLEAR
1443
In the bit set/clear addressing mode, the bit to be set or cleared is
1444
part of the opcode.  The byte following the opcode specifies the
1445
direct address of the byte which will have the bit set or cleared.
1446
Any bit in the 256 byte data space memory that can be written (with
1447
 
1448
 
1449
 
1450
                                19
1451
 
1452
 
1453
 
1454
 
1455
                                   Freeware Assemblers User's Manual
1456
 
1457
 
1458
the exception of the data direction registers) can be set or cleared
1459
with these two byte instructions.
1460
 
1461
 
1462
BIT TEST AND BRANCH
1463
The bit test and branch addressing mode is a combination of the direct
1464
addressing and relative addressing.  The bit to be tested, and it
1465
condition (set or clear), is included in the opcode.  The data space
1466
address of the byte to be tested is in the single byte immediately
1467
following the opcode byte and follows direct addressing rules.  The
1468
third byte is sign extended by the processor during execution to form
1469
the 12-bit relative address which is added to the program counter if
1470
the condition is true.  This allows branches based on any readable bit
1471
in the data space.  The branch span is -125 to +130 from the opcode
1472
address.  The branch target address is used by the programmer to
1473
signify the relative offset -- the assembler calculates the offset
1474
value.  Branches out of bounds are flagged as errors by the
1475
assembler.
1476
 
1477
 
1478
REGISTER INDIRECT
1479
In the register indirect mode, the operand is at the address in data
1480
space pointed to by the contents of one of the indirect registers, X
1481
or Y.  The particular indirect register is encoded in bit 4 of the
1482
opcode by the assembler.  The assembler  operand syntax for register
1483
indirect is
1484
 
1485
                    [<X> or <Y>]
1486
 
1487
 
1488
MOVE IMMEDIATE
1489
The MVI (move immediate) instruction has its own format:
1490
 
1491
         mvi   <expression 1>,#<expression 2>
1492
 
1493
where <expression 1> is a direct address and <expression 2> is the
1494
data value to be written.
1495
 
1496
 
1497
MISCELLANEOUS SYNTAX ISSUES
1498
The registers in the 6804/HC6804 are memory locations and have
1499
addresses assigned to them.  The assembler has predefined
1500
 
1501
           a = A = $FF
1502
           b = B = $80
1503
           c = C = $81
1504
 
1505
This also means that for the '04 assembler clr x is equivalent to clrx
1506
since x is both a register and a memory location.
1507
 
1508
The '04 series has separate program and data spaces.  There is no
1509
program memory in the range $10-$7F.  Bytes assembled into that range
1510
will go into the data space.
1511
 
1512
 
1513
 
1514
 
1515
 
1516
                                20
1517
 
1518
 
1519
 
1520
 
1521
                                   Freeware Assemblers User's Manual
1522
 
1523
 
1524
B.3   M6805/68HC05 ADDRESSING MODES.
1525
 
1526
INHERENT OR ACCUMULATOR ADDRESSING
1527
The M6805 includes some instructions which require no operands. These
1528
instructions are self-contained, and employ the inherent addressing or
1529
the accumulator addressing mode.
1530
 
1531
 
1532
IMMEDIATE ADDRESSING
1533
Immediate addressing refers to the use of one byte of information that
1534
immediately follows the operation code in memory. Immediate addressing
1535
is indicated by preceding the operand field with the pound sign or
1536
number sign character (#). The expression following the # will be
1537
assigned one byte of storage.
1538
 
1539
 
1540
RELATIVE ADDRESSING
1541
Relative addressing is used by branch instructions. Branches can only
1542
be executed within the range -126 to +129 bytes relative to the first
1543
byte of the branch instruction. For this mode, the programmer
1544
specifies the branch address expression and places it in the operand
1545
field. The actual branch offset is calculated by the assembler and put
1546
into the second byte of the branch instruction.  The offset is the
1547
two's complement of the difference between the location of the byte
1548
immediately following the branch instruction and the location of the
1549
destination of the branch.  Branches out of bounds are flagged as
1550
errors by the assembler.
1551
 
1552
 
1553
INDEXED ADDRESSING
1554
Indexed addressing is relative to the index register. The address is
1555
calculated at the time of instruction execution by adding a one- or
1556
two-byte displacement to the current contents of the X register. The
1557
displacement immediately follows the operation code in memory.  If the
1558
displacement is zero, no offset is added to the index register.  In
1559
this case, only the operation code resides in memory.  Since no sign
1560
extension is performed on a one-byte displacement, the offset cannot
1561
be negative. Indexed addressing is indicated by the characters ",X"
1562
following the expression in the operand field.  The special case of
1563
",X", without a preceding expression, is treated as "0,X". Some
1564
instructions do not allow a two-byte displacement.
1565
 
1566
 
1567
DIRECT AND EXTENDED ADDRESSING
1568
Direct and extended addressing utilize one (direct) or two (extended)
1569
bytes to contain the address of the operand. Direct addressing is
1570
limited to the first 256 bytes of memory.  Direct and extended
1571
addressing are indicated by only having an expression in the operand
1572
field. Some instructions do not allow extended addressing.  Direct
1573
addressing will be used by the Macro Assembler whenever possible.
1574
 
1575
 
1576
BIT SET OR CLEAR
1577
The addressing mode used for this type of instruction is direct,
1578
although the format of the operand field is different from the direct
1579
addressing mode described above. The operand takes the form
1580
 
1581
 
1582
                                21
1583
 
1584
 
1585
 
1586
 
1587
                                   Freeware Assemblers User's Manual
1588
 
1589
 
1590
<expression 1>, <expression 2>. <expression 1> indicates which bit is
1591
to be set or cleared.  It must be an absolute expression in the range
1592
0-7. It is used in generating the operation code.  <expression 2> is
1593
handled as a direct address, as described above.  Since the bit
1594
manipulation address is direct, only the first 256 locations may be
1595
operated on by bit manipulation operations.
1596
 
1597
 
1598
BIT TEST AND BRANCH
1599
This combines two addressing modes: direct and relative. The format of
1600
the operand is: <expression 1>, <expression 2>, <expression 3>.
1601
<expression 1> and <expression 2> are handled in the same manner as
1602
described above in "bit set or clear". <expression 3> is used to
1603
generate a relative address, as described above in "relative
1604
addressing".
1605
 
1606
 
1607
B.4  M6809 ADDRESSING MODES.
1608
 
1609
INHERENT OR ACCUMULATOR ADDRESSING
1610
The M6809 includes some instructions which require no operands. These
1611
instructions are self-contained, and employ the inherent addressing or
1612
the accumulator addressing mode.
1613
 
1614
 
1615
IMMEDIATE ADDRESSING
1616
Immediate addressing refers to the use of one or two bytes of
1617
information that immediately follow the operation code in memory.
1618
Immediate addressing is indicated by preceding the operand field with
1619
the pound sign or number sign (#) -- i.e., #<expression>.  The
1620
expression following the # will be assigned one or two bytes of
1621
storage, depending on the instruction. All instructions referencing
1622
the accumulator "A" or "B", or the condition code register "CC", will
1623
generate a one-byte immediate value. Also, immediate addressing used
1624
with the PSHS, PULS, PSHU, and PULU instructions generates a one-byte
1625
immediate value. Immediate operands used in all other instructions
1626
generate a two-byte value.
1627
 
1628
The register list operand does not take the form #<expression> but
1629
still generates one byte of immediate data. The form of the operand
1630
is:
1631
 
1632
                            R1,R2,...,Rn
1633
 
1634
where Ri (i=1 to n)  is one of the symbols A, B, CC, D, DP, PC, S, U,
1635
X or Y. The number and type of symbols vary, depending on the specific
1636
instruction.
1637
 
1638
For the instructions PSHS, PULS, PSHU, and PULU, any of the above
1639
register names may be included in the register list. The only
1640
restriction is that "U" cannot be specified with PSHU or PULU, and "S"
1641
cannot be specified with PSHS  or PULS. The one-byte immediate value
1642
assigned to the operand is calculated by the assembler and is
1643
determined by the registers specified. Each register name causes the
1644
assembler to set a bit in the immediate byte as follows:
1645
 
1646
 
1647
 
1648
                                 22
1649
 
1650
 
1651
 
1652
 
1653
                                   Freeware Assemblers User's Manual
1654
 
1655
 
1656
          Register  Bit
1657
          --------  ---
1658
 
1659
            PC      7
1660
            U,S     6
1661
            Y       5
1662
            X       4
1663
            DP      3
1664
            B,D     2
1665
            A,D     1
1666
            CC      0
1667
 
1668
 
1669
For the instructions EXG and TFR, exactly two of the above register
1670
names must be included in the register list. The other restriction is
1671
the size of the registers specified. For the EXG instruction, the two
1672
registers must be the same size. For the TFR instruction, the two
1673
registers must be the same size, or the first can be a 16-bit register
1674
and the second an 8-bit register. In the case where the transfer is
1675
from a 16-bit register to an 8-bit register, the least significant 8
1676
bits are transferred.  The 8-bit registers are A, B, CC, and DP.  The
1677
16-bit registers are D, PC, S, U, X, and Y.  The one-byte immediate
1678
value assigned to the operand by the assembler is determined by the
1679
register names. The most significant four bits of the immediate byte
1680
contain the value of the first register name; the least significant
1681
four bits contain the value of the second register, as shown by the
1682
following table:.
1683
 
1684
 
1685
          Register  Value (hex)
1686
          --------  -----------
1687
 
1688
             D          0
1689
             X          1
1690
             Y          2
1691
             U          3
1692
             S          4
1693
             PC         5
1694
             A          8
1695
             B          9
1696
             CC         A
1697
             DP         B
1698
 
1699
 
1700
RELATIVE  ADDRESSING
1701
Relative addressing is used by branch instructions. There are two
1702
forms of the branch instruction. The short branch can only be executed
1703
within the range -126 to +129 bytes relative to the first byte of the
1704
branch instruction. For this mode, the programmer specifies the branch
1705
address expression and places it in the operand field. The actual
1706
branch offset is calculated by the assembler and put into the second
1707
byte of the branch instruction. The long branch can execute in the
1708
full range of addressing from 0000-FFFF (hexadecimal) because a two-
1709
byte offset is calculated by the assembler and put into the operand
1710
field of the branch instruction.  The offset is the two's complement
1711
of the difference between the location of the byte immediately
1712
 
1713
 
1714
                                23
1715
 
1716
 
1717
 
1718
 
1719
                                   Freeware Assemblers User's Manual
1720
 
1721
 
1722
following the branch instruction and the location of the destination
1723
of the branch.
1724
 
1725
 
1726
DIRECT AND EXTENDED ADDRESSING
1727
Direct and extended addressing utilize one (direct) or two (extended)
1728
bytes to contain the address of the operand. Direct and extended
1729
addressing are indicated by having only an expression in the operand
1730
field (i.e., <expression>). Direct addressing will be used whenever
1731
possible.
1732
 
1733
Regardless of the criteria described above, it is possible to force
1734
the Assembler to use the direct addressing mode by preceding the
1735
operand with the "<" character. Similarly, extended addressing can be
1736
forced by preceding the operand with the ">" character.  These two
1737
operand forms are: <<expression> and ><expression>.
1738
 
1739
 
1740
INDEXED ADDRESSING
1741
Indexed addressing is relative to one of the index registers. The
1742
general form is <expression>,R. The address is calculated at the time
1743
of instruction execution by adding the value of <expression> to the
1744
current contents of the index register. The other general form is
1745
[<expression>,R].   In this indirect form, the address is calculated
1746
at the time of instruction execution by first adding the value of
1747
<expression> to the current contents of the index register, and then
1748
retrieving the two bytes from the calculated address and address+1.
1749
This two-byte value is used as the effective address of the operand.
1750
The allowable forms of indexed addressing are described below.  In the
1751
description below, R refers to one of the index registers S, U, X, or
1752
Y.
1753
 
1754
The accumulator offset mode allows one of the accumulators to be
1755
specified instead of an <expression>. Valid forms are:.
1756
 
1757
                   <acc>,R and [<acc>,R]
1758
 
1759
where <acc>  is one of the accumulators A, B, or D. This form
1760
generates a one-byte operand (post-byte only). When accumulator A or B
1761
is specified, sign extension occurs prior to adding the value in the
1762
accumulator to the index register.
1763
 
1764
The valid forms for the automatic increment/decrement mode are shown
1765
below.  For each row, the three entries shown are equivalent.
1766
 
1767
 
1768
               R+       ,R+      0,R+
1769
               -R       ,-R      0,-R
1770
               R++      ,R++     0,R++
1771
               --R      ,--R     0,--R
1772
               [R++]    ,R++]    [0,R++]
1773
               [--R]    [,--R]   [0,--R]
1774
 
1775
 
1776
In this form, the only valid expression is 0. Like the accumulator
1777
offset mode, this form generates a one-byte operand (post-byte only).
1778
 
1779
 
1780
                                24
1781
 
1782
 
1783
 
1784
 
1785
                                   Freeware Assemblers User's Manual
1786
 
1787
 
1788
The valid forms for the expression offset mode are:
1789
 
1790
 
1791
               R       ,R     <expression>,R
1792
               [R]     [,R]   [<expression>,R]
1793
               <R      <,R    <<expression>,R
1794
               <[R]    <[,R]  <[<expression>,R]
1795
               >R      >,R    ><expression>,R
1796
               >[R]    >[,R]  >[<expression>,R]
1797
 
1798
 
1799
The "<" and ">" characters force an 8- or 16-bit offset, respectively,
1800
and are described below. If no expression is specified, or if an
1801
expression with a value of zero is specified, only the postbyte of
1802
the operand is generated. If an expression with a value in the range
1803
-16 to +15 is specified without indirection, a one- byte operand is
1804
generated which contains the expression's value, as well as the index
1805
register indicator. At execution time, the expression's value is
1806
expanded to 16 bits with sign extension before being added to the
1807
index register.
1808
 
1809
All other forms will generate a post-byte, as well as either a one- or
1810
two-byte offset which contains the value of the expression. The size
1811
of the offset is determined by the type and size of the expression.
1812
Expressions with values in the range -128 to +127 generate an 8-bit
1813
offset.   All other cases will result in a 16-bit offset being
1814
generated. In the case where an 8-bit offset is generated, the value
1815
is expanded to 16 bits with sign extension at execution time.
1816
 
1817
Regardless of the criteria described above, it is possible to force
1818
the Assembler to generate an 8-bit offset by preceding the operand
1819
with the "<" character. Similarly, a 16-bit offset can be forced by
1820
preceding the operand with the ">" character.
1821
 
1822
If the relative address calculated is not in the range -128 to +127,
1823
or if the expression references a symbol that has not yet been
1824
defined, a two-byte offset is generated after the post-byte. A one-
1825
byte offset is generated if the relative address is in the range -128
1826
to +127.
1827
 
1828
Like the expression offset mode, a one-byte offset can be forced by
1829
preceding the operand with a "<".  A ">" forces a two-byte offset. A
1830
byte overflow error is generated if a one-byte offset is forced when
1831
the relative address is not in the range -12
1832
8 to +127.
1833
 
1834
The extended indirect mode has the form:
1835
 
1836
                     [<expression>]
1837
 
1838
Although extended indirect is a logical extension of the extended
1839
addressing mode, this mode is implemented using an encoding of the
1840
postbyte under the indexed addressing mode.  A post-byte and a two-
1841
byte offset which contains the value of the expression is generated.
1842
 
1843
 
1844
 
1845
 
1846
                                25
1847
 
1848
 
1849
 
1850
 
1851
                                   Freeware Assemblers User's Manual
1852
 
1853
 
1854
B.5  M68HC11 ADDRESSING MODES.
1855
 
1856
PREBYTE
1857
The number of combinations of instructions and addressing modes for
1858
the 68HC11 is larger than that possible to be encoded in an 8-bit word
1859
(256 combinations).  To expand the opcode map, certain opcodes ($18,
1860
$1A, and $CD) cause the processor to fetch the next address to find
1861
the actual instruction.  These opcodes are known as prebytes and are
1862
inserted automatically by the assembler for those instructions that
1863
require it.l  In general the instructions contained in the alternate
1864
maps are those involving the Y register or addressing modes that
1865
involve the Y index register.  Thus the programmer make the tradeoff
1866
between the convenience of using the second index register and the
1867
additional time and code space used by the prebyte.
1868
 
1869
 
1870
INHERENT OR ACCUMULATOR ADDRESSING
1871
The M68HC11 includes some instructions which require no operands.
1872
These instructions are self-contained, and employ the inherent
1873
addressing or the accumulator addressing mode.
1874
 
1875
 
1876
IMMEDIATE ADDRESSING
1877
Immediate addressing refers to the use of one or more bytes of
1878
information that immediately follow the operation code in memory.
1879
Immediate addressing is indicated by preceding the operand field with
1880
the pound sign or number sign character (#). The expression following
1881
the # will be assigned one byte of storage.
1882
 
1883
 
1884
RELATIVE ADDRESSING
1885
Relative addressing is used by branch instructions. Branches can only
1886
be executed within the range -126 to +129 bytes relative to the first
1887
byte of the branch instruction. For this mode, the programmer
1888
specifies the branch address expression and places it in the operand
1889
field. The actual branch offset is calculated by the assembler and put
1890
into the second byte of the branch instruction.  The offset is the
1891
two's complement of the difference between the location of the byte
1892
immediately following the branch instruction and the location of the
1893
destination of the branch.  Branches out of bounds are flagged as
1894
errors by the assembler.
1895
 
1896
 
1897
INDEXED ADDRESSING
1898
Indexed addressing is relative one of the index registers X or Y.  The
1899
address is calculated at the time of instruction execution by adding a
1900
one-byte displacement to the current contents of the X register. The
1901
displacement immediately follows the operation code in memory.  If the
1902
displacement is zero, zero resides in the byte following the opcode.
1903
Since no sign extension is performed on a one-byte displacement, the
1904
offset cannot be negative. Indexed addressing is indicated by the
1905
characters ",X" following the expression in the operand field.  The
1906
special case of ",X", without a preceding expression, is treated as
1907
"0,X".
1908
 
1909
 
1910
 
1911
 
1912
                                26
1913
 
1914
 
1915
 
1916
 
1917
                                   Freeware Assemblers User's Manual
1918
 
1919
 
1920
DIRECT AND EXTENDED ADDRESSING
1921
Direct and extended addressing utilize one (direct) or two (extended)
1922
bytes to contain the address of the operand. Direct addressing is
1923
limited to the first 256 bytes of memory.  Direct and extended
1924
addressing are indicated by only having an expression in the operand
1925
field.  Direct addressing will be used by the Assembler whenever
1926
possible.
1927
 
1928
 
1929
BIT(S) SET OR CLEAR
1930
The addressing mode used for this type of instruction is direct,
1931
although the format of the operand field is different from the direct
1932
addressing mode described above. The operand takes the form
1933
<expression 1> <expression 2> where the two expressions are separated
1934
by a blank.   <expression 1> signifies the operand address and may be
1935
either a direct or an indexed address.  When the address mode is
1936
indexed, <expression  1> is followed by ',R' where R is either X or Y.
1937
This allows bit manipulation instructions to operate across the
1938
complete 64K address map.  <expression 2> is the mask byte.  The
1939
bit(s) to be set or cleared are indicated by ones in the corresponding
1940
location(s) in the mask byte.  The mask byte must be an expression in
1941
the range 0-255 and is encoded by the programmer.
1942
 
1943
 
1944
BIT TEST AND BRANCH
1945
This combines two addressing modes: direct or indexed and relative.
1946
The format of the operand is: <expression 1> <expression 2>
1947
<expression 3> where the expressions are separated by blanks.
1948
<expression 1>  identifies the operand an may indicate either a direct
1949
or indexed address.  Indexed addresses are signified with ',R'
1950
following the expression where R is either X or Y. <expression 2> is
1951
the mask byte.  The bit(s) to be set or cleared are indicated by ones
1952
in the corresponding location(s) in the mask byte.  The mask byte must
1953
be an expression in the range 0-255 and is encoded by the programmer.
1954
<expression 3> is used to generate a relative address, as described
1955
above in "relative addressing".
1956
 
1957
 
1958
 
1959
 
1960
 
1961
 
1962
 
1963
 
1964
 
1965
 
1966
 
1967
 
1968
 
1969
 
1970
 
1971
 
1972
 
1973
 
1974
 
1975
 
1976
 
1977
 
1978
                                27
1979
 
1980
 
1981
 
1982
 
1983
                                   Freeware Assemblers User's Manual
1984
 
1985
 
1986
                               APPENDIX C
1987
                            DIRECTIVE SUMMARY
1988
 
1989
 
1990
A complete description of all directives appears in Chapter 4.
1991
 
1992
 
1993
ASSEMBLY CONTROL
1994
 
1995
     ORG  Origin program counter
1996
 
1997
SYMBOL DEFINITION
1998
 
1999
     EQU  Assign permanent value
2000
 
2001
DATA DEFINITION/STORAGE ALLOCATION
2002
 
2003
     BSZ  Block storage of zero; single bytes
2004
 
2005
     FCB  Form constant byte
2006
 
2007
     FCC  Form constant character string
2008
 
2009
     FDB  Form constant double byte
2010
 
2011
     FILL Initialize a block of memory to a constant
2012
 
2013
     RMB  Reserve memory; single bytes
2014
 
2015
     ZMB  Zero Memory Bytes; same and BSZ
2016
 
2017
 
2018
 LISTING CONTROL
2019
 
2020
     OPT c     Enable cycle counting
2021
 
2022
     OPT cre   Print cross reference table
2023
 
2024
     OPT l     Print source listing from this point
2025
 
2026
     OPT nol   Inhibit printing of source listing from this point
2027
 
2028
     OPT s     Print symbol table
2029
 
2030
     PAGE Print subsequent statements on top of next page
2031
 
2032
 
2033
 
2034
 
2035
 
2036
 
2037
 
2038
 
2039
 
2040
 
2041
 
2042
 
2043
 
2044
                                28
2045
 
2046
 
2047
 
2048
 
2049
                                   Freeware Assemblers User's Manual
2050
 
2051
 
2052
                              APPENDIX D
2053
                        ASSEMBLER LISTING FORMAT
2054
 
2055
 
2056
The Assembler listing has the following format:
2057
 
2058
    LINE#   ADDR  OBJECT CODE BYTES       [ # CYCLES]  SOURCE LINE
2059
 
2060
The LINE# is a 4 digit decimal number printed as a reference.  This
2061
reference number is used in the cross reference.  The ADDR is the hex
2062
value of the address for the first byte of the object code for this
2063
instruction.   The OBJECT CODE BYTES are the assembled object code of
2064
the source line in hex.  If an source line causes more than 6 bytes
2065
to be output (e.g. a long FCC directive), additional bytes (up to 64)
2066
are listed on succeeding lines with no address preceding them.
2067
 
2068
The # CYCLES will only appear in the listing if the "c" option is in
2069
effect.  It is enclosed in brackets which helps distinguish it from
2070
the source listing.  The SOURCE LINE is reprinted exactly from the
2071
source program, including labels.
2072
 
2073
The symbol table has the following format:
2074
 
2075
     SYMBOL    ADDR
2076
 
2077
The symbol is taken directly from the label field in the source
2078
program.  The ADDR is the hexadecimal address of the location
2079
referenced by the symbol.
2080
 
2081
The cross reference listing has the following format:
2082
 
2083
     SYMBOL   ADDR   *LOC1 LOC2 LOC3 ...
2084
 
2085
The SYMBOL and ADDR are the same as above. The * indicates the start
2086
of the line reference numbers.  The LOCs are the decimal line numbers
2087
of the assembler listing where the label occurs.
2088
 
2089
 
2090
 
2091
 
2092
 
2093
 
2094
 
2095
 
2096
 
2097
 
2098
 
2099
 
2100
 
2101
 
2102
 
2103
 
2104
 
2105
 
2106
 
2107
 
2108
 
2109
 
2110
                                29
2111
 
2112
 
2113
 
2114
 
2115
                                   Freeware Assemblers User's Manual
2116
 
2117
 
2118
                              APPENDIX E
2119
                         S-RECORD INFORMATION
2120
 
2121
 
2122
E.1   INTRODUCTION
2123
 
2124
The S-record output format encodes program and data object modules
2125
into a printable (ASCII) format.  This allows viewing of the object
2126
file with standard tools and allows display of the module while
2127
transferring from one computer to the next or during loads between a
2128
host and target.  The S-record format also includes information for
2129
use in error checking to insure the integrity of data transfers.
2130
 
2131
 
2132
E.2   S-RECORD CONTENT
2133
 
2134
S-Records are character strings made of several fields which identify
2135
the record type, record length, memory address, code/data, and
2136
checksum.  Each byte of binary data is encoded as a 2-character
2137
hexadecimal number:  the first character representing the high-order
2138
4 bits, and the second the low-order 4 bits of the byte.
2139
 
2140
The 5 fields which comprise an S-record are:
2141
 
2142
      TYPE  RECORD LENGTH   ADDRESS   CODE/DATA  CHECKSUM
2143
 
2144
The fields are defined as follows:
2145
 
2146
     FIELD      CHARACTERS                   CONTENTS
2147
     -----      ----------                   --------
2148
     Type           2          S-record type - S1, S9, etc.
2149
 
2150
     Record         2          The count of the character pairs in the
2151
     length                    record, excluding the type and record
2152
                               length.
2153
 
2154
     Address      4, 6,        The 2-, 3-, or 4-byte address at which
2155
                  or 8         the data field is to be loaded into
2156
                               memory.
2157
 
2158
     Code/data    0-2n         From 0 to n bytes of executable code,
2159
                               memory loadable data, or descriptive
2160
                               information.
2161
 
2162
     Checksum       2          The least significant byte of the one's
2163
                               complement of the sum of the values
2164
                               represented by the pairs of characters
2165
                               making up the record length, address,
2166
                               and the code/data fields.
2167
 
2168
Each record may be terminated with a CR/LF/NULL.
2169
 
2170
 
2171
E.3   S-RECORD TYPES
2172
 
2173
Eight types of s-records have been defined to accommodate various
2174
 
2175
 
2176
                                30
2177
 
2178
 
2179
 
2180
 
2181
                                   Freeware Assemblers User's Manual
2182
 
2183
 
2184
encoding, transportation, and decoding needs.  The Freeware
2185
assemblers use only two types, the S1 and S9:
2186
 
2187
     S1   A record containing code/data and the 2-byte
2188
          address at which the code/data is to reside.
2189
 
2190
     S9   A termination record for a block of S1 records. The address
2191
          field may optionally contain the 2-byte address of the
2192
          instruction to which control is to be passed.  If not
2193
          specified, the first entry point specifica
2194
          tion encountered in the object module input will be used.
2195
          There is no code/data field.
2196
 
2197
E.4   S-RECORD EXAMPLE
2198
 
2199
The following is a typical S-record module:
2200
 
2201
          S1130000285F245F2212226A000424290008237C2A
2202
          S11300100002000800082629001853812341001813
2203
          S113002041E900084E42234300182342000824A952
2204
          S107003000144ED492
2205
          S9030000FC
2206
 
2207
The module consists of four code/data records and an S9 termination
2208
record.
2209
 
2210
The first S1 code/data record is explained as follows:
2211
 
2212
     S1   S-record type S1, indicating a code/data record to be
2213
          loaded/verified at a 2-byte address.
2214
 
2215
     13   Hex 13 (decimal 19), indicating 19 character pairs,
2216
          representing 19 bytes of  binary data, follow.
2217
 
2218
     00   Four-character 2-byte address field:  hex address 0000,
2219
          indicates location where the following data is to be loaded.
2220
 
2221
     The next 16 character pairs are the ASCII bytes of the actual
2222
     program code/data
2223
 
2224
     2A   Checksum of the first S1 record.
2225
 
2226
The second and third S1 code/data records each also contain $13
2227
character pairs and are ended with checksums.  The fourth S1 code/data
2228
record contains 7 character pairs.
2229
 
2230
The S9 termination record is explained as follows:
2231
 
2232
     S9   S-record type S9, indicating a termination record.
2233
 
2234
     03   Hex 03, indicating three character pairs (3 bytes) to
2235
          follow.
2236
 
2237
     00   Four character 2-byte address field, zeroes.
2238
     00
2239
 
2240
     FC   Checksum of  S9 record.
2241
 
2242
                                31
2243
 
2244
 
2245
 

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