1 |
99 |
davidgb |
--===========================================================================--
|
2 |
|
|
-- --
|
3 |
|
|
-- Synthesizable Character Generator using Xilinx RAMB16_S9 Block RAM --
|
4 |
|
|
-- --
|
5 |
|
|
--===========================================================================--
|
6 |
19 |
dilbert57 |
--
|
7 |
99 |
davidgb |
-- File name : char_rom2k_b16.vhd
|
8 |
|
|
--
|
9 |
|
|
-- Entity name : char_rom
|
10 |
19 |
dilbert57 |
--
|
11 |
99 |
davidgb |
-- Purpose : Implements a character generator ROM
|
12 |
|
|
-- using one Xilinx RAMB16_S9 Block RAM
|
13 |
|
|
-- Used by vdu8.vhd in the System09 SoC
|
14 |
|
|
--
|
15 |
|
|
-- Dependencies : ieee.std_logic_1164
|
16 |
|
|
-- ieee.std_logic_arith
|
17 |
19 |
dilbert57 |
--
|
18 |
99 |
davidgb |
-- Uses : RAMB16_S9 (Xilinx 16KBit Block RAM)
|
19 |
|
|
--
|
20 |
|
|
-- Author : John E. Kent
|
21 |
|
|
--
|
22 |
|
|
-- Email : dilbert57@opencores.org
|
23 |
|
|
--
|
24 |
|
|
-- Web : http://opencores.org/project,system09
|
25 |
|
|
--
|
26 |
|
|
-- Description : Characters are 7 pixels x 11 rows x 128 characters
|
27 |
|
|
-- Stored as 8 bits x 16 locations x 128 characters
|
28 |
|
|
--
|
29 |
|
|
-- Copyright (C) 2003 - 2010 John Kent
|
30 |
|
|
--
|
31 |
|
|
-- This program is free software: you can redistribute it and/or modify
|
32 |
|
|
-- it under the terms of the GNU General Public License as published by
|
33 |
|
|
-- the Free Software Foundation, either version 3 of the License, or
|
34 |
|
|
-- (at your option) any later version.
|
35 |
|
|
--
|
36 |
|
|
-- This program is distributed in the hope that it will be useful,
|
37 |
|
|
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
38 |
|
|
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
39 |
|
|
-- GNU General Public License for more details.
|
40 |
|
|
--
|
41 |
|
|
-- You should have received a copy of the GNU General Public License
|
42 |
|
|
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
|
43 |
|
|
--
|
44 |
|
|
--===========================================================================--
|
45 |
|
|
-- --
|
46 |
|
|
-- Revision History --
|
47 |
|
|
-- --
|
48 |
|
|
--===========================================================================--
|
49 |
|
|
--
|
50 |
|
|
-- Version Date Author Changes
|
51 |
|
|
--
|
52 |
|
|
-- 0.1 2004-10-18 John Kent Initial relaease
|
53 |
|
|
--
|
54 |
|
|
-- 0.2 2010-06-17 John Kent Updated header and description and added GPL
|
55 |
|
|
--
|
56 |
19 |
dilbert57 |
|
57 |
|
|
library IEEE;
|
58 |
|
|
use IEEE.STD_LOGIC_1164.ALL;
|
59 |
|
|
use IEEE.STD_LOGIC_ARITH.ALL;
|
60 |
|
|
library unisim;
|
61 |
|
|
use unisim.vcomponents.all;
|
62 |
|
|
|
63 |
|
|
entity char_rom is
|
64 |
|
|
Port (
|
65 |
99 |
davidgb |
clk : in std_logic;
|
66 |
|
|
rst : in std_logic;
|
67 |
|
|
cs : in std_logic;
|
68 |
|
|
addr : in std_logic_vector (10 downto 0);
|
69 |
|
|
rw : in std_logic;
|
70 |
|
|
data_in : in std_logic_vector (7 downto 0);
|
71 |
|
|
data_out : out std_logic_vector (7 downto 0)
|
72 |
19 |
dilbert57 |
);
|
73 |
|
|
end char_rom;
|
74 |
|
|
|
75 |
|
|
architecture rtl of char_rom is
|
76 |
|
|
|
77 |
|
|
|
78 |
|
|
signal we : std_logic;
|
79 |
|
|
signal dp : std_logic;
|
80 |
|
|
|
81 |
|
|
begin
|
82 |
|
|
|
83 |
|
|
ROM : RAMB16_S9
|
84 |
|
|
generic map (
|
85 |
|
|
INIT_00 => x"0000000009090F09090038043840380000000000070404040400444C54644400",
|
86 |
|
|
INIT_01 => x"00000000110A040A110078407040780000000000110A040A1100380438403800",
|
87 |
|
|
INIT_02 => x"000000000D1215110E0078407040780000000000040404041F00784070407800",
|
88 |
|
|
INIT_03 => x"000000000F080808080070487048700000000000090A0C0A0900487848483000",
|
89 |
|
|
INIT_04 => x"00000000040404041F0044447C444400000000000E010E100E00704870487000",
|
90 |
|
|
INIT_05 => x"00000000040404041F001028444444000000000010101E101F007C4040404000",
|
91 |
|
|
INIT_06 => x"0000000011111E111E003C4040403C000000000008080E080F00404070407800",
|
92 |
|
|
INIT_07 => x"00000000070202020700380438403800000000000E1111110E00380438403800",
|
93 |
|
|
INIT_08 => x"00000000070202060200704848487000000000000F080E080F00704848487000",
|
94 |
|
|
INIT_09 => x"000000000E0107020F00704848487000000000000F0806090700704848487000",
|
95 |
|
|
INIT_0a => x"00000000090A0C0A0900444C546444000000000001010F090900704848487000",
|
96 |
|
|
INIT_0b => x"000000000E090E090E0078407040780000000000111315191100380438403800",
|
97 |
|
|
INIT_0c => x"000000001111151B110078407040780000000000111315191100384040403800",
|
98 |
|
|
INIT_0d => x"000000000E1010100E00784070407800000000000E090E090E00380438403800",
|
99 |
|
|
INIT_0e => x"000000000E010E100E00384858403800000000000E010E100E00404070407800",
|
100 |
|
|
INIT_0f => x"000000000E010E100E00304848484800000000000E010E100E00485070487000",
|
101 |
|
|
INIT_10 => x"0000000008080000080808080808080000000000000000000000000000000000",
|
102 |
|
|
INIT_11 => x"000000002424247E2424247E2424240000000000000000000000001212121200",
|
103 |
|
|
INIT_12 => x"0000000043434020100804020161610000000000083E4909093E4848493E0800",
|
104 |
|
|
INIT_13 => x"00000000000000000000002010080C00000000003D4244444438444444443800",
|
105 |
|
|
INIT_14 => x"0000000020100804040404040810200000000000020408101010101008040200",
|
106 |
|
|
INIT_15 => x"0000000000000808087F0808080000000000000000004122147F142241000000",
|
107 |
|
|
INIT_16 => x"0000000000000000007F00000000000000402010181800000000000000000000",
|
108 |
|
|
INIT_17 => x"0000000040404020100804020101010000000000181800000000000000000000",
|
109 |
|
|
INIT_18 => x"000000003E080808080808082818080000000000081422414141414122140800",
|
110 |
|
|
INIT_19 => x"000000003E410101010E010101413E00000000007F4020100804020141423C00",
|
111 |
|
|
INIT_1a => x"000000003E410101615E404040407F000000000002020202027F22120A060200",
|
112 |
|
|
INIT_1b => x"00000000404020100804020101017F00000000001E214141615E404040211E00",
|
113 |
|
|
INIT_1c => x"000000003C420101013D434141423C00000000003E414141413E414141413E00",
|
114 |
|
|
INIT_1d => x"0000402010181818000000181818000000000000001818180000001818180000",
|
115 |
|
|
INIT_1e => x"00000000000000007F00007F0000000000000000010204081020100804020100",
|
116 |
|
|
INIT_1f => x"00000000080800080808060101413E0000000000402010080402040810204000",
|
117 |
|
|
INIT_20 => x"0000000041414141417F414122140800000000001C224140404E494541221C00",
|
118 |
|
|
INIT_21 => x"000000001E2141404040404041211E00000000007E212121213E212121217E00",
|
119 |
|
|
INIT_22 => x"000000007F404040407C404040407F00000000007C2221212121212121227C00",
|
120 |
|
|
INIT_23 => x"000000001E2141414147404040211E000000000040404040407C404040407F00",
|
121 |
|
|
INIT_24 => x"000000003E0808080808080808083E000000000041414141417F414141414100",
|
122 |
|
|
INIT_25 => x"00000000414244485060504844424100000000003C4202020202020202020700",
|
123 |
|
|
INIT_26 => x"00000000414141414141494955634100000000007F4040404040404040404000",
|
124 |
|
|
INIT_27 => x"000000003E4141414141414141413E0000000000414141434549495161414100",
|
125 |
|
|
INIT_28 => x"000000003D4245494141414141413E000000000040404040407E414141417E00",
|
126 |
|
|
INIT_29 => x"000000003E410101013E404040413E000000000041424448507E414141417E00",
|
127 |
|
|
INIT_2a => x"000000003E414141414141414141410000000000080808080808080808087F00",
|
128 |
|
|
INIT_2b => x"0000000022225555494941414141410000000000080814141422222241414100",
|
129 |
|
|
INIT_2c => x"0000000008080808080814224141410000000000414141221408142241414100",
|
130 |
|
|
INIT_2d => x"000000001E1010101010101010101E00000000007F4040201008040201017F00",
|
131 |
|
|
INIT_2e => x"000000003C0404040404040404043C0000000000010101020408102040404000",
|
132 |
|
|
INIT_2f => x"000000007F000000000000000000000000000000000000000000004122140800",
|
133 |
|
|
INIT_30 => x"000000003F41413F01013E000000000000000000000000000000000204081800",
|
134 |
|
|
INIT_31 => x"000000001E21404040211E0000000000000000005E61616141615E4040404000",
|
135 |
|
|
INIT_32 => x"000000003E40407F41413E0000000000000000003D43414141433D0101010100",
|
136 |
|
|
INIT_33 => x"003C4202023E424242423D0100000000000000001010101010107C1010110E00",
|
137 |
|
|
INIT_34 => x"000000003E0808080808180000080800000000004141414141615E4040404000",
|
138 |
|
|
INIT_35 => x"00000000414448704844414040404000003C4202020202020202020000020200",
|
139 |
|
|
INIT_36 => x"00000000414141494955220000000000000000001C0808080808080808081800",
|
140 |
|
|
INIT_37 => x"000000003E41414141413E0000000000000000004141414141615E0000000000",
|
141 |
|
|
INIT_38 => x"00010101013D434343433D000000000000404040405E616161615E0000000000",
|
142 |
|
|
INIT_39 => x"000000003E01013E40403E0000000000000000002020202020314E0000000000",
|
143 |
|
|
INIT_3a => x"000000003D4242424242420000000000000000000C12101010107C1010101000",
|
144 |
|
|
INIT_3b => x"0000000022554949414141000000000000000000081414222241410000000000",
|
145 |
|
|
INIT_3c => x"003C4202023A4642424242000000000000000000412214081422410000000000",
|
146 |
|
|
INIT_3d => x"00000000070808081020100808080700000000007F20100804027F0000000000",
|
147 |
|
|
INIT_3e => x"0000000070080808040204080808700000000000080808080800080808080800",
|
148 |
|
|
INIT_3f => x"0000000049224922492249224922490000000000000000000000000046493100"
|
149 |
|
|
)
|
150 |
|
|
|
151 |
|
|
port map (
|
152 |
99 |
davidgb |
do => data_out,
|
153 |
22 |
dilbert57 |
dop(0)=> dp,
|
154 |
|
|
addr => addr,
|
155 |
|
|
clk => clk,
|
156 |
99 |
davidgb |
di => data_in,
|
157 |
22 |
dilbert57 |
dip(0)=> dp,
|
158 |
|
|
en => cs,
|
159 |
|
|
ssr => rst,
|
160 |
|
|
we => we
|
161 |
19 |
dilbert57 |
);
|
162 |
|
|
|
163 |
|
|
my_char_rom : process ( rw )
|
164 |
|
|
begin
|
165 |
|
|
we <= not rw;
|
166 |
|
|
end process;
|
167 |
|
|
|
168 |
|
|
end architecture rtl;
|
169 |
|
|
|