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[/] [System09/] [trunk/] [rtl/] [Spartan3/] [sys09s3e_b16.vhd] - Blame information for rev 214

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Line No. Rev Author Line
1 118 dilbert57
--===========================================================================--
2
--                                                                           --
3
--  sys09s3e_b16.vhd - System09 Bug monitor ROM for the Spartan 3E500        --
4
--                                                                           --
5
--===========================================================================--
6
--
7
--  File name      : sys09s3e_b16.vhd
8
--
9
--  Entity name    : SYS09BUG_F000
10
--                   SYS09BUG_F800
11
--
12
--  Purpose        : Implements 4K Monitor ROM for System09
13
--                   using 2 x Spartan 3E RAMB16_S9 block rams
14
--                   Used in the Digilent Spartan 3E500 System09 design
15
--                  
16
--  Dependencies   : ieee.Std_Logic_1164
17
--                   ieee.std_logic_arith
18
--                   unisim.vcomponents
19
--
20
--  Uses           : RAMB16_S9
21
--
22
--  Author         : John E. Kent
23
--
24
--  Email          : dilbert57@opencores.org      
25
--
26
--  Web            : http://opencores.org/project,system09
27
--
28
--
29
--  Copyright (C) 2005 - 2010 John Kent
30
--
31
--  This program is free software: you can redistribute it and/or modify
32
--  it under the terms of the GNU General Public License as published by
33
--  the Free Software Foundation, either version 3 of the License, or
34
--  (at your option) any later version.
35
--
36
--  This program is distributed in the hope that it will be useful,
37
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
38
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
39
--  GNU General Public License for more details.
40
--
41
--  You should have received a copy of the GNU General Public License
42
--  along with this program.  If not, see <http://www.gnu.org/licenses/>.
43
--
44
--===========================================================================--
45
--                                                                           --
46
--                              Revision  History                            --
47
--                                                                           --
48
--===========================================================================--
49
--
50
-- Version Author      Date          Changes
51
-- 0.1     John Kent   unknown       Initial Version
52
-- 0.2     John Kent   2010-09-14    Added Header
53
--                                   renamed rdata & wdata to data_out & data_in
54
--
55
library IEEE;
56
   use IEEE.std_logic_1164.all;
57
   use IEEE.std_logic_arith.all;
58
library unisim;
59
   use unisim.vcomponents.all;
60
 
61
entity SYS09BUG_F000 is
62
   port(
63
      clk      : in  std_logic;
64
      rst      : in  std_logic;
65
      cs       : in  std_logic;
66
      addr     : in  std_logic_vector(10 downto 0);
67
      rw       : in  std_logic;
68
      data_in  : in  std_logic_vector(7 downto 0);
69
      data_out : out std_logic_vector(7 downto 0)
70
   );
71
end SYS09BUG_F000;
72
 
73
architecture rtl of SYS09BUG_F000 is
74
 
75
   type data_array is array(0 to 0) of std_logic_vector(7 downto 0);
76
   signal xdata : data_array;
77
   signal en : std_logic_vector(0 downto 0);
78
   signal dp : std_logic_vector(0 downto 0);
79
   signal we : std_logic;
80
 
81
component RAMB16_S9
82
generic (
83
   INIT_00, INIT_01, INIT_02, INIT_03,
84
   INIT_04, INIT_05, INIT_06, INIT_07,
85
   INIT_08, INIT_09, INIT_0A, INIT_0B,
86
   INIT_0C, INIT_0D, INIT_0E, INIT_0F,
87
   INIT_10, INIT_11, INIT_12, INIT_13,
88
   INIT_14, INIT_15, INIT_16, INIT_17,
89
   INIT_18, INIT_19, INIT_1A, INIT_1B,
90
   INIT_1C, INIT_1D, INIT_1E, INIT_1F,
91
   INIT_20, INIT_21, INIT_22, INIT_23,
92
   INIT_24, INIT_25, INIT_26, INIT_27,
93
   INIT_28, INIT_29, INIT_2A, INIT_2B,
94
   INIT_2C, INIT_2D, INIT_2E, INIT_2F,
95
   INIT_30, INIT_31, INIT_32, INIT_33,
96
   INIT_34, INIT_35, INIT_36, INIT_37,
97
   INIT_38, INIT_39, INIT_3A, INIT_3B,
98
   INIT_3C, INIT_3D, INIT_3E, INIT_3F : bit_vector (255 downto 0)
99
   );
100
 
101
   port (
102
      clk  : in  std_logic;
103
      ssr  : in  std_logic;
104
      en   : in  std_logic;
105
      we   : in  std_logic;
106
      addr : in  std_logic_vector(10 downto 0);
107
      di   : in  std_logic_vector( 7 downto 0);
108
      dip  : in  std_logic_vector( 0 downto 0);
109
      do   : out std_logic_vector( 7 downto 0);
110
      dop  : out std_logic_vector( 0 downto 0)
111
      );
112
     end component RAMB16_S9;
113
 
114
   begin
115
 
116
   ROM00: RAMB16_S9
117
      generic map (
118
         INIT_00 => x"0000000000000000000000000000000000000000000000000000000000000000",
119
         INIT_01 => x"0000000000000000000000000000000000000000000000000000000000000000",
120
         INIT_02 => x"0000000000000000000000000000000000000000000000000000000000000000",
121
         INIT_03 => x"0000000000000000000000000000000000000000000000000000000000000000",
122
         INIT_04 => x"0000000000000000000000000000000000000000000000000000000000000000",
123
         INIT_05 => x"0000000000000000000000000000000000000000000000000000000000000000",
124
         INIT_06 => x"0000000000000000000000000000000000000000000000000000000000000000",
125
         INIT_07 => x"0000000000000000000000000000000000000000000000000000000000000000",
126
         INIT_08 => x"0000000000000000000000000000000000000000000000000000000000000000",
127
         INIT_09 => x"0000000000000000000000000000000000000000000000000000000000000000",
128
         INIT_0a => x"0000000000000000000000000000000000000000000000000000000000000000",
129
         INIT_0b => x"0000000000000000000000000000000000000000000000000000000000000000",
130
         INIT_0c => x"0000000000000000000000000000000000000000000000000000000000000000",
131
         INIT_0d => x"0000000000000000000000000000000000000000000000000000000000000000",
132
         INIT_0e => x"0000000000000000000000000000000000000000000000000000000000000000",
133
         INIT_0f => x"0000000000000000000000000000000000000000000000000000000000000000",
134
         INIT_10 => x"0000000000000000000000000000000000000000000000000000000000000000",
135
         INIT_11 => x"0000000000000000000000000000000000000000000000000000000000000000",
136
         INIT_12 => x"0000000000000000000000000000000000000000000000000000000000000000",
137
         INIT_13 => x"0000000000000000000000000000000000000000000000000000000000000000",
138
         INIT_14 => x"0000000000000000000000000000000000000000000000000000000000000000",
139
         INIT_15 => x"0000000000000000000000000000000000000000000000000000000000000000",
140
         INIT_16 => x"0000000000000000000000000000000000000000000000000000000000000000",
141
         INIT_17 => x"0000000000000000000000000000000000000000000000000000000000000000",
142
         INIT_18 => x"0000000000000000000000000000000000000000000000000000000000000000",
143
         INIT_19 => x"0000000000000000000000000000000000000000000000000000000000000000",
144
         INIT_1a => x"0000000000000000000000000000000000000000000000000000000000000000",
145
         INIT_1b => x"0000000000000000000000000000000000000000000000000000000000000000",
146
         INIT_1c => x"0000000000000000000000000000000000000000000000000000000000000000",
147
         INIT_1d => x"0000000000000000000000000000000000000000000000000000000000000000",
148
         INIT_1e => x"0000000000000000000000000000000000000000000000000000000000000000",
149
         INIT_1f => x"0000000000000000000000000000000000000000000000000000000000000000",
150
         INIT_20 => x"0000000000000000000000000000000000000000000000000000000000000000",
151
         INIT_21 => x"0000000000000000000000000000000000000000000000000000000000000000",
152
         INIT_22 => x"0000000000000000000000000000000000000000000000000000000000000000",
153
         INIT_23 => x"0000000000000000000000000000000000000000000000000000000000000000",
154
         INIT_24 => x"0000000000000000000000000000000000000000000000000000000000000000",
155
         INIT_25 => x"0000000000000000000000000000000000000000000000000000000000000000",
156
         INIT_26 => x"0000000000000000000000000000000000000000000000000000000000000000",
157
         INIT_27 => x"0000000000000000000000000000000000000000000000000000000000000000",
158
         INIT_28 => x"0000000000000000000000000000000000000000000000000000000000000000",
159
         INIT_29 => x"0000000000000000000000000000000000000000000000000000000000000000",
160
         INIT_2a => x"0000000000000000000000000000000000000000000000000000000000000000",
161
         INIT_2b => x"0000000000000000000000000000000000000000000000000000000000000000",
162
         INIT_2c => x"0000000000000000000000000000000000000000000000000000000000000000",
163
         INIT_2d => x"0000000000000000000000000000000000000000000000000000000000000000",
164
         INIT_2e => x"0000000000000000000000000000000000000000000000000000000000000000",
165
         INIT_2f => x"0000000000000000000000000000000000000000000000000000000000000000",
166
         INIT_30 => x"0000000000000000000000000000000000000000000000000000000000000000",
167
         INIT_31 => x"0000000000000000000000000000000000000000000000000000000000000000",
168
         INIT_32 => x"0000000000000000000000000000000000000000000000000000000000000000",
169
         INIT_33 => x"0000000000000000000000000000000000000000000000000000000000000000",
170
         INIT_34 => x"0000000000000000000000000000000000000000000000000000000000000000",
171
         INIT_35 => x"0000000000000000000000000000000000000000000000000000000000000000",
172
         INIT_36 => x"0000000000000000000000000000000000000000000000000000000000000000",
173
         INIT_37 => x"0000000000000000000000000000000000000000000000000000000000000000",
174
         INIT_38 => x"0000000000000000000000000000000000000000000000000000000000000000",
175
         INIT_39 => x"0000000000000000000000000000000000000000000000000000000000000000",
176
         INIT_3a => x"0000000000000000000000000000000000000000000000000000000000000000",
177
         INIT_3b => x"0000000000000000000000000000000000000000000000000000000000000000",
178
         INIT_3c => x"0000000000000000000000000000000000000000000000000000000000000000",
179
         INIT_3d => x"0000000000000000000000000000000000000000000000000000000000000000",
180
         INIT_3e => x"0000000000000000000000000000000000000000000000000000000000000000",
181
         INIT_3f => x"0000000000000000000000000000000000000000000000000000000000000000"
182
      )
183
      port map (
184
         clk     => clk,
185
         ssr     => rst,
186
         en      => en(0),
187
         we      => we,
188
         addr    => addr(10 downto 0),
189
         di      => data_in,
190
         dip(0)  => dp(0),
191
         do      => xdata(0),
192
         dop(0)  => dp(0)
193
      );
194
   rom_glue: process (cs, rw, addr, xdata)
195
   begin
196
      en(0)  <= cs;
197
      data_out  <= xdata(0);
198
      we <= not rw;
199
   end process;
200
end architecture rtl;
201
 
202
library IEEE;
203
   use IEEE.std_logic_1164.all;
204
   use IEEE.std_logic_arith.all;
205
library unisim;
206
   use unisim.vcomponents.all;
207
 
208
entity SYS09BUG_F800 is
209
   port(
210
      clk      : in  std_logic;
211
      rst      : in  std_logic;
212
      cs       : in  std_logic;
213
      addr     : in  std_logic_vector(10 downto 0);
214
      rw       : in  std_logic;
215
      data_in  : in  std_logic_vector(7 downto 0);
216
      data_out : out std_logic_vector(7 downto 0)
217
   );
218
end SYS09BUG_F800;
219
 
220
architecture rtl of SYS09BUG_F800 is
221
 
222
   type data_array is array(0 to 0) of std_logic_vector(7 downto 0);
223
   signal xdata : data_array;
224
   signal en : std_logic_vector(0 downto 0);
225
   signal dp : std_logic_vector(0 downto 0);
226
   signal we : std_logic;
227
 
228
component RAMB16_S9
229
generic (
230
   INIT_00, INIT_01, INIT_02, INIT_03,
231
   INIT_04, INIT_05, INIT_06, INIT_07,
232
   INIT_08, INIT_09, INIT_0A, INIT_0B,
233
   INIT_0C, INIT_0D, INIT_0E, INIT_0F,
234
   INIT_10, INIT_11, INIT_12, INIT_13,
235
   INIT_14, INIT_15, INIT_16, INIT_17,
236
   INIT_18, INIT_19, INIT_1A, INIT_1B,
237
   INIT_1C, INIT_1D, INIT_1E, INIT_1F,
238
   INIT_20, INIT_21, INIT_22, INIT_23,
239
   INIT_24, INIT_25, INIT_26, INIT_27,
240
   INIT_28, INIT_29, INIT_2A, INIT_2B,
241
   INIT_2C, INIT_2D, INIT_2E, INIT_2F,
242
   INIT_30, INIT_31, INIT_32, INIT_33,
243
   INIT_34, INIT_35, INIT_36, INIT_37,
244
   INIT_38, INIT_39, INIT_3A, INIT_3B,
245
   INIT_3C, INIT_3D, INIT_3E, INIT_3F : bit_vector (255 downto 0)
246
   );
247
 
248
   port (
249
      clk  : in  std_logic;
250
      ssr  : in  std_logic;
251
      en   : in  std_logic;
252
      we   : in  std_logic;
253
      addr : in  std_logic_vector(10 downto 0);
254
      di   : in  std_logic_vector( 7 downto 0);
255
      dip  : in  std_logic_vector( 0 downto 0);
256
      do   : out std_logic_vector( 7 downto 0);
257
      dop  : out std_logic_vector( 0 downto 0)
258
      );
259
     end component RAMB16_S9;
260
 
261
   begin
262
 
263
   ROM00: RAMB16_S9
264
      generic map (
265
         INIT_00 => x"A780A610C6C07F8E104EFE8ECFFE0DFB11FB82FBBDFCA8FC8AFC90FC4BF814F8",
266
         INIT_01 => x"17431FE4A7D0866AAFDD8C30FB265AE26F0CC6450117D07FBF00E08EF9265AA0",
267
         INIT_02 => x"092C2081891FF1270D817F843C0417BC021783FE8EDE01173A03175EFE8E9204",
268
         INIT_03 => x"FE8C02300F2780E118FE8E20C0022F60C14C0417510417408B981F5804175E86",
269
         INIT_04 => x"1F6E02178BFE8E121F2D297403173B341FBC2094ADC020F9021785FE8EF5264E",
270
         INIT_05 => x"17275E81DD271881E127088111286703170C0417AE0317A4A6140417AE031721",
271
         INIT_06 => x"321FAB0217BE203F31C2202131EA03173F86ED03170827A4A1A4A7390F260D81",
272
         INIT_07 => x"F0C4201F0634F0C41000C3101F390124E1AC2034062914031705201F30C07F8E",
273
         INIT_08 => x"10C69B0317370317E4AEF701178BFE8E103439623203279F03170527E4AC011F",
274
         INIT_09 => x"03172E8602237E810425208180A610C6E1AE8B0317F5265A93031735031780A6",
275
         INIT_0a => x"273F8184A60F2710355B8DFFFF8E10341A24C07F8C1E29C00217BC20EE265A7C",
276
         INIT_0b => x"431F39FB265A1E8D08C6D37F8E104B03163F864E03173984A73F86A4AFA0A709",
277
         INIT_0c => x"A60A24C07F8C21AEB3FE16ED7FBF00008E5102170C8D4AAF04272C8D1F304AAE",
278
         INIT_0d => x"265A0427A1ACA0A608C6D37F8E1039A0A7A0A7A0A7FF8684A7A4A604263F8184",
279
         INIT_0e => x"7FBFE7F98EEB7FBFC07FBEED7FBF1429390217EE02171C295F0117393D3139F7",
280
         INIT_0f => x"27ED7FBE24273F8184A64AAEEC011770E0B671E0B73686431F392020450017C0",
281
         INIT_10 => x"3B71E0B73F8673E0B7368670E0B671E0B7368670E0B70D86341FED7FBF1F301F",
282
         INIT_11 => x"B7368672E0B7008670E0B7FF8673E0B73A8671E0B7328622FE16C07FBFEB7FBE",
283
         INIT_12 => x"81260217D27F7F6402171186D6FCBD8435FD265A20C604343973E0B73E8671E0",
284
         INIT_13 => x"E0EBE0E61034212991011726290234A80117F12631813D2739811F0217F92653",
285
         INIT_14 => x"FFC102355FEB2080A70527E46AE0EB02340C2904358E01170434E46AE46AE4EB",
286
         INIT_15 => x"E4AF0130492562AC4D2930344A0117E26F0E02161386D27F731602173F86BA27",
287
         INIT_16 => x"03CB2F0017CCFE8E64E720C6022320008310062762A3E4ECF501171286D6FCBD",
288
         INIT_17 => x"AF5B0117981F53F526646A65011780A684EB63EB62EB68011762AE750117981F",
289
         INIT_18 => x"00169D011690356900177DFE8E10347120028D396532B301171486C326E4AC62",
290
         INIT_19 => x"8DDC8D728D3948AF0229EB8DE78D618D394AAF0229F68DF28D910017E50016F8",
291
         INIT_1a => x"BB8D6C8D3943A70229C78DC68D498D3944AF0229D58DD18D5E8D3946AF0229E0",
292
         INIT_1b => x"1739C4A7808A0429A68DA58D5F8D3941A70229B18DB08D588D3942A70229BC8D",
293
         INIT_1c => x"8DADFE8EF42048AEEA8D9BFE8EBF0016311FF48D8FFE8E39F726048180A63B01",
294
         INIT_1d => x"204AAEC58D95FE8ED82046AECE8DA1FE8EE12044AED78DA7FE8EB4001643A6E1",
295
         INIT_1e => x"900016C4FE8EC4A6AA8DBDFE8ED02042A6B38DB8FE8ED92041A6BC8DB3FE8ECF",
296
         INIT_1f => x"098DD520CE8DC78DC08D17FF178BFE8EBF8DB88DB08DA98DA18D27FF178BFE8E",
297
         INIT_20 => x"4848483229118D903561A710343C29088D011F42290E8DB400172D86121F4D29",
298
         INIT_21 => x"22468112254181393080032239811D253081578D39E0AB04342829078D891F48",
299
         INIT_22 => x"4444444402340235028D0235103439021A395780032266810725618139378003",
300
         INIT_23 => x"3B8D3F8D2D860225E46880A608C602344D20078B022F3981308B0F840235048D",
301
         INIT_24 => x"84A620E08E0926018584A6D07FBE10342D207F84048D0627D27F7D8235F1265A",
302
         INIT_25 => x"34498D2086008D8235018520E0B605260185D07F9FA60234903501A6EE270185",
303
         INIT_26 => x"A7518684A70386D07FBE138D903501A70235F6260885FA27028584A6D07FBE12",
304
         INIT_27 => x"7F01E702C6F17FFD04E703E702A7EF7FFD0000CC30E08E39D27FB7FF86016D84",
305
         INIT_28 => x"84A70520098D042420810D20608D0427F27F7D30E08E16345986028D1B86F27F",
306
         INIT_29 => x"270C81890027100D81382716817C0027101A815A271B81342708819635AF0017",
307
         INIT_2a => x"EF7FB66D205A34275DEF7FFC8F0016792619C15CEF7FFC45260A810F270B8124",
308
         INIT_2b => x"816E27598114273DC1F27FF656200000CC5820212750814CEF7FB662204A2C27",
309
         INIT_2c => x"224F812080F27F7F39F17FB70426F17F7D39F27F7F39F27FB704263D81312754",
310
         INIT_2d => x"508102A74C84E720C6EF7FB6168D0000CC1B20E12218C120C0F17F7FF17FF6ED",
311
         INIT_2e => x"EA2619C15C4FF02650814CEF7FFC3903E702A7EF7FFDF07FF64F39F27F7FF726",
312
         INIT_2f => x"7FF6F42650C15C84A702E7EF7FF72086EF7FF604E75F012519C15C04E6E78D5A",
313
         INIT_30 => x"FB035CFB0267FB0139F27FF702E7EF7FF75FE4205F03E7F07FF7082719C15CF0",
314
         INIT_31 => x"4DAFFA5051FA4C8FF847E7F84546F9423BFB1946FB1830FB1524FB1051FB0472",
315
         INIT_32 => x"0A0DFFFFFFFF7EF991F891F891F891F87EF9C5F95472F958DBF853E0FB5292F8",
316
         INIT_33 => x"000A0D4B04202D202045335320524F4620362E31204755423930535953000000",
317
         INIT_34 => x"3D53552020043D43502020043D5053202004202D20043F54414857043E040000",
318
         INIT_35 => x"432020043D422020043D412020043D50442020043D58492020043D5949202004",
319
         INIT_36 => x"C07F9F6E38F916D27FF7535FC07FCE103904315343565A4E4948464504203A43",
320
         INIT_37 => x"FF8CCC7FBE49584F4AAF80E64AAE431FCA7F9F6EC87F9F6EC67F9F6EC47F9F6E",
321
         INIT_38 => x"000000000000C27F9F6E42EE1F37F16E44AEC4EC10340822CE7FBC8B300F27FF",
322
         INIT_39 => x"0000000000000000000000000000000000000000000000000000000000000000",
323
         INIT_3a => x"0000000000000000000000000000000000000000000000000000000000000000",
324
         INIT_3b => x"0000000000000000000000000000000000000000000000000000000000000000",
325
         INIT_3c => x"0000000000000000000000000000000000000000000000000000000000000000",
326
         INIT_3d => x"0000000000000000000000000000000000000000000000000000000000000000",
327
         INIT_3e => x"0000000000000000000000000000000000000000000000000000000000000000",
328
         INIT_3f => x"D0FEDCFEECFEE8FEE4FEE0FEF0FEDCFE00000000000000000000000000000000"
329
      )
330
      port map (
331
         clk     => clk,
332
         ssr     => rst,
333
         en      => en(0),
334
         we      => we,
335
         addr    => addr(10 downto 0),
336
         di      => data_in,
337
         dip(0)  => dp(0),
338
         do      => xdata(0),
339
         dop(0)  => dp(0)
340
      );
341
   rom_glue: process (cs, rw, addr, xdata)
342
   begin
343
      en(0)  <= cs;
344
      data_out  <= xdata(0);
345
      we <= not rw;
346
   end process;
347
end architecture rtl;
348
 

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