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[/] [System09/] [trunk/] [rtl/] [System09_BurchED_B3/] [System09_BurchED_B3.ucf] - Blame information for rev 95

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1 19 dilbert57
#### UCF file created by Project Navigator
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#
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# PIN DEFINITION FOR BURCHED SPARTAN2 B3
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# XC2S200.
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#
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# B3 Connector J3
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# B5-X300 Connector C
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#
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#NET "b5_clk"       LOC = "p185"; #pin 2 (Global clock input)
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NET "bus_addr<0>"  LOC = "p181"; #pin 3
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NET "bus_addr<1>"  LOC = "p187"; #pin 4
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NET "bus_addr<2>"  LOC = "p188"; #pin 5
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NET "bus_addr<3>"  LOC = "p189"; #pin 6
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NET "bus_addr<4>"  LOC = "p191"; #pin 7
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NET "bus_addr<5>"  LOC = "p192"; #pin 8
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NET "bus_addr<6>"  LOC = "p193"; #pin 9
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NET "bus_addr<7>"  LOC = "p194"; #pin 10
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NET "bus_addr<8>"  LOC = "p195"; #pin 11
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NET "bus_addr<9>"  LOC = "p199"; #pin 12
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NET "bus_addr<10>" LOC = "p200"; #pin 13
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NET "bus_addr<11>" LOC = "p201"; #pin 14
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NET "bus_addr<12>" LOC = "p202"; #pin 15
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NET "bus_addr<13>" LOC = "p203"; #pin 16
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NET "bus_addr<14>" LOC = "p204"; #pin 17
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NET "bus_addr<15>" LOC = "p205"; #pin 18
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NET "bus_csn"      LOC = "p206"; #pin 19
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#
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# B3 Connector J4
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# B5-X300 Connector D
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#
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#NET "GCK2"         LOC = "p182"; #pin 2 (Global clock input)
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NET "bus_clk"      LOC = "p160"; #pin 3
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NET "bus_reset"    LOC = "p161"; #pin 4
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#NET "bus_hold"     LOC = "p162"; #pin 5
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#NET "bus_irq"      LOC = "p163"; #pin 6
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NET "bus_addr<16>" LOC = "p164"; #pin 7
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NET "bus_addr<17>" LOC = "p165"; #pin 8
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NET "bus_addr<18>" LOC = "p166"; #pin 9
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NET "bus_addr<19>" LOC = "p167"; #pin 10
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NET "bus_data<0>"  LOC = "p168"; #pin 11
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NET "bus_data<1>"  LOC = "p172"; #pin 12
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NET "bus_data<2>"  LOC = "p173"; #pin 13
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NET "bus_data<3>"  LOC = "p174"; #pin 14
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NET "bus_data<4>"  LOC = "p175"; #pin 15
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NET "bus_data<5>"  LOC = "p176"; #pin 16
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NET "bus_data<6>"  LOC = "p178"; #pin 17
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NET "bus_data<7>"  LOC = "p179"; #pin 18
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NET "bus_rw"       LOC = "p180"; #pin 19
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#
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# Connector J3
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#
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# For B5-Compact-Flash:
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#
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#NET "GCK3"      LOC = "P185"; #J2-2 (Global Clock input)
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#NET "IO"        LOC = "P181"; #J2-3
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#NET "IO"        LOC = "P187"; #J2-4
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#NET "IO"        LOC = "P188"; #J2-5
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#NET "cf_a<2>"   LOC = "P189"; #J2-6
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#NET "cf_a<1>"   LOC = "P191"; #J2-7
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#NET "cf_a<0>"   LOC = "P192"; #J2-8
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#NET "cf_d<0>"   LOC = "P193"; #J2-9
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#NET "cf_d<1>"   LOC = "P194"; #J2-10
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#NET "cf_d<2>"   LOC = "P195"; #J2-11
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#NET "cf_cs16_n" LOC = "P199"; #J2-12
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#NET "cf_d<10>"  LOC = "P200"; #J2-13
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#NET "cf_d<9>"   LOC = "P201"; #J2-14
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#NET "cf_d<8>"   LOC = "P202"; #J2-15
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#NET "cf_pdiag"  LOC = "P203"; #J2-16
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#NET "cf_dase"   LOC = "P204"; #J2-17
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#NET "cf_iordy"  LOC = "P205"; #J2-18
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#NET "cf_rst_n"  LOC = "P206"; #J2-19
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#
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# Connector J4
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#
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# For B5-Compact-Flash:
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#
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#NET "GCK2"       LOC = "P182"; #J1-2 (Global Clock Input)
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#NET "IO"         LOC = "P160"; #J1-3
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#NET "cf_intrq"   LOC = "P161"; #J1-4
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#NET "cf_wr_n"    LOC = "P162"; #J1-5
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#NET "cf_rd_n"    LOC = "P163"; #J1-6
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#NET "cf_cs1_n"   LOC = "P164"; #J1-7
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#NET "cf_d<15>"   LOC = "P165"; #J1-8
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#NET "cf_d<14>"   LOC = "P166"; #J1-9
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#NET "cf_d<13>"   LOC = "P167"; #J1-10
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#NET "cf_d<12>"   LOC = "P168"; #J1-11
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#NET "cf_d<11>"   LOC = "P172"; #J1-12
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#NET "cf_present" LOC = "P173"; #J1-13
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#NET "cf_d<3>"    LOC = "P174"; #J1-14
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#NET "cf_d<4>"    LOC = "P175"; #J1-15
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#NET "cf_d<5>"    LOC = "P176"; #J1-16
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#NET "cf_d<6>"    LOC = "P178"; #J1-17
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#NET "cf_d<7>"    LOC = "P179"; #J1-18
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#NET "cf_cs0_n"   LOC = "P180"; #J1-19
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#
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# Connector J6
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#
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# For modified B3-SRAM
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# Note: B3-SRAM must be fitted to J6/J9
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#
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NET "ram_data<0>"  LOC = "p133"; #J2-2 (I/O - not a global clock input)
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NET "ram_data<1>"  LOC = "p134"; #J2-3
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NET "ram_data<2>"  LOC = "p135"; #J2-4
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NET "ram_data<3>"  LOC = "p136"; #J2-5
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NET "ram_data<4>"  LOC = "p138"; #J2-6
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NET "ram_data<5>"  LOC = "p139"; #J2-7
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NET "ram_data<6>"  LOC = "p140"; #J2-8
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NET "ram_data<7>"  LOC = "p141"; #J2-9
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NET "ram_data<8>"  LOC = "p142"; #J2-10
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NET "ram_data<9>"  LOC = "p146"; #J2-11
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NET "ram_data<10>" LOC = "p147"; #J2-12
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NET "ram_data<11>" LOC = "p148"; #J2-13
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NET "ram_data<12>" LOC = "p149"; #J2-14
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NET "ram_data<13>" LOC = "p150"; #J2-15
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NET "ram_data<14>" LOC = "p151"; #J2-16
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NET "ram_data<15>" LOC = "p152"; #J2-17
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NET "ram_wrun"     LOC = "p153"; #J2-18
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NET "ram_wrln"     LOC = "p154"; #J2-19
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#
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# Connector J9
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#
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# For modified B3-SRAM
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# Note: B3-SRAM must be fitted to J6/J9
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#
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NET "ram_addr<0>"  LOC = "p108"; #J1-2 (I/O - not a global clock input)
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NET "ram_addr<1>"  LOC = "p109"; #J1-3
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NET "ram_addr<2>"  LOC = "p110"; #J1-4
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NET "ram_addr<3>"  LOC = "p111"; #J1-5
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NET "ram_addr<4>"  LOC = "p112"; #J1-6
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NET "ram_addr<5>"  LOC = "p113"; #J1-7
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NET "ram_addr<6>"  LOC = "p114"; #J1-8
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NET "ram_addr<7>"  LOC = "p115"; #J1-9
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NET "ram_csn"      LOC = "p119"; #J1-10
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NET "ram_addr<8>"  LOC = "p120"; #J1-11
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NET "ram_addr<9>"  LOC = "p121"; #J1-12
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NET "ram_addr<10>" LOC = "p122"; #J1-13
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NET "ram_addr<11>" LOC = "p123"; #J1-14
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NET "ram_addr<12>" LOC = "p125"; #J1-15
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NET "ram_addr<13>" LOC = "p126"; #J1-16
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NET "ram_addr<14>" LOC = "p127"; #J1-17
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NET "ram_addr<15>" LOC = "p129"; #J1-18
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NET "ram_addr<16>" LOC = "p132"; #J1-19
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#
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# Connector J10
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#
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#
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NET "SysClk"     LOC = "p77"; #pin 2 (GCK1 - global clock input)
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NET "led"        LOC = "p49"; #pin 3 (LED output)
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#NET "uart_csn"   LOC = "p57"; #pin 4
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#NET "test_rw"    LOC = "p58"; #pin 5
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#NET "test_d0"    LOC = "p59"; #pin 6
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#NET "test_d1"    LOC = "p60"; #pin 7
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NET "reset_n"    LOC = "p61"; #pin 8 (Test Input button)
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#NET "test_cc<0>" LOC = "p67"; #pin 11
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#NET "test_cc<1>" LOC = "p68"; #pin 12
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#NET "test_cc<2>" LOC = "p69"; #pin 13
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#NET "test_cc<3>" LOC = "p70"; #pin 14
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#NET "test_cc<4>" LOC = "p71"; #pin 15
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#NET "test_cc<5>" LOC = "p73"; #pin 16
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#NET "test_cc<6>" LOC = "p74"; #pin 17
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#NET "test_cc<7>" LOC = "p75"; #pin 18
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#NET "IO"         LOC = "p81"; #pin 19
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#
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# Connector J11
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#
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#NET "GCK0"         LOC = "p80";  #pin 2 (Global Clock input)
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NET "porta<0>"  LOC = "p82";  #pin 3
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NET "porta<1>"  LOC = "p83";  #pin 4
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NET "porta<2>"  LOC = "p84";  #pin 5
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NET "porta<3>"  LOC = "p86";  #pin 6
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NET "porta<4>"  LOC = "p87";  #pin 7
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NET "porta<5>"  LOC = "p88";  #pin 8
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NET "porta<6>"  LOC = "p89";  #pin 9
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NET "porta<7>"  LOC = "p90";  #pin 10
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NET "portb<0>"  LOC = "p94";  #pin 11
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NET "portb<1>"  LOC = "p95";  #pin 12
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NET "portb<2>"  LOC = "p96";  #pin 13
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NET "portb<3>"  LOC = "p97";  #pin 14
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NET "portb<4>"  LOC = "p98";  #pin 15
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NET "portb<5>"  LOC = "p99";  #pin 16
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NET "portb<6>"  LOC = "p100"; #pin 17
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NET "portb<7>"  LOC = "p101"; #pin 18
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NET "timer_out" LOC = "p102"; #pin 19
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#
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# Connector J8
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#
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# B3-FPGA-CPU-IO Module
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#
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#NET "aux_clock"    LOC = "p24"; #J1-2 (Note this is an I/O pad ... not a clock input)
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#NET "buzzer"       LOC = "p27"; #J1-3
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#NET "mouse_clock"  LOC = "p29"; #J1-4
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#NET "mouse_data"   LOC = "p30"; #J1-5
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NET "cts_n"        LOC = "p31"; #J1-6
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NET "rts_n"        LOC = "p33"; #J1-7
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NET "txbit"        LOC = "p34"; #J1-8
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NET "rxbit"        LOC = "p35"; #J1-9
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NET "kb_clock"     LOC = "p36"; #J1-10
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NET "kb_data"      LOC = "p37"; #J1-11
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NET "v_drive"      LOC = "p41"; #J1-12
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NET "h_drive"      LOC = "p42"; #J1-13
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NET "blue_lo"      LOC = "p43"; #J1-14
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NET "blue_hi"      LOC = "p44"; #J1-15
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NET "green_lo"     LOC = "p45"; #J1-16
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NET "green_hi"     LOC = "p46"; #J1-17
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NET "red_lo"       LOC = "p47"; #J1-18
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NET "red_hi"       LOC = "p48"; #J1-19
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#
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# Connector J5
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#
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# Printer port
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#
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#NET "strobe_n"     LOC = "p3";  #J5-1
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#NET "autofd_n"     LOC = "p4";  #J5-2
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#NET "pd<0>"        LOC = "p5";  #J5-3
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#NET "fault_n"      LOC = "p6";  #J5-4
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#NET "pd<1>"        LOC = "p7";  #J5-5
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#NET "init_n"       LOC = "p8";  #J5-6
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#NET "pd<2>"        LOC = "p9";  #J5-7
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#NET "selin"        LOC = "p10"; #J5-8
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#NET "pd<3>"        LOC = "p14"; #J5-9
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#NET "pd<4>"        LOC = "p15"; #J5-11
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#NET "pd<5>"        LOC = "p16"; #J5-13
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#NET "pd<6>"        LOC = "p17"; #J5-15
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#NET "pd<7>"        LOC = "p18"; #J5-17
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#NET "ack"          LOC = "p20"; #J5-19
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#NET "busy"         LOC = "p21"; #J5-21
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#NET "pe"           LOC = "p22"; #J5-23
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#NET "sel"          LOC = "p23"; #J5-25
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#
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# Timing Groups
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#
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INST "ram_addr<0>"  TNM = "ram_addr";
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INST "ram_addr<1>"  TNM = "ram_addr";
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INST "ram_addr<2>"  TNM = "ram_addr";
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INST "ram_addr<3>"  TNM = "ram_addr";
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INST "ram_addr<4>"  TNM = "ram_addr";
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INST "ram_addr<5>"  TNM = "ram_addr";
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INST "ram_addr<6>"  TNM = "ram_addr";
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INST "ram_addr<7>"  TNM = "ram_addr";
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INST "ram_addr<8>"  TNM = "ram_addr";
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INST "ram_addr<9>"  TNM = "ram_addr";
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INST "ram_addr<10>" TNM = "ram_addr";
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INST "ram_addr<11>" TNM = "ram_addr";
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INST "ram_addr<12>" TNM = "ram_addr";
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INST "ram_addr<13>" TNM = "ram_addr";
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INST "ram_addr<14>" TNM = "ram_addr";
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INST "ram_addr<15>" TNM = "ram_addr";
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INST "ram_addr<16>" TNM = "ram_addr";
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#
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INST "ram_data<0>"  TNM = "ram_data";
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INST "ram_data<1>"  TNM = "ram_data";
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INST "ram_data<2>"  TNM = "ram_data";
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INST "ram_data<3>"  TNM = "ram_data";
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INST "ram_data<4>"  TNM = "ram_data";
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INST "ram_data<5>"  TNM = "ram_data";
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INST "ram_data<6>"  TNM = "ram_data";
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INST "ram_data<7>"  TNM = "ram_data";
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INST "ram_data<8>"  TNM = "ram_data";
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INST "ram_data<9>"  TNM = "ram_data";
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INST "ram_data<10>" TNM = "ram_data";
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INST "ram_data<11>" TNM = "ram_data";
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INST "ram_data<12>" TNM = "ram_data";
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INST "ram_data<13>" TNM = "ram_data";
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INST "ram_data<14>" TNM = "ram_data";
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INST "ram_data<15>" TNM = "ram_data";
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#
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INST "ram_wrln" TNM = "ram_wr";
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INST "ram_wrun" TNM = "ram_wr";
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#INST "ram_csn"  TNM = "ram_cs";
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#
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#
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# Timing Constraints
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#
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NET "SysClk" TNM_NET = "SysClk";
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TIMESPEC "TS_SysClk" = PERIOD "SysClk" 20 ns HIGH 50 %;
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#TIMEGRP "ram_cs"   OFFSET = OUT 40 ns AFTER "SysClk";
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TIMEGRP "ram_wr"   OFFSET = OUT 40 ns AFTER "SysClk";
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TIMEGRP "ram_addr" OFFSET = OUT 40 ns AFTER "SysClk";
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TIMEGRP "ram_data" OFFSET = OUT 40 ns AFTER "SysClk";
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TIMEGRP "ram_data" OFFSET = IN 15 ns BEFORE "SysClk";
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#
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# Fast I/O Pins
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#
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NET "ram_addr<0>" FAST;
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NET "ram_addr<1>" FAST;
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NET "ram_addr<2>" FAST;
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NET "ram_addr<3>" FAST;
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NET "ram_addr<4>" FAST;
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NET "ram_addr<5>" FAST;
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NET "ram_addr<6>" FAST;
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NET "ram_addr<7>" FAST;
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NET "ram_addr<8>" FAST;
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NET "ram_addr<9>" FAST;
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NET "ram_addr<10>" FAST;
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NET "ram_addr<11>" FAST;
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NET "ram_addr<12>" FAST;
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NET "ram_addr<13>" FAST;
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NET "ram_addr<14>" FAST;
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NET "ram_addr<15>" FAST;
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NET "ram_addr<16>" FAST;
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#
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NET "ram_wrln" FAST;
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NET "ram_wrun" FAST;
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NET "ram_csn" FAST;
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#
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NET "ram_data<0>" FAST;
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NET "ram_data<1>" FAST;
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NET "ram_data<2>" FAST;
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NET "ram_data<3>" FAST;
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NET "ram_data<4>" FAST;
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NET "ram_data<5>" FAST;
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NET "ram_data<6>" FAST;
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NET "ram_data<7>" FAST;
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NET "ram_data<8>" FAST;
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NET "ram_data<9>" FAST;
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NET "ram_data<10>" FAST;
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NET "ram_data<11>" FAST;
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NET "ram_data<12>" FAST;
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NET "ram_data<13>" FAST;
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NET "ram_data<14>" FAST;
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NET "ram_data<15>" FAST;

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