OpenCores
URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_BurchED_B5-X300_2/] [transcript] - Blame information for rev 138

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 104 davidgb
# Reading G:/Modeltech_xe_starter/tcl/vsim/pref.tcl
2
# do acia_6850_testbench.fdo
3
# ** Warning: (vlib-34) Library already exists at "work".
4
# Model Technology ModelSim XE III vcom 6.0a Compiler 2004.11 Nov 10 2004
5
# -- Loading package standard
6
# -- Loading package std_logic_1164
7
# -- Loading package std_logic_arith
8
# -- Loading package std_logic_unsigned
9
# -- Compiling entity acia_rx
10
# -- Compiling architecture rtl of acia_rx
11
# Model Technology ModelSim XE III vcom 6.0a Compiler 2004.11 Nov 10 2004
12
# -- Loading package standard
13
# -- Loading package std_logic_1164
14
# -- Loading package numeric_std
15
# -- Loading package std_logic_arith
16
# -- Loading package std_logic_unsigned
17
# -- Compiling entity acia_tx
18
# -- Compiling architecture rtl of acia_tx
19
# Model Technology ModelSim XE III vcom 6.0a Compiler 2004.11 Nov 10 2004
20
# -- Loading package standard
21
# -- Loading package std_logic_1164
22
# -- Loading package numeric_std
23
# -- Compiling entity acia_6850
24
# -- Compiling architecture rtl of acia_6850
25
# Model Technology ModelSim XE III vcom 6.0a Compiler 2004.11 Nov 10 2004
26
# -- Loading package standard
27
# -- Loading package std_logic_1164
28
# -- Loading package std_logic_arith
29
# -- Loading package std_logic_unsigned
30
# -- Loading package numeric_std
31
# -- Compiling entity acia_6850_testbench
32
# -- Compiling architecture behavior of acia_6850_testbench
33
# vsim -lib work -t 1ps acia_6850_testbench
34
# Loading G:\Modeltech_xe_starter\win32xoem/../std.standard
35
# Loading G:\Modeltech_xe_starter\win32xoem/../ieee.std_logic_1164(body)
36
# Loading G:\Modeltech_xe_starter\win32xoem/../ieee.std_logic_arith(body)
37
# Loading G:\Modeltech_xe_starter\win32xoem/../ieee.std_logic_unsigned(body)
38
# Loading G:\Modeltech_xe_starter\win32xoem/../ieee.numeric_std(body)
39
# Loading work.acia_6850_testbench(behavior)
40
# Loading work.acia_6850(rtl)
41
# Loading work.acia_rx(rtl)
42
# Loading work.acia_tx(rtl)
43
# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs
44
# .main_pane.workspace
45
# .main_pane.signals.interior.cs
46
run -all

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.