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Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_BurchED_B5-X300_2/] [work/] [_info] - Blame information for rev 144

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m255
13
cModel Technology
dG:\Vhdl\System09\rtl\System09_BurchED_B5-X300
Eacia_6850
w1170677056
DP ieee numeric_std =NSdli^?T5OD8;4F
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
F../VHDL/ACIA_6850.vhd
l0
L54
V>D]V7GRb=PYXAhe35W6jP2
OX;C;6.0a;29
31
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Artl
DP ieee numeric_std =NSdli^?T5OD8;4F
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work acia_6850 >D]V7GRb=PYXAhe35W6jP2
l180
L81
VgF9afi:]adM
OX;C;6.0a;29
31
M2 ieee std_logic_1164
M1 ieee numeric_std
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Eacia_6850_testbench
w1170681695
DP ieee numeric_std =NSdli^?T5OD8;4F
DP ieee std_logic_unsigned hEMVMlaNCR^
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
F../Testbench/ACIA_tb.vhd
l0
L16
VmzR@8RYYWjTGk1:fZG_eK2
OX;C;6.0a;29
31
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Abehavior
DP ieee numeric_std =NSdli^?T5OD8;4F
DP ieee std_logic_unsigned hEMVMlaNCR^
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work acia_6850_testbench mzR@8RYYWjTGk1:fZG_eK2
l73
L22
VE741`Wo03fDnNm[^mnF?K2
OX;C;6.0a;29
31
M4 ieee std_logic_1164
M3 ieee std_logic_arith
M2 ieee std_logic_unsigned
M1 ieee numeric_std
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Eacia_rx
w1170677668
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
F../VHDL/ACIA_RX.vhd
l0
L47
VSf3CSKi2TK39
OX;C;6.0a;29
31
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work acia_rx Sf3CSKi2TK39
l89
L66
VM@zT9G?N4D
OX;C;6.0a;29
31
M3 ieee std_logic_1164
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Eacia_tx
w1170677078
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^
DP ieee numeric_std =NSdli^?T5OD8;4F
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
F../VHDL/ACIA_TX.vhd
l0
L48
VY=P7j`LjB@TUjZFI:]e8>3
OX;C;6.0a;29
31
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^
DP ieee numeric_std =NSdli^?T5OD8;4F
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work acia_tx Y=P7j`LjB@TUjZFI:]e8>3
l81
L63
VLCRG_C=W9h^Tg<`lcm=Y?3
OX;C;6.0a;29
31
M4 ieee std_logic_1164
M3 ieee numeric_std
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-93 -explicit -O0
tExplicit 1GenerateLoopIterationMax 100000

Line No.	Rev	Author	Line
1	104	davidgb	`m255`
2			`13`
3			`cModel Technology`
4			`dG:\Vhdl\System09\rtl\System09_BurchED_B5-X300`
5			`Eacia_6850`
6			`w1170677056`
7			`DP ieee numeric_std =NSdli^?T5OD8;4F`
8			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
9			`F../VHDL/ACIA_6850.vhd`
10			`l0`
11			`L54`
12			`V>D]V7GRb=PYXAhe35W6jP2`
13			`OX;C;6.0a;29`
14			`31`
15			`o-93 -explicit -O0`
16			`tExplicit 1GenerateLoopIterationMax 100000`
17			`Artl`
18			`DP ieee numeric_std =NSdli^?T5OD8;4F`
19			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
20			`DE work acia_6850 >D]V7GRb=PYXAhe35W6jP2`
21			`l180`
22			`L81`
23			`VgF9afi:]adM`
24			`OX;C;6.0a;29`
25			`31`
26			`M2 ieee std_logic_1164`
27			`M1 ieee numeric_std`
28			`o-93 -explicit -O0`
29			`tExplicit 1GenerateLoopIterationMax 100000`
30			`Eacia_6850_testbench`
31			`w1170681695`
32			`DP ieee numeric_std =NSdli^?T5OD8;4F`
33			`DP ieee std_logic_unsigned hEMVMlaNCR^`
34			`DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2`
35			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
36			`F../Testbench/ACIA_tb.vhd`
37			`l0`
38			`L16`
39			`VmzR@8RYYWjTGk1:fZG_eK2`
40			`OX;C;6.0a;29`
41			`31`
42			`o-93 -explicit -O0`
43			`tExplicit 1GenerateLoopIterationMax 100000`
44			`Abehavior`
45			`DP ieee numeric_std =NSdli^?T5OD8;4F`
46			`DP ieee std_logic_unsigned hEMVMlaNCR^`
47			`DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2`
48			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
49			`DE work acia_6850_testbench mzR@8RYYWjTGk1:fZG_eK2`
50			`l73`
51			`L22`
52			VE741`Wo03fDnNm[^mnF?K2
53			`OX;C;6.0a;29`
54			`31`
55			`M4 ieee std_logic_1164`
56			`M3 ieee std_logic_arith`
57			`M2 ieee std_logic_unsigned`
58			`M1 ieee numeric_std`
59			`o-93 -explicit -O0`
60			`tExplicit 1GenerateLoopIterationMax 100000`
61			`Eacia_rx`
62			`w1170677668`
63			`DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2`
64			`DP ieee std_logic_unsigned hEMVMlaNCR^`
65			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
66			`F../VHDL/ACIA_RX.vhd`
67			`l0`
68			`L47`
69			`VSf3CSKi2TK39`
70			`OX;C;6.0a;29`
71			`31`
72			`o-93 -explicit -O0`
73			`tExplicit 1GenerateLoopIterationMax 100000`
74			`Artl`
75			`DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2`
76			`DP ieee std_logic_unsigned hEMVMlaNCR^`
77			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
78			`DE work acia_rx Sf3CSKi2TK39`
79			`l89`
80			`L66`
81			`VM@zT9G?N4D`
82			`OX;C;6.0a;29`
83			`31`
84			`M3 ieee std_logic_1164`
85			`M2 ieee std_logic_unsigned`
86			`M1 ieee std_logic_arith`
87			`o-93 -explicit -O0`
88			`tExplicit 1GenerateLoopIterationMax 100000`
89			`Eacia_tx`
90			`w1170677078`
91			`DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2`
92			`DP ieee std_logic_unsigned hEMVMlaNCR^`
93			`DP ieee numeric_std =NSdli^?T5OD8;4F`
94			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
95			`F../VHDL/ACIA_TX.vhd`
96			`l0`
97			`L48`
98			VY=P7j`LjB@TUjZFI:]e8>3
99			`OX;C;6.0a;29`
100			`31`
101			`o-93 -explicit -O0`
102			`tExplicit 1GenerateLoopIterationMax 100000`
103			`Artl`
104			`DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2`
105			`DP ieee std_logic_unsigned hEMVMlaNCR^`
106			`DP ieee numeric_std =NSdli^?T5OD8;4F`
107			DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
108			DE work acia_tx Y=P7j`LjB@TUjZFI:]e8>3
109			`l81`
110			`L63`
111			VLCRG_C=W9h^Tg<`lcm=Y?3
112			`OX;C;6.0a;29`
113			`31`
114			`M4 ieee std_logic_1164`
115			`M3 ieee numeric_std`
116			`M2 ieee std_logic_unsigned`
117			`M1 ieee std_logic_arith`
118			`o-93 -explicit -O0`
119			`tExplicit 1GenerateLoopIterationMax 100000`

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Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_BurchED_B5-X300_2/] [work/] [_info] - Blame information for rev 144