OpenCores
URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_Digilent_3S200/] [System09_Digilent_3S200.ucf] - Blame information for rev 104

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 19 dilbert57
#PACE: Start of Constraints generated by PACE
2
 
3
#PACE: Start of PACE I/O Pin Assignments
4 22 dilbert57
NET "sys_clk"        LOC = "T9"  ;
5 19 dilbert57
#
6
# PUSH BUTTONS
7
#
8 22 dilbert57
NET "rst_sw"        LOC = "L14"  ;
9 19 dilbert57
NET "nmi_sw"        LOC = "L13"  ;
10
#
11
# LEDs
12
#
13
NET "leds<0>"       LOC = "K12";
14
NET "leds<1>"       LOC = "P14";
15
NET "leds<2>"       LOC = "L12";
16
NET "leds<3>"       LOC = "N14";
17
NET "leds<4>"       LOC = "P13";
18
NET "leds<5>"       LOC = "N12";
19
NET "leds<6>"       LOC = "P12";
20
NET "leds<7>"       LOC = "P11";
21
#
22
# Switches
23
#
24
NET "switches<0>"   LOC = "F12";
25
NET "switches<1>"   LOC = "G12";
26
NET "switches<2>"   LOC = "H14";
27
NET "switches<3>"   LOC = "H13";
28
NET "switches<4>"   LOC = "J14";
29
NET "switches<5>"   LOC = "J13";
30
NET "switches<6>"   LOC = "K14";
31
NET "switches<7>"   LOC = "K13";
32
#
33
# PS/2 KEYBOARD
34
#
35
NET "ps2c"          LOC = "M16"  ;
36
NET "ps2d"          LOC = "M15"  ;
37
#
38
# UART
39
#
40
NET "rxd"           LOC = "T13"  ;
41
NET "txd"           LOC = "R13"  ;
42
#
43
# VDU
44
#
45
NET "red"           LOC = "R12"  ;
46
NET "green"         LOC = "T12"  ;
47
NET "blue"          LOC = "R11"  ;
48
NET "hs"            LOC = "R9"  ;
49
NET "vs"            LOC = "T10"  ;
50
#
51
# 7 SEGMENT DISPLAY
52
#
53
NET "segments<0>"   LOC = "E14";
54
NET "segments<1>"   LOC = "G13";
55
NET "segments<2>"   LOC = "N15";
56
NET "segments<3>"   LOC = "P15";
57
NET "segments<4>"   LOC = "R16";
58
NET "segments<5>"   LOC = "F13";
59
NET "segments<6>"   LOC = "N16";
60
NET "segments<7>"   LOC = "P16";
61
NET "digits<0>"     LOC = "D14";
62
NET "digits<1>"     LOC = "G14";
63
NET "digits<2>"     LOC = "F14";
64
NET "digits<3>"     LOC = "E13";
65
#
66
# RAM Address bus
67
#
68
NET "ram_addr<0>"   LOC = "L5"  ;
69
NET "ram_addr<1>"   LOC = "N3"  ;
70
NET "ram_addr<2>"   LOC = "M4"  ;
71
NET "ram_addr<3>"   LOC = "M3"  ;
72
NET "ram_addr<4>"   LOC = "L4"  ;
73
NET "ram_addr<5>"   LOC = "G4"  ;
74
NET "ram_addr<6>"   LOC = "F3"  ;
75
NET "ram_addr<7>"   LOC = "F4"  ;
76
NET "ram_addr<8>"   LOC = "E3"  ;
77
NET "ram_addr<9>"   LOC = "E4"  ;
78
NET "ram_addr<10>"  LOC = "G5"  ;
79
NET "ram_addr<11>"  LOC = "H3"  ;
80
NET "ram_addr<12>"  LOC = "H4"  ;
81
NET "ram_addr<13>"  LOC = "J4"  ;
82
NET "ram_addr<14>"  LOC = "J3"  ;
83
NET "ram_addr<15>"  LOC = "K3"  ;
84
NET "ram_addr<16>"  LOC = "K5"  ;
85
NET "ram_addr<17>"  LOC = "L3"  ;
86
NET "ram_oen"       LOC = "K4"  ;
87
NET "ram_wen"       LOC = "G3"  ;
88
#
89
# RAM1
90
#
91
NET "ram1_cen"       LOC = "P7"  ;
92
NET "ram1_lbn"       LOC = "P6"  ;
93
NET "ram1_ubn"       LOC = "T4"  ;
94
NET "ram1_data<0>"   LOC = "N7"  ;
95
NET "ram1_data<1>"   LOC = "T8"  ;
96
NET "ram1_data<2>"   LOC = "R6"  ;
97
NET "ram1_data<3>"   LOC = "T5"  ;
98
NET "ram1_data<4>"   LOC = "R5"  ;
99
NET "ram1_data<5>"   LOC = "C2"  ;
100
NET "ram1_data<6>"   LOC = "C1"  ;
101
NET "ram1_data<7>"   LOC = "B1"  ;
102
NET "ram1_data<8>"   LOC = "D3"  ;
103
NET "ram1_data<9>"   LOC = "P8"  ;
104
NET "ram1_data<10>"  LOC = "F2"  ;
105
NET "ram1_data<11>"  LOC = "H1"  ;
106
NET "ram1_data<12>"  LOC = "J2"  ;
107
NET "ram1_data<13>"  LOC = "L2"  ;
108
NET "ram1_data<14>"  LOC = "P1"  ;
109
NET "ram1_data<15>"  LOC = "R1"  ;
110
#
111
# RAM2
112
#
113
NET "ram2_cen"       LOC = "N5"  ;
114
NET "ram2_lbn"       LOC = "P5"  ;
115
NET "ram2_ubn"       LOC = "R4"  ;
116
NET "ram2_data<0>"   LOC = "P2"  ;
117
NET "ram2_data<1>"   LOC = "N2"  ;
118
NET "ram2_data<2>"   LOC = "M2"  ;
119
NET "ram2_data<3>"   LOC = "K1"  ;
120
NET "ram2_data<4>"   LOC = "J1"  ;
121
NET "ram2_data<5>"   LOC = "G2"  ;
122
NET "ram2_data<6>"   LOC = "E1"  ;
123
NET "ram2_data<7>"   LOC = "D1"  ;
124
NET "ram2_data<8>"   LOC = "D2"  ;
125
NET "ram2_data<9>"   LOC = "E2"  ;
126
NET "ram2_data<10>"  LOC = "G1"  ;
127
NET "ram2_data<11>"  LOC = "F5"  ;
128
NET "ram2_data<12>"  LOC = "C3"  ;
129
NET "ram2_data<13>"  LOC = "K2"  ;
130
NET "ram2_data<14>"  LOC = "M1"  ;
131
NET "ram2_data<15>"  LOC = "N1"  ;
132
#
133
# Timing Constraints
134
#
135 22 dilbert57
NET "sys_clk" TNM_NET = "sys_clk";
136
TIMESPEC "TS_sys_clk" = PERIOD "sys_clk" 20 ns LOW 50 %;
137 19 dilbert57
 
138
#PACE: Start of PACE Area Constraints
139
 
140
#PACE: Start of PACE Prohibit Constraints
141
 
142
#PACE: End of Constraints generated by PACE

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.