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# XSA-3S1000 Board FPGA pin assignment constraints

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# Clocks

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# clock pin for Zybo Z7

 NET "CLKA"   LOC = "K17";

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# Push button switches

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 NET "SW2_N" LOC = "G15";

 NET "SW3_N" LOC = "P15";

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# Status LED

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 NET "S<0>" LOC = "K18";

 NET "S<1>" LOC = "P16";

 NET "S<2>" LOC = "K19";

 NET "S<3>" LOC = "Y16";

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# PMOD JC for Pmod RS-232

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# 1 - V15 - CTS

# 2 - W15 - RTS

# 3 - T11 - TXD

# 4 - T10 - RXD

 NET "RS232_RXD" LOC = "T10";

 NET "RS232_TXD" LOC = "T11";

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# Timing Constraints

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NET "CLKA" TNM_NET="CLKA";

TIMESPEC "TS_clk"=PERIOD "CLKA" 8 ns HIGH 50 %;