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[/] [System09/] [trunk/] [rtl/] [System09_Trenz_TE0141/] [toplevel.ucf] - Blame information for rev 117

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1 105 davidgb
#--------------------------------------------------------------------------------
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#-- Copyright (C) 2004 Trenz Electronic GmbH
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#-- www.trenz-electronic.de
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#-- Author:      Kolja Sulimma
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#--------------------------------------------------------------------------------
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#-- Project:     TE-XC3S Application Note: Pong Demo
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#-- File:        toplevel.ucf
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#-- Description: Pin assignments for the Pong Demo
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#-- History:     V1.0 2004-10-11 KS created
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#--------------------------------------------------------------------------------
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#-- This program is free software; you can redistribute it and/or
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#-- modify it under the terms of the GNU General Public License
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#-- as published by the Free Software Foundation; either version 2
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#-- of the License, or (at your option) any later version.
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#-- This program is distributed in the hope that it will be useful,
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#-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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#-- GNU General Public License for more details.
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#-- You should have received a copy of the GNU General Public License
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#-- along with this program; if not, write to the Free Software
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#-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
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#Reset
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NET "reset_sw"    LOC = "R16" | PULLUP;
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#led on micromodule
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NET "mm_led"     LOC = "N6"  ;
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#mandatory umti signals to get a clock
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NET "utmi_clkout"      LOC = "D9"  ;
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NET "utmi_databus16_8" LOC = "B14"  ;
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#utmi signals only used with USB function
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NET "utmi_opmode1"     LOC = "C6"  ;
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NET "utmi_reset"       LOC = "B4"  ;
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NET "utmi_termselect"  LOC = "B6"  ;
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NET "utmi_txvalid"     LOC = "B12"  ;
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NET "utmi_xcvrselect"  LOC = "D6"  ;
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#vga output
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NET "fpga_b<0>"  LOC = "M16" | DRIVE = 24 ;
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NET "fpga_b<1>"  LOC = "M15" | DRIVE = 24 ;
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NET "fpga_b<2>"  LOC = "M14" | DRIVE = 24 ;
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NET "fpga_g<0>"  LOC = "N16" | DRIVE = 24 ;
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NET "fpga_g<1>"  LOC = "M13" | DRIVE = 24 ;
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NET "fpga_g<2>"  LOC = "L13" | DRIVE = 24 ;
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NET "fpga_r<0>"  LOC = "P16" | DRIVE = 24 ;
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NET "fpga_r<1>"  LOC = "N14" | DRIVE = 24 ;
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NET "fpga_r<2>"  LOC = "N15" | DRIVE = 24 ;
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NET "hsync_b"    LOC = "J13"  ;
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NET "vsync_b"    LOC = "R1"  ;
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#keyboard/mouse interfaces
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NET "ps2_clk1"   LOC = "C1"  ;
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#NET "ps2_clk2"   LOC = "B1"  ;
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NET "ps2_data1"  LOC = "C2"  ;
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#NET "ps2_data2"  LOC = "C3"  ;
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#joystick and buttons
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NET "joy_down"   LOC = "P15"  ;
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NET "joy_fire"   LOC = "T14"  ;
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NET "joy_left"   LOC = "K13"  ;
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NET "joy_right"  LOC = "R13"  ;
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NET "joy_up"     LOC = "P14"  ;
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#leds on baseboard
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NET "led<0>"     LOC = "T13"  ;
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NET "led<1>"     LOC = "R12"  ;
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NET "led<2>"     LOC = "T12"  ;
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NET "led<3>"     LOC = "R11"  ;
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#audio
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NET "aud_out<1>" LOC = "D10";
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NET "aud_out<2>" LOC = "E10";
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NET "aud_out<3>" LOC = "D11";
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NET "aud_out<4>" LOC = "D12";
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#lcd
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NET "lcd_d<3>"       LOC = "M1";
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NET "lcd_d<2>"       LOC = "L4";
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NET "lcd_d<1>"       LOC = "L5";
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NET "lcd_d<0>"       LOC = "N1";
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NET "lcd_e"               LOC = "N2";
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NET "lcd_rw"      LOC = "N3";
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NET "lcd_rs"      LOC = "P1";
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#rs232
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NET "fpga_cts"   LOC = "K12"  ;
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NET "fpga_rts"   LOC = "E11"  ;
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NET "fpga_rxd"   LOC = "L12"  ;
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NET "fpga_txd"   LOC = "J14"  ;
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#ram, flash
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NET "ram_a<0>"   LOC = "D14"  ;
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NET "ram_a<1>"   LOC = "K15"  ;
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NET "ram_a<2>"   LOC = "M3"  ;
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NET "ram_a<3>"   LOC = "L2"  ;
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NET "ram_a<4>"   LOC = "L3"  ;
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NET "ram_a<5>"   LOC = "K1"  ;
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NET "ram_a<6>"   LOC = "K2"  ;
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NET "ram_a<7>"   LOC = "J2"  ;
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NET "ram_a<8>"   LOC = "J1"  ;
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NET "ram_a<9>"   LOC = "G4"  ;
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NET "ram_a<10>"  LOC = "F2"  ;
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NET "ram_a<11>"  LOC = "F3"  ;
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NET "ram_a<12>"  LOC = "E1"  ;
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NET "ram_a<13>"  LOC = "E2"  ;
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NET "ram_a<14>"  LOC = "E3"  ;
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NET "ram_a<15>"  LOC = "D1"  ;
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NET "ram_a<16>"  LOC = "D2"  ;
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NET "ram_a<17>"  LOC = "B16"  ;
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NET "ram_a<18>"  LOC = "H4"  ;
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NET "ram_a<19>"  LOC = "H3";
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NET "ram_a<20>"  LOC = "G3";
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NET "ram_io<0>"  LOC = "H15"  ;
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NET "ram_io<1>"  LOC = "H14"  ;
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NET "ram_io<2>"  LOC = "G16"  ;
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NET "ram_io<3>"  LOC = "G14"  ;
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NET "ram_io<4>"  LOC = "F14"  ;
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NET "ram_io<5>"  LOC = "E15"  ;
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NET "ram_io<6>"  LOC = "D16"  ;
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NET "ram_io<7>"  LOC = "E13"  ;
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NET "ram_io<8>"  LOC = "H16"  ;
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NET "ram_io<9>"  LOC = "H13"  ;
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NET "ram_io<10>" LOC = "G15"  ;
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NET "ram_io<11>" LOC = "F15"  ;
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NET "ram_io<12>" LOC = "E16"  ;
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NET "ram_io<13>" LOC = "E14"  ;
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NET "ram_io<14>" LOC = "D15"  ;
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NET "ram_io<15>" LOC = "C16"  ;
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NET "ram_bhen"   LOC = "L14"  ;
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NET "ram_blen"   LOC = "L15"  ;
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NET "ram_cen"    LOC = "M2"  ;
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NET "ram_oen"    LOC = "K16"  ;
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NET "ram_wen"    LOC = "G1"  ;
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#flash memory
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NET "fl_resetn"  LOC = "G2" ;
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NET "fl_cen"     LOC = "K14";
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NET "fl_oen"     LOC = "J16";
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NET "fl_byten"   LOC = "C15";
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NET "fl_busyn"   LOC = "H1" ;
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#compact flash
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NET "cf_we"               LOC = "D8";
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NET "cf_reg"      LOC = "G5";
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NET "cf_cs0"      LOC = "D7";
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NET "cf_cs1"      LOC = "D5";
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NET "cf_reset"    LOC = "E6";
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NET "cf_irq"      LOC = "E4" | PULLUP;
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NET "cf_iord"     LOC = "F4";
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NET "cf_iowr"     LOC = "F5";
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NET "cf_wait"     LOC = "E7" | PULLUP;
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NET "cf_dasp"     LOC = "J4" | PULLUP;
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NET "cf_pdiag"    LOC = "J3" | PULLUP;
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NET "cf_cd1"      LOC = "K5" | PULLUP;
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NET "cf_cd2"      LOC = "K4" | PULLUP;
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NET "iois16"      LOC = "K3" | PULLUP;
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NET "cf_oe"               LOC = "M4";
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NET "cf_pwr_en"  LOC = "P2";
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#ir_data
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NET "ir_data"    LOC = "D3"  ;
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#PACE: Start of PACE Area Constraints
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#PACE: Start of PACE Prohibit Constraints
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#PACE: End of Constraints generated by PACE

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