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[/] [System09/] [trunk/] [rtl/] [VHDL/] [ps2_keyboard.vhd] - Blame information for rev 108

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1 99 davidgb
--===========================================================================--
2
--                                                                           --
3
--  ps2_keyboard.vhd - Synthesizable PS/2 Keyboard Interface                 --
4
--                                                                           --
5
--===========================================================================--
6 19 dilbert57
--
7 99 davidgb
--  File name      : ps2_keyboard.vhd
8 19 dilbert57
--
9 99 davidgb
--  Purpose        : Implements a PS/2 Keyboard Interface
10
--                  
11
--  Dependencies   : ieee.std_logic_1164
12
--                   ieee.std_logic_unsigned
13
--                   ieee.std_logic_arith
14
--                   ieee.numeric_std
15
--                   unisim.vcomponents
16
--
17
--  Author         : Original Verilog version by John Clayton
18
--                   Converted to VHDL by John E. Kent
19
--
20
--  Email          : dilbert57@opencores.org      
21
--
22
--  Web            : http://opencores.org/project,system09
23
--
24
--  Description     :
25
--
26 19 dilbert57
-- This is a state-machine driven serial-to-parallel and parallel-to-serial
27
-- interface to the ps2 style keyboard interface.  The details of the operation
28
-- of the keyboard interface were obtained from the following website:
29
--
30 99 davidgb
--   http://www.beyondlogic.org/keyboard/keybrd.htm
31 19 dilbert57
--
32
-- Some aspects of the keyboard interface are not implemented (e.g, parity
33
-- checking for the receive side, and recognition of the various commands
34
-- which the keyboard sends out, such as "power on selt test passed," "Error"
35
-- and "Resend.")  However, if the user wishes to recognize these reply
36
-- messages, the scan code output can always be used to extend functionality
37
-- as desired.
38
--
39
-- Note that the "Extended" (0xE0) and "Released" (0xF0) codes are recognized.
40
-- The rx interface provides separate indicator flags for these two conditions
41
-- with every valid character scan code which it provides.  The shift keys are
42
-- also trapped by the interface, in order to provide correct uppercase ASCII
43
-- characters at the ascii output, although the scan codes for the shift keys
44
-- are still provided at the scan code output.  So, the left/right ALT keys
45
-- can be differentiated by the presence of the rx_entended signal, while the
46
-- left/right shift keys are differentiable by the different scan codes
47
-- received.
48
--
49
-- The interface to the ps2 keyboard uses ps2_clk clock rates of
50
-- 30-40 kHz, dependent upon the keyboard itself.  The rate at which the state
51
-- machine runs should be at least twice the rate of the ps2_clk, so that the
52
-- states can accurately follow the clock signal itself.  Four times 
53
-- oversampling is better.  Say 200kHz at least.  The upper limit for clocking
54
-- the state machine will undoubtedly be determined by delays in the logic 
55
-- which decodes the scan codes into ASCII equivalents.  The maximum speed
56
-- will be most likely many megahertz, depending upon target technology.
57
-- In order to run the state machine extremely fast, synchronizing flip-flops
58
-- have been added to the ps2_clk and ps2_data inputs of the state machine.
59
-- This avoids poor performance related to slow transitions of the inputs.
60
-- 
61
-- Because this is a bi-directional interface, while reading from the keyboard
62
-- the ps2_clk and ps2_data lines are used as inputs.  While writing to the
63
-- keyboard, however (which may be done at any time.  If writing interrupts a
64
-- read from the keyboard, the keyboard will buffer up its data, and send
65
-- it later) both the ps2_clk and ps2_data lines are occasionally pulled low,
66
-- and pullup resistors are used to bring the lines high again, by setting
67
-- the drivers to high impedance state.
68
--
69
-- The tx interface, for writing to the keyboard, does not provide any special
70
-- pre-processing.  It simply transmits the 8-bit command value to the
71
-- keyboard.
72
--
73
-- Pullups MUST BE USED on the ps2_clk and ps2_data lines for this design,
74
-- whether they be internal to an FPGA I/O pad, or externally placed.
75
-- If internal pullups are used, they may be fairly weak, causing bounces
76
-- due to crosstalk, etc.  There is a "debounce timer" implemented in order
77
-- to eliminate erroneous state transitions which would occur based on bounce.
78
-- 
79
-- Parameters are provided in order to configure and appropriately size the
80
-- counter of a 60 microsecond timer used in the transmitter, depending on
81
-- the clock frequency used.  The 60 microsecond period is guaranteed to be
82
-- more than one period of the ps2_clk_s signal.
83
--
84
-- Also, a smaller 5 microsecond timer has been included for "debounce".
85
-- This is used because, with internal pullups on the ps2_clk and ps2_data
86
-- lines, there is some bouncing around which occurs
87
--
88
-- A parameter TRAP_SHIFT_KEYS allows the user to eliminate shift keypresses
89
-- from producing scan codes (along with their "undefined" ASCII equivalents)
90
-- at the output of the interface.  If TRAP_SHIFT_KEYS is non-zero, the shift
91 99 davidgb
-- key status will only be reported by rx_shift_on.  No ascii or scan
92 19 dilbert57
-- codes will be reported for the shift keys.  This is useful for those who
93
-- wish to use the ASCII data stream, and who don't want to have to "filter
94
-- out" the shift key codes.
95 99 davidgb
-- 
96
--  Copyright (C) 2001 - 2010 John Clayton and John Kent
97
--
98
--  This program is free software: you can redistribute it and/or modify
99
--  it under the terms of the GNU General Public License as published by
100
--  the Free Software Foundation, either version 3 of the License, or
101
--  (at your option) any later version.
102
--
103
--  This program is distributed in the hope that it will be useful,
104
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
105
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
106
--  GNU General Public License for more details.
107
--
108
--  You should have received a copy of the GNU General Public License
109
--  along with this program.  If not, see <http://www.gnu.org/licenses/>.
110
--
111
--===========================================================================--
112
--                                                                           --
113
--                              Revision  History                            --
114
--                                                                           --
115
--===========================================================================--
116
--
117
-- Author: John Clayton
118
-- 2001-04-30 copied this file from lcd_2.v (pared down).
119
-- 2001-05-24 changed the first module from "ps2_keyboard_receiver"
120
--            to "ps2_keyboard_interface"
121
-- 2001-05-29 Added input synchronizing flip-flops.  Changed state
122
--            encoding (m1) for good operation after part config.
123
-- 2001-05-31 Added low drive strength and slow transitions to ps2_clk
124
--            and ps2_data in the constraints file.  Added the signal
125
--            "tx_shifting_done" as distinguished from "rx_shifting_done."
126
--            Debugged the transmitter portion in the lab.
127
-- 2001-06-01 Added horizontal tab to the ascii output.
128
-- 2001-06-01 Added parameter TRAP_SHIFT_KEYS.
129
-- 2001-06-05 Debugged the "debounce" timer functionality.
130
--            Used 60usec timer as a "watchdog" timeout during
131
--            receive from the keyboard.  This means that a keyboard
132
--            can now be "hot plugged" into the interface, without
133
--            messing up the bit_count, since the bit_count is reset
134
--            to zero during periods of inactivity anyway.  This was
135
--            difficult to debug.  I ended up using the logic analyzer,
136
--            and had to scratch my head quite a bit.
137
-- 2001-06-06 Removed extra comments before the input synchronizing
138
--            flip-flops.  Used the correct parameter to size the
139
--            5usec_timer_count.  Changed the name of this file from
140
--            ps2.v to ps2_keyboard.v
141
-- 2001-06/06 Removed "&& q[7:0]" in output_strobe logic.  Removed extra
142
--            commented out "else" condition in the shift register and
143
--            bit counter.
144
-- 2001-06-07 Changed default values for 60usec timer parameters so that
145
--            they correspond to 60usec for a 49.152MHz clock.
146
--
147
-- Author: John Kent
148
--      2001-02-10 Converted to VHDL
149
-- 2004-09-11 Added ctrl key 
150
--            Changed undefined key codes to x"ff"
151
--            Reversed clock polarity
152
-- 2004-10-18 Added ctrl keys to ASCII ROM
153
--            Added CAPS Lock toggle.
154
-- 2007-02-06 Added Generic Clock parameter
155
-- 2010-05-31 Revised header, added GPL
156
-- 2010-06-17 Change some signal names for consistancy
157 19 dilbert57
--
158
--
159 99 davidgb
--
160 19 dilbert57
---------------------------------------------------------------------------------------
161
 
162
library ieee;
163
   use ieee.std_logic_1164.all;
164 99 davidgb
   use ieee.std_logic_arith.all;
165
   use ieee.std_logic_unsigned.all;
166 19 dilbert57
   use ieee.numeric_std.all;
167 99 davidgb
library unisim;
168
   use unisim.vcomponents.all;
169 19 dilbert57
 
170 99 davidgb
entity ps2_keyboard is
171 19 dilbert57
  generic (
172 99 davidgb
  CLK_FREQ_MHZ   : integer
173 19 dilbert57
  );
174
 
175
  port(
176
  clk             : in    std_logic;
177
  reset           : in    std_logic;
178 99 davidgb
  rx_data         : out   std_logic_vector(7 downto 0);
179
  rx_read         : in    std_logic;
180
  rx_data_ready   : out   std_logic;
181 19 dilbert57
  rx_extended     : out   std_logic;
182
  rx_released     : out   std_logic;
183 99 davidgb
  rx_shift_on     : out   std_logic;
184 19 dilbert57
  tx_data         : in    std_logic_vector(7 downto 0);
185
  tx_write        : in    std_logic;
186 99 davidgb
  tx_data_empty   : out   std_logic;
187
  tx_error            : out   std_logic;
188
  ps2_clk         : inout std_logic;
189
  ps2_data        : inout std_logic
190 19 dilbert57
  );
191 99 davidgb
end ps2_keyboard;
192 19 dilbert57
 
193
-------------------------------------------------------------------------------
194
-- Architecture for ps2 keyboard interface
195
-------------------------------------------------------------------------------
196 99 davidgb
architecture rtl of ps2_keyboard is
197 19 dilbert57
  -----------------------------------------------------------------------------
198
 
199
 
200
constant TOTAL_BITS   : integer := 11;
201
constant EXTEND_CODE  : integer := 16#E0#;
202
constant RELEASE_CODE : integer := 16#F0#;
203
constant LEFT_SHIFT   : integer := 16#12#;
204
constant RIGHT_SHIFT  : integer := 16#59#;
205
constant CTRL_CODE    : integer := 16#14#;
206
constant CAPS_CODE    : integer := 16#58#;
207
 
208
 
209
-- constants
210
 
211
-- The timer value can be up to (2^bits) inclusive.
212
-- Values for 49.152 MHz clock
213
--constant TIMER_60USEC_VALUE_PP : integer := 2950; -- Number of sys_clks for 60usec.
214
--constant TIMER_60USEC_BITS_PP  : integer := 12;   -- Number of bits needed for timer
215
--constant TIMER_5USEC_VALUE_PP  : integer := 186;   -- Number of sys_clks for debounce
216
--constant TIMER_5USEC_BITS_PP   : integer := 8;     -- Number of bits needed for timer
217
 
218
-- Values for  12.5 MHz Clock
219
--constant TIMER_60USEC_VALUE_PP : integer := 750; -- Number of sys_clks for 60usec.
220
--constant TIMER_60USEC_BITS_PP  : integer := 10;  -- Number of bits needed for timer
221
--constant TIMER_5USEC_VALUE_PP  : integer := 62;  -- Number of sys_clks for debounce
222
--constant TIMER_5USEC_BITS_PP   : integer := 6;   -- Number of bits needed for timer
223
 
224
-- Values for  25 MHz Clock
225
--constant TIMER_60USEC_VALUE_PP : integer := 1500; -- Number of sys_clks for 60usec.
226
--constant TIMER_60USEC_BITS_PP  : integer := 11;   -- Number of bits needed for timer
227
--constant TIMER_5USEC_VALUE_PP  : integer := 125;  -- Number of sys_clks for debounce
228
--constant TIMER_5USEC_BITS_PP   : integer := 7;    -- Number of bits needed for timer
229
 
230
-- Values for  generic Clock up to 50 MHz
231 99 davidgb
constant TIMER_60USEC_VALUE_PP : integer := CLK_FREQ_MHZ * 60;  -- Number of sys_clks for 60usec.
232 19 dilbert57
constant TIMER_60USEC_BITS_PP  : integer := 12;                 -- Number of bits needed for timer
233 99 davidgb
constant TIMER_5USEC_VALUE_PP  : integer := CLK_FREQ_MHZ * 5;   -- Number of sys_clks for debounce
234 19 dilbert57
constant TIMER_5USEC_BITS_PP   : integer := 8;                  -- Number of bits needed for timer
235
 
236
constant TRAP_SHIFT_KEYS_PP    : integer := 1;   -- Default: No shift key trap.
237
 
238
-- State encodings, provided as constants
239
-- for flexibility to the one instantiating the module.
240
-- In general, the default values need not be changed.
241
 
242
-- State "m1_rx_clk_l" has been chosen on purpose.  Since the input
243
-- synchronizing flip-flops initially contain zero, it takes one clk
244
-- for them to update to reflect the actual (idle = high) status of
245
-- the I/O lines from the keyboard.  Therefore, choosing 0 for m1_rx_clk_l
246
-- allows the state machine to transition to m1_rx_clk_h when the true
247
-- values of the input signals become present at the outputs of the
248
-- synchronizing flip-flops.  This initial transition is harmless, and it
249
-- eliminates the need for a "reset" pulse before the interface can operate.
250
 
251
type m1_type is ( m1_rx_clk_h, m1_rx_clk_l,
252
                  m1_tx_wait_clk_h, m1_tx_force_clk_l,
253
                                                m1_tx_clk_h, m1_tx_clk_l,
254
                                                m1_tx_wait_keyboard_ack, m1_tx_done_recovery,
255 99 davidgb
                                                m1_tx_error, m1_tx_rising_edge_marker,
256 19 dilbert57
                                                m1_tx_first_wait_clk_h, m1_tx_first_wait_clk_l, m1_tx_reset_timer,
257
                  m1_rx_falling_edge_marker, m1_rx_rising_edge_marker );
258
 
259
-- Internal signal declarations
260
signal timer_60usec_done  : std_logic;
261
signal timer_5usec_done   : std_logic;
262
signal extended           : std_logic;
263
signal released           : std_logic;
264
signal shift_key_on       : std_logic;
265
signal ctrl_key_on        : std_logic;
266
signal caps_key_on        : std_logic;
267
 
268
                         -- NOTE: These two signals used to be one.  They
269
                         --       were split into two signals because of
270
                         --       shift key trapping.  With shift key
271
                         --       trapping, no event is generated externally,
272
                         --       but the "hold" data must still be cleared
273
                         --       anyway regardless, in preparation for the
274
                         --       next scan codes.
275
signal rx_output_event    : std_logic;    -- Used only to clear: hold_released, hold_extended
276
signal rx_output_strobe   : std_logic;   -- Used to produce the actual output.
277
 
278
signal tx_parity_bit      : std_logic;
279
signal rx_shifting_done   : std_logic;
280
signal tx_shifting_done   : std_logic;
281
signal shift_key_plus_code: std_logic_vector(8 downto 0);
282
 
283
signal q                  : std_logic_vector(TOTAL_BITS-1 downto 0);
284
signal m1_state           : m1_type;
285
signal m1_next_state      : m1_type;
286
signal bit_count          : std_logic_vector(3 downto 0);
287
signal enable_timer_60usec: std_logic;
288
signal enable_timer_5usec : std_logic;
289
signal timer_60usec_count : std_logic_vector(TIMER_60USEC_BITS_PP-1 downto 0);
290
signal timer_5usec_count  : std_logic_vector(TIMER_5USEC_BITS_PP-1 downto 0);
291
signal ascii              : std_logic_vector(7 downto 0);      -- "REG" type only because a case statement is used.
292
signal left_shift_key     : std_logic;
293
signal right_shift_key    : std_logic;
294
signal hold_extended      : std_logic;  -- Holds prior value, cleared at rx_output_strobe
295
signal hold_released      : std_logic;  -- Holds prior value, cleared at rx_output_strobe
296
signal ps2_clk_s          : std_logic;  -- Synchronous version of this input
297
signal ps2_data_s         : std_logic;  -- Synchronous version of this input
298
signal ps2_clk_hi_z       : std_logic;  -- Without keyboard, high Z equals 1 due to pullups.
299
signal ps2_data_hi_z      : std_logic;  -- Without keyboard, high Z equals 1 due to pullups.
300 99 davidgb
signal tx_data_empty_o    : std_logic;
301 19 dilbert57
 
302
--
303
-- key lookup table
304
--
305
component keymap_rom
306
    Port (
307 99 davidgb
    clk      : in  std_logic;
308
    rst      : in  std_logic;
309
    cs       : in  std_logic;
310
    rw       : in  std_logic;
311
    addr     : in  std_logic_vector (8 downto 0);
312
    data_in  : in  std_logic_vector (7 downto 0);
313
    data_out : out std_logic_vector (7 downto 0)
314 19 dilbert57
    );
315
end component;
316
 
317
begin
318
 
319
my_key_map : keymap_rom
320
     Port map (
321 99 davidgb
          clk      => clk,
322
          rst      => reset,
323
          cs       => '1',
324
          rw       => '1',
325
          addr     => shift_key_plus_code,
326
          data_in  => "00000000",
327
          data_out => ascii
328 19 dilbert57
          );
329
 
330
----------------------------------------------------------------------------
331
-- Module code
332
-- assign ps2_clk = ps2_clk_hi_z?1'bZ:1'b0;
333
-- assign ps2_data = ps2_data_hi_z?1'bZ:1'b0;
334
--
335
ps2_direction : process( ps2_clk_hi_z, ps2_data_hi_z )
336
begin
337 99 davidgb
 
338 19 dilbert57
  if( ps2_clk_hi_z = '1' ) then
339
     ps2_clk <= 'Z';
340
  else
341
     ps2_clk <= '0';
342 99 davidgb
  end if;
343
 
344 19 dilbert57
  if( ps2_data_hi_z = '1' ) then
345
     ps2_data <= 'Z';
346
  else
347
     ps2_data <= '0';
348 99 davidgb
  end if;
349
 
350 19 dilbert57
end process;
351
 
352
-- Input "synchronizing" logic -- synchronizes the inputs to the state
353
-- machine clock, thus avoiding errors related to
354
-- spurious state machine transitions.
355
ps2_synch : process(clk, ps2_clk, ps2_data)
356
begin
357
  if clk'event and clk='0' then
358
    ps2_clk_s <= ps2_clk;
359
    ps2_data_s <= ps2_data;
360
  end if;
361
end process;
362
 
363
-- State register
364
m1_state_register : process( clk, reset, m1_state )
365
begin
366
  if clk'event and clk='0' then
367
    if (reset = '1') then
368
            m1_state <= m1_rx_clk_h;
369
    else
370
            m1_state <= m1_next_state;
371
    end if;
372
  end if;
373
end process;
374
 
375
m1_state_logic : process( m1_state, q,
376
                          tx_shifting_done, tx_write,
377
                                                                  ps2_clk_s, ps2_data_s,
378
                                                                  timer_60usec_done, timer_5usec_done )
379
begin
380
  -- Output signals default to this value, unless changed in a state condition.
381
  ps2_clk_hi_z             <= '1';
382
  ps2_data_hi_z            <= '1';
383 99 davidgb
  tx_error                 <= '0';
384 19 dilbert57
  enable_timer_60usec      <= '0';
385
  enable_timer_5usec       <= '0';
386
 
387
  case (m1_state) is
388
  when m1_rx_clk_h =>
389
        enable_timer_60usec <= '1';
390
        if (tx_write = '1') then
391
                      m1_next_state <= m1_tx_reset_timer;
392
        elsif (ps2_clk_s = '0') then
393
                      m1_next_state <= m1_rx_falling_edge_marker;
394
        else
395
                      m1_next_state <= m1_rx_clk_h;
396
        end if;
397
 
398
  when m1_rx_falling_edge_marker =>
399
        enable_timer_60usec <= '0';
400
        m1_next_state <= m1_rx_clk_l;
401
 
402
  when m1_rx_clk_l =>
403
        enable_timer_60usec <= '1';
404
        if (tx_write = '1') then
405
                     m1_next_state <= m1_tx_reset_timer;
406
        elsif (ps2_clk_s = '1') then
407
                     m1_next_state <= m1_rx_rising_edge_marker;
408
        else
409
                     m1_next_state <= m1_rx_clk_l;
410
        end if;
411
 
412
  when m1_rx_rising_edge_marker =>
413
        enable_timer_60usec <= '0';
414
        m1_next_state <= m1_rx_clk_h;
415
 
416
  when m1_tx_reset_timer =>
417
        enable_timer_60usec <= '0';
418
        m1_next_state <= m1_tx_force_clk_l;
419
 
420
  when m1_tx_force_clk_l =>
421
        enable_timer_60usec <= '1';
422
        ps2_clk_hi_z <= '0';  -- Force the ps2_clk line low.
423
        if (timer_60usec_done = '1') then
424
                     m1_next_state <= m1_tx_first_wait_clk_h;
425
        else
426
                     m1_next_state <= m1_tx_force_clk_l;
427
        end     if;
428
 
429
  when m1_tx_first_wait_clk_h =>
430
        enable_timer_5usec <= '1';
431
        ps2_data_hi_z <= '0';        -- Start bit.
432
        if (ps2_clk_s = '0') and (timer_5usec_done = '1') then
433
          m1_next_state <= m1_tx_clk_l;
434
        else
435
          m1_next_state <= m1_tx_first_wait_clk_h;
436
        end     if;
437
 
438
    -- This state must be included because the device might possibly
439
    -- delay for up to 10 milliseconds before beginning its clock pulses.
440
    -- During that waiting time, we cannot drive the data (q[0]) because it
441
    -- is possibly 1, which would cause the keyboard to abort its receive
442
    -- and the expected clocks would then never be generated.
443
  when m1_tx_first_wait_clk_l =>
444
        ps2_data_hi_z <= '0';
445
        if (ps2_clk_s = '0') then
446
                     m1_next_state <= m1_tx_clk_l;
447
        else
448
                     m1_next_state <= m1_tx_first_wait_clk_l;
449
        end     if;
450
 
451
  when m1_tx_wait_clk_h =>
452
        enable_timer_5usec <= '1';
453
        ps2_data_hi_z <= q(0);
454
        if (ps2_clk_s = '1') and (timer_5usec_done = '1') then
455
          m1_next_state <= m1_tx_rising_edge_marker;
456
        else
457
          m1_next_state <= m1_tx_wait_clk_h;
458
        end     if;
459
 
460
  when m1_tx_rising_edge_marker =>
461
        ps2_data_hi_z <= q(0);
462
        m1_next_state <= m1_tx_clk_h;
463
 
464
  when m1_tx_clk_h =>
465
        ps2_data_hi_z <= q(0);
466
        if (tx_shifting_done = '1') then
467
                     m1_next_state <= m1_tx_wait_keyboard_ack;
468
        elsif (ps2_clk_s = '0') then
469
                     m1_next_state <= m1_tx_clk_l;
470
        else
471
                     m1_next_state <= m1_tx_clk_h;
472
        end     if;
473
 
474
  when m1_tx_clk_l =>
475
        ps2_data_hi_z <= q(0);
476
        if (ps2_clk_s = '1') then
477
                     m1_next_state <= m1_tx_wait_clk_h;
478
        else
479
                     m1_next_state <= m1_tx_clk_l;
480
        end     if;
481
 
482
  when m1_tx_wait_keyboard_ack =>
483
        if (ps2_clk_s = '0') and (ps2_data_s = '1') then
484 99 davidgb
           m1_next_state <= m1_tx_error;
485 19 dilbert57
        elsif (ps2_clk_s = '0') and (ps2_data_s = '0') then
486
           m1_next_state <= m1_tx_done_recovery;
487
        else
488
                     m1_next_state <= m1_tx_wait_keyboard_ack;
489
        end     if;
490
 
491
  when m1_tx_done_recovery =>
492
        if (ps2_clk_s = '1') and (ps2_data_s = '1') then
493
                     m1_next_state <= m1_rx_clk_h;
494
        else
495
                     m1_next_state <= m1_tx_done_recovery;
496
        end     if;
497
 
498 99 davidgb
  when m1_tx_error =>
499
        tx_error <= '1';
500 19 dilbert57
        if (ps2_clk_s = '1') and (ps2_data_s ='1') then
501
                     m1_next_state <= m1_rx_clk_h;
502
        else
503 99 davidgb
                     m1_next_state <= m1_tx_error;
504 19 dilbert57
        end     if;
505
 
506
  when others =>
507
             m1_next_state <= m1_rx_clk_h;
508
  end case;
509
end process;
510
 
511
-- This is the bit counter
512
bit_counter: process(clk, reset, m1_state, bit_count )
513
begin
514
  if clk'event and clk = '0' then
515
    if ( reset = '1' ) or
516
       ( rx_shifting_done = '1' ) or
517
       (m1_state = m1_tx_wait_keyboard_ack) then       -- After tx is done.
518
       bit_count <= "0000";  -- normal reset
519
    elsif (timer_60usec_done = '1' ) and
520
          (m1_state = m1_rx_clk_h)      and
521
          (ps2_clk_s = '1') then
522
       bit_count <= "0000";  -- rx watchdog timer reset
523
    elsif (m1_state = m1_rx_falling_edge_marker) or  -- increment for rx
524
          (m1_state = m1_tx_rising_edge_marker) then  -- increment for tx
525
       bit_count <= bit_count + 1;
526
    end if;
527
  end if;
528
end process;
529
 
530 99 davidgb
assign: process( bit_count, tx_write, tx_data_empty_o, m1_state )
531 19 dilbert57
begin
532
  if (bit_count = TOTAL_BITS) then
533
     rx_shifting_done <= '1';
534
  else
535
     rx_shifting_done <= '0';
536
  end if;
537
 
538
  if (bit_count = (TOTAL_BITS-1)) then
539
     tx_shifting_done <= '1';
540
  else
541
     tx_shifting_done <= '0';
542
  end if;
543
 
544
-- This is the signal which enables loading of the shift register.
545
-- It also indicates "ack" to the device writing to the transmitter.
546
  if ((tx_write = '1') and (m1_state = m1_rx_clk_h)) or
547
     ((tx_write = '1') and (m1_state = m1_rx_clk_l)) then
548 99 davidgb
     tx_data_empty_o <= '1';
549 19 dilbert57
  else
550 99 davidgb
     tx_data_empty_o <= '0';
551 19 dilbert57
  end if;
552 99 davidgb
  tx_data_empty <= tx_data_empty_o;
553 19 dilbert57
end process;
554
 
555
-- This is the ODD parity bit for the transmitted word.
556
-- assign tx_parity_bit = ~^tx_data;
557
--
558
tx_parity_bit <= not( tx_data(7) xor tx_data(6) xor tx_data(5) xor tx_data(4) xor
559
                      tx_data(3) xor tx_data(2) xor tx_data(1) xor tx_data(0) );
560
 
561
-- This is the shift register
562 99 davidgb
q_shift : process(clk, tx_data_empty_o, tx_parity_bit, tx_data,
563 19 dilbert57
                  m1_state, q, ps2_data_s, rx_shifting_done )
564
begin
565
  if clk'event and clk='0' then
566
    if (reset = '1') then
567
            q <= "00000000000";
568 99 davidgb
    elsif (tx_data_empty_o = '1') then
569 19 dilbert57
            q <= "1" & tx_parity_bit & tx_data & "0";
570
    elsif ( (m1_state = m1_rx_falling_edge_marker)      or
571
            (m1_state = m1_tx_rising_edge_marker) ) then
572
       q <= ps2_data_s & q((TOTAL_BITS-1) downto 1);
573
    end if;
574
  end if;
575
 
576
-- Create the signals which indicate special scan codes received.
577
-- These are the "unlatched versions."
578
  if (q(8 downto 1) = EXTEND_CODE) and (rx_shifting_done = '1') then
579
    extended <= '1';
580
  else
581
    extended <= '0';
582
  end if;
583
  if (q(8 downto 1) = RELEASE_CODE) and (rx_shifting_done = '1') then
584
    released <= '1';
585
  else
586
    released <= '0';
587
  end if;
588
end process;
589
 
590
-- This is the 60usec timer counter
591
timer60usec: process(clk, enable_timer_60usec, timer_60usec_count)
592
begin
593
  if clk'event and clk = '0' then
594
    if (enable_timer_60usec = '0') then
595
            timer_60usec_count <= (others => '0');
596
    elsif (timer_60usec_done = '0') then
597
            timer_60usec_count <= timer_60usec_count + 1;
598
    end if;
599
  end if;
600
 
601
  if (timer_60usec_count = (TIMER_60USEC_VALUE_PP - 1)) then
602
         timer_60usec_done <= '1';
603
  else
604
    timer_60usec_done <= '0';
605
  end if;
606
end process;
607
 
608
-- This is the 5usec timer counter
609
timer5usec : process(clk, enable_timer_5usec, timer_5usec_count )
610
begin
611
  if clk'event and clk = '0' then
612
    if (enable_timer_5usec = '0') then
613
           timer_5usec_count <= (others => '0');
614
    elsif (timer_5usec_done = '0') then
615
           timer_5usec_count <= timer_5usec_count + 1;
616
    end if;
617
  end if;
618
 
619
  if( timer_5usec_count = (TIMER_5USEC_VALUE_PP - 1)) then
620
         timer_5usec_done <= '1';
621
  else
622
         timer_5usec_done <= '0';
623
  end if;
624
end process;
625
 
626
 
627
-- Store the special scan code status bits
628
-- Not the final output, but an intermediate storage place,
629
-- until the entire set of output data can be assembled.
630
special_scan : process(clk, reset, rx_output_event, rx_shifting_done, extended, released )
631
begin
632
  if clk'event and clk='0' then
633
    if (reset = '1') or (rx_output_event = '1') then
634
      hold_extended <= '0';
635
      hold_released <= '0';
636
    else
637
      if (rx_shifting_done = '1') and (extended = '1') then
638
             hold_extended <= '1';
639
      end if;
640
      if (rx_shifting_done = '1') and (released = '1') then
641
             hold_released <= '1';
642
      end if;
643
    end if;
644
  end if;
645
end process;
646
 
647
 
648
-- These bits contain the status of the two shift keys
649
left_shift_proc : process(clk, reset, q, rx_shifting_done, hold_released )
650
begin
651
  if clk'event and clk = '0' then
652
    if (reset = '1') then
653
           left_shift_key <= '0';
654
    elsif (q(8 downto 1) = LEFT_SHIFT) and
655
               (rx_shifting_done = '1') and
656
                         (hold_released = '0') then
657
      left_shift_key <= '1';
658
    elsif (q(8 downto 1) = LEFT_SHIFT) and
659
               (rx_shifting_done = '1') and
660
                         (hold_released = '1') then
661
      left_shift_key <= '0';
662
    end if;
663
  end if;
664
end process;
665
 
666
right_shift_proc : process(clk, reset, q, rx_shifting_done, hold_released )
667
begin
668
  if clk'event and clk = '0' then
669
    if (reset = '1') then
670
           right_shift_key <= '0';
671
    elsif (q(8 downto 1) = RIGHT_SHIFT) and
672
               (rx_shifting_done = '1') and
673
                         (hold_released = '0') then
674
      right_shift_key <= '1';
675
    elsif (q(8 downto 1) = RIGHT_SHIFT) and
676
               (rx_shifting_done = '1') and
677
                         (hold_released = '1') then
678
      right_shift_key <= '0';
679
    end if;
680
  end if;
681
end process;
682
 
683
shift_key_on <= left_shift_key or right_shift_key;
684 99 davidgb
rx_shift_on <= shift_key_on;
685 19 dilbert57
 
686
--
687
-- Control keys
688
--
689
ctrl_proc : process(clk, reset, q, rx_shifting_done, hold_released )
690
begin
691
  if clk'event and clk = '0' then
692
    if (reset = '1') then
693
           ctrl_key_on <= '0';
694
    elsif (q(8 downto 1) = CTRL_CODE) and
695
               (rx_shifting_done = '1') and
696
                         (hold_released = '0') then
697
      ctrl_key_on <= '1';
698
    elsif (q(8 downto 1) = CTRL_CODE) and
699
               (rx_shifting_done = '1') and
700
                         (hold_released = '1') then
701
      ctrl_key_on <= '0';
702
    end if;
703
  end if;
704
end process;
705
 
706
--
707
-- Caps lock
708
--
709
caps_proc : process(clk, reset, q, rx_shifting_done, hold_released, caps_key_on )
710
begin
711
  if clk'event and clk = '0' then
712
    if (reset = '1') then
713
           caps_key_on <= '0';
714
    elsif (q(8 downto 1) = CAPS_CODE) and
715
               (rx_shifting_done = '1') and
716
                         (hold_released = '0') then
717
      caps_key_on <= not caps_key_on;
718
    end if;
719
  end if;
720
end process;
721
 
722
-- Output the special scan code flags, the scan code and the ascii
723
special_scan_proc : process(clk, reset,
724
                                                                         hold_extended, hold_released,
725
                                                                         q, ascii, ctrl_key_on )
726
begin
727
  if clk'event and clk = '0' then
728
    if (reset = '1')    then
729
      rx_extended <= '0';
730
      rx_released <= '0';
731
--      rx_scan_code <= "00000000";
732 99 davidgb
      rx_data <= "00000000";
733 19 dilbert57
    elsif (rx_output_strobe = '1') then
734
      rx_extended <= hold_extended;
735
      rx_released <= hold_released;
736
--      rx_scan_code <= q(8 downto 1);
737
    elsif ctrl_key_on = '1' then
738 99 davidgb
           rx_data <= ascii and x"1f";
739 19 dilbert57
    else
740 99 davidgb
      rx_data <= ascii;
741 19 dilbert57
    end if;
742
  end if;
743
end process;
744
 
745
-- Store the final rx output data only when all extend and release codes
746
-- are received and the next (actual key) scan code is also ready.
747
-- (the presence of rx_extended or rx_released refers to the
748
-- the current latest scan code received, not the previously latched flags.)
749
 
750
rx_output_proc : process( clk, reset,
751
                          rx_shifting_done, rx_output_strobe,
752
                          extended, released,
753
                                                                  q, ascii, rx_read )
754
begin
755
  if (rx_shifting_done = '1') and (extended = '0') and (released = '0') then
756
    rx_output_event <= '1';
757
  else
758
    rx_output_event <= '0';
759
  end if;
760
 
761
  if clk'event and clk = '0' then
762
    if reset = '1' then
763
           rx_output_strobe <= '0';
764
    elsif (rx_shifting_done = '1') and
765
          (rx_output_strobe = '0') and
766
               (extended = '0') and
767
                         (released = '0') and
768
                         (hold_released = '0' ) and
769
          (ascii /= x"00" ) then
770
--        ((TRAP_SHIFT_KEYS_PP = 0) or
771
--          ( (q(8 downto 1) /= RIGHT_SHIFT) and 
772
--                 (q(8 downto 1) /= LEFT_SHIFT) and
773
--                      (q(8 downto 1) /= CTRL_CODE) ) )then
774
      rx_output_strobe <= '1';
775
    elsif rx_read = '1' then
776
      rx_output_strobe <= '0';
777
    end if;
778
  end if;
779
  rx_data_ready <= rx_output_strobe;
780
end process;
781
 
782
 
783
-- This part translates the scan code into an ASCII value...
784
-- Only the ASCII codes which I considered important have been included.
785
-- if you want more, just add the appropriate case statement lines...
786
-- (You will need to know the keyboard scan codes you wish to assign.)
787
-- The entries are listed in ascending order of ASCII value.
788
shift_key_plus_code <= shift_key_on & caps_key_on & q(7 downto 1);
789
 
790
--shift_map : process( shift_key_plus_code )
791
--begin
792
--  case shift_key_plus_code is
793
--  when x"066" => ascii <= x"08";  -- Backspace ("backspace" key)
794
--  when x"166" => ascii <= x"08";  -- Backspace ("backspace" key)
795
--  when x"00d" => ascii <= x"09";  -- Horizontal Tab
796
--  when x"10d" => ascii <= x"09";  -- Horizontal Tab
797
--  when x"05a" => ascii <= x"0d";  -- Carriage return ("enter" key)
798
--  when x"15a" => ascii <= x"0d";  -- Carriage return ("enter" key)
799
--  when x"076" => ascii <= x"1b";  -- Escape ("esc" key)
800
--  when x"176" => ascii <= x"1b";  -- Escape ("esc" key)
801
--  when x"029" => ascii <= x"20";  -- Space
802
--  when x"129" => ascii <= x"20";  -- Space
803
--  when x"116" => ascii <= x"21";  -- !
804
--  when x"152" => ascii <= x"22";  -- "
805
--  when x"126" => ascii <= x"23";  -- #
806
--  when x"125" => ascii <= x"24";  -- $
807
--  when x"12e" => ascii <= x"25";  --
808
--  when x"13d" => ascii <= x"26";  --
809
--  when x"052" => ascii <= x"27";  --
810
--  when x"146" => ascii <= x"28";  --
811
--  when x"145" => ascii <= x"29";  --
812
--  when x"13e" => ascii <= x"2a";  -- *
813
--  when x"155" => ascii <= x"2b";  -- +
814
--  when x"041" => ascii <= x"2c";  -- ,
815
--  when x"04e" => ascii <= x"2d";  -- -
816
--  when x"049" => ascii <= x"2e";  -- .
817
--  when x"04a" => ascii <= x"2f";  -- /
818
--  when x"045" => ascii <= x"30";  -- 0
819
--  when x"016" => ascii <= x"31";  -- 1
820
--  when x"01e" => ascii <= x"32";  -- 2
821
--  when x"026" => ascii <= x"33";  -- 3
822
--  when x"025" => ascii <= x"34";  -- 4
823
--  when x"02e" => ascii <= x"35";  -- 5
824
--  when x"036" => ascii <= x"36";  -- 6
825
--  when x"03d" => ascii <= x"37";  -- 7
826
--  when x"03e" => ascii <= x"38";  -- 8
827
--  when x"046" => ascii <= x"39";  -- 9
828
--  when x"14c" => ascii <= x"3a";  -- :
829
--  when x"04c" => ascii <= x"3b";  -- ;
830
--  when x"141" => ascii <= x"3c";  -- <
831
--  when x"055" => ascii <= x"3d";  -- =
832
--  when x"149" => ascii <= x"3e";  -- >
833
--  when x"14a" => ascii <= x"3f";  -- ?
834
--  when x"11e" => ascii <= x"40";  -- @
835
--  when x"11c" => ascii <= x"41";  -- A
836
--  when x"132" => ascii <= x"42";  -- B
837
--  when x"121" => ascii <= x"43";  -- C
838
--  when x"123" => ascii <= x"44";  -- D
839
--  when x"124" => ascii <= x"45";  -- E
840
--  when x"12b" => ascii <= x"46";  -- F
841
--  when x"134" => ascii <= x"47";  -- G
842
--  when x"133" => ascii <= x"48";  -- H
843
--  when x"143" => ascii <= x"49";  -- I
844
--  when x"13b" => ascii <= x"4a";  -- J
845
--  when x"142" => ascii <= x"4b";  -- K
846
--  when x"14b" => ascii <= x"4c";  -- L
847
--  when x"13a" => ascii <= x"4d";  -- M
848
--  when x"131" => ascii <= x"4e";  -- N
849
--  when x"144" => ascii <= x"4f";  -- O
850
--  when x"14d" => ascii <= x"50";  -- P
851
--  when x"115" => ascii <= x"51";  -- Q
852
--  when x"12d" => ascii <= x"52";  -- R
853
--  when x"11b" => ascii <= x"53";  -- S
854
--  when x"12c" => ascii <= x"54";  -- T
855
--  when x"13c" => ascii <= x"55";  -- U
856
--  when x"12a" => ascii <= x"56";  -- V
857
--  when x"11d" => ascii <= x"57";  -- W
858
--  when x"122" => ascii <= x"58";  -- X
859
--  when x"135" => ascii <= x"59";  -- Y
860
--  when x"11a" => ascii <= x"5a";  -- Z
861
--  when x"054" => ascii <= x"5b";  -- [
862
--  when x"05d" => ascii <= x"5c";  -- \
863
--  when x"05b" => ascii <= x"5d";  -- ]
864
--  when x"136" => ascii <= x"5e";  -- ^
865
--  when x"14e" => ascii <= x"5f";  -- _    
866
--  when x"00e" => ascii <= x"60";  -- `
867
--  when x"01c" => ascii <= x"61";  -- a
868
--  when x"032" => ascii <= x"62";  -- b
869
--  when x"021" => ascii <= x"63";  -- c
870
--  when x"023" => ascii <= x"64";  -- d
871
--  when x"024" => ascii <= x"65";  -- e
872
--  when x"02b" => ascii <= x"66";  -- f
873
--  when x"034" => ascii <= x"67";  -- g
874
--  when x"033" => ascii <= x"68";  -- h
875
--  when x"043" => ascii <= x"69";  -- i
876
--  when x"03b" => ascii <= x"6a";  -- j
877
--  when x"042" => ascii <= x"6b";  -- k
878
--  when x"04b" => ascii <= x"6c";  -- l
879
--  when x"03a" => ascii <= x"6d";  -- m
880
--  when x"031" => ascii <= x"6e";  -- n
881
--  when x"044" => ascii <= x"6f";  -- o
882
--  when x"04d" => ascii <= x"70";  -- p
883
--  when x"015" => ascii <= x"71";  -- q
884
--  when x"02d" => ascii <= x"72";  -- r
885
--  when x"01b" => ascii <= x"73";  -- s
886
--  when x"02c" => ascii <= x"74";  -- t
887
--  when x"03c" => ascii <= x"75";  -- u
888
--  when x"02a" => ascii <= x"76";  -- v
889
--  when x"01d" => ascii <= x"77";  -- w
890
--  when x"022" => ascii <= x"78";  -- x
891
--  when x"035" => ascii <= x"79";  -- y
892
--  when x"01a" => ascii <= x"7a";  -- z
893
--  when x"154" => ascii <= x"7b";  -- {
894
--  when x"15d" => ascii <= x"7c";  -- |
895
--  when x"15b" => ascii <= x"7d";  -- }
896
--  when x"10e" => ascii <= x"7e";  -- ~
897
--  when x"071" => ascii <= x"7f";  -- (Delete OR DEL on numeric keypad)
898
--  when x"171" => ascii <= x"7f";  -- (Delete OR DEL on numeric keypad)
899
--  when others => ascii <= x"ff";  -- 0xff used for unlisted characters.
900
--  end case;
901
--end process;
902
 
903
end rtl;

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