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dilbert57 |
System09 Monitor Program
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John Kent
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3rd February 2008
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1. Introduction.
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System09 is FPGA SOC (System On a Chip) that uses a 6809 instruction compatible FPGA core.
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The system is based around the old SWTPc (South West Technical Product Computer),
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the difference being the FPGA version runs witha 25 MHz E Clock where as the SWTPc
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ran with a 1MHz to 2MHz E clock.
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2. Disk Operating Systems
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The SWTPc ran the FLEX9, OS9 and Uniflex operating systems.
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2.1 Flex9
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Flex is a single user operating system developed by TSC (Technical Systems Consultants).
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It was to the Motorola 8 bit microprocessor family what CP/M was to the 8080 and Z80 family.
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Flex9 typically used SBUG1.8 as the monitor program for providing the terminal drivers
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and primative debug functions.
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2.2 UniFlex
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UniFlex was TSC's multi tasking version of their Flex operating system.
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I don't know much about it, other that the fact that much of the code is available on the
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internet. UniFlex made use of the extended memory, and used thw SWTPc DMAF-2 Floppy
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Disk Controller.
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2.3 OS9
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OS9 is a realtime multitasking operating system. It used to come in a basic 64K version
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called Level 1 and an extended memory version that used the DAT (Dynamic Address Translation)
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to map in up to 1 MByte of memory and was called level 2.
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The SWTPc emulator from Evensons Consulting Services uses just the ACIA serial port
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at $E000, a SWTPc MP-T timer module at $E040 for interrupts and a Western Digital
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FD1771 or FD179X Floppy disk controller to run OS9 level 1.
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OS9 had two special 2KByte boot ROMs at resided at $F000 and $F800.
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These contain the start up code to load OS9 from the disk drive and run it.
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3. Monitor Features
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System09 is based on SBUG1.8, which was typically used for the Flex9 operating system
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however I have had to strip out some of the functionality to fit video display and
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PS/2 keyboard drivers. The VDU and PS/2 keyboard operate in parallel with the serial
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port so that commands may be entered either locally on the FPGA system remotely by
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the serial port on say a PC running a terminal program such as hyperterm.
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3.1 Mass storage
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SBUG1.8 had two disk boots, one was for a the DC-1 or compatible floppy disk controller
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that was mapped at $E01X and the other was for the DMAF2 which used the 6844 DMA controller
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and was mapped at $F000 just below the SBUG1.8 monitor program.
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In system09 there is no Western Digital Compatible Floppy disk Controller. (At least not yet.)
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Instead provisons have been made for booting from either a Compact Flash card or an IDE hard drive.
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The method for interfaceing to an IDE drive or CF card varies from FPGA board to FPGA board.
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Some FPGA boards such as the Spartan 3 and Spartan 3E starter boards do not have provision
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for a Compact Flash card or IDE card, although they do have expansion ports that could be
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used for CF or IDE interfaces.
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Some FPGA boards, such as the BurchED B5-X300 have a dedicated CF add on module, which allows
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you to map the CF card in any way you like. The XESS XST-3S1000 and XST-3.0 carrier board on the
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other hand provides a 16 bit peripheral bus that can be used to access the IDE drive connector,
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ethernet controller or two expansion connectors. The Trenz TE0141 and TE0140 boards have the
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CF card mapped into the memory address and data bus, but have done so in such a fashion that it
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can only be used in 8 bit transfer mode.
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CF cards can be programmed to run in 8 bit mode or 16 bit mode. 8 Bit mode is handier for
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interfaceing to 8 bit micros sych as system09, however this mode is not necessarily supported
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by IDE disk drives.
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4. FPGA Cards
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4.1 BurchEd B5-X300
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The B5-X300 version of Sys09bug is covered by the "FPGAOPT" options flag.
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It provides text VDU drivers and PS/2 keyboard interface, ACIA serial port,
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and Compact Flash Bootstrap. The B5-X300 uses a 300Kgate Spartan 2E FPGA which
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means the Block RAM used to hold the monitor ROMs is only 4Kbits.
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four Block RAMs are required to implement a 2KByte monitor program.
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4.2 Digilent / Xilinx Spartan 3 Starter Board
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The Xilinx spartan 3 starter board was designed by Digilent. It uses the Spartan 3 FPGA
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and intially came in a 200K gate version although a 1000KGate version is also available.
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The Spartan 3 starterboard is fitted wit 256K x 32 bits of RAM, which is mapped as 1M x 8 bits.
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The Spartan 3 starter board does not have any mass storage interfaces, although it does have
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expansion sockets that may be used to add external CF or IDE interfaces. The SRAM on the
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otherhand can be used as a RAM disk, and data can be downloaded via serial link.
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David Rumball designed his version of system09 called the Microbox 2000 which was based on
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the spartan 3 starter board. He was able to use a configuration flash loader to load
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a ROM disk into RAM. He also implemented a RAM disk and a virtual disk that was hosted on
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a PC using the FLEXNET software.
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I borrowed some of his work to extend sys09bug on the spartan 3 starter but have yet to get
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it working.
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4.3 Digilent / Xilinx Spartan 3E starter board
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Digilent produced a Spartan 3e starter board for Xilinx. The big difference between the
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Spartan 3 board and the spartan 3E board is that the latter uses SDRAM rather than SRAM
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and is consequently harder to use. The spartan 3E starter was used to verify the operation
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of the 6809 core, however because of the difficulty implementing the SDRAM controller
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I used Block RAM instead. The design implemented a PIA interrupt timer that sys09bug could
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use to single step through instructions one at a time. The S3E version of System09 implements
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a Trace command that performs a register dump after each instruction is executed.
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This allowed comparison of the FPGA 6809 core with a reference design using the original chip.
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Because RAM was limitted in the S3E, System09 also does not implement the DAT so the monitor
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start up code at the top of memory to test for memory is not implemented in the S3E version.
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4.4 XESS XSA-3S1000 / XST-3.0
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