URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

[/] [System09/] [trunk/] [src/] [sys09bug/] [sys09equ.asm] - Blame information for rev 223

Go to most recent revision | Details | Compare with Previous | View Log


*
***************************************************
*   MEMORY MAP EQUATES                            *
***************************************************
MONIO  EQU $E000  I/O SPACE
       IFD B3SOPT
MONEXT EQU $F000  START OF EXTENDED COMMANDS
EXTCMD EQU $00    EXTENDED OFFSET
       ENDIF B3SOPT
       IFD S3EOPT
MONRAM EQU $7FC0
       ELSE
MONRAM EQU $DFC0  STACK SPACE
       ENDIF S3EOPT
MONROM EQU $F800  START OF ROM
       IFD S3SOPT
MONEXT EQU $F000  START OF EXTENDED COMMANDS
EXTCMD EQU $00    EXTENDED OFFSET
       ENDIF S3SOPT
       IFD XESOPT
MONEXT EQU $F000  START OF EXTENDED COMMANDS
EXTCMD EQU $00    EXTENDED OFFSET
       ENDIF XESOPT
       IFD ATLOPT
MONEXT EQU $F000  START OF EXTENDED COMMANDS
EXTCMD EQU $00    EXTENDED OFFSET
       ENDIF ATLOPT
       IFD DE270OPT
MONEXT EQU $F000  START OF EXTENDED COMMANDS
EXTCMD EQU $00    EXTENDED OFFSET
       ENDIF DE270OPT
**************************************************
**************************************************
 
        IFD SWTOPT
*
* SOUTH WEST TECHNICAL PRODUCTS COMPUTER
*
ACIAOPT EQU $FF ACIA AT PORT 0
DMAFOPT EQU $FF DMAF2 8" FLOPPY DISK BOOT
MFDCOPT EQU $FF MINIFLOPPY 5.25" DISK BOOT
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
        ENDIF
*
        IFD ADSOPT
*
* ACKERMAN DIGITAL ADS6809
*
DG640OPT  EQU $FF DG640 VDU AT $E800
*RTCOPT  EQU $FF REAL TIME CLOCK
PRTOPT  EQU $FF PRINTER DRIVERS
MFDCOPT EQU $FF MINIFLOPPY 5.25" DISK BOOT
        ENDIF ADSOPT
*
        IFD B3SOPT
*
* BURCHED SPARTAN 2 B3+
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
IDEOPT  EQU $FF IDE AT $E100
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
HFCOPT  EQU $FF HARDWARE FLOW CONTROL
        ENDIF B3SOPT
*
        IFD B5XOPT
*
* BURCHED SPARTAN 2 B5-X300
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
CF8OPT  EQU $FF COMPACT FLASH AT $E040
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
HFCOPT  EQU $FF HARDWARE FLOW CONTROL
        ENDIF B5XOPT
*
        IFD S3SOPT
*
* DIGILENT SPARTAN 3 STARTER
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
CF8OPT  EQU $FF COMPACT FLASH AT $E040
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
EXTOPT  EQU $FF EXTENDED COMMANDS
        ENDIF S3SOPT
*
        IFD S3EOPT
*
* DIGILENT SPARTAN 3E STARTER
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
TRAOPT  EQU $FF PIA TRACE TIMER
        ENDIF S3EOPT
*
        IFD XESOPT
*
* XESS SPARTAN 3 XSA-3S1000 & XST-3.0
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
IDEOPT  EQU $FF IDE AT $E100
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
HFCOPT  EQU $FF HARDWARE FLOW CONTROL
EXTOPT  EQU $FF EXTENDED COMMANDS
        ENDIF XESOPT
*
        IFD ATLOPT
*
* Digilent Atlys SPARTAN6
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
IDEOPT  EQU $FF IDE AT $E100
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
HFCOPT  EQU $FF HARDWARE FLOW CONTROL
EXTOPT  EQU $FF EXTENDED COMMANDS
        ENDIF ATLOPT
*
        IFD DE270OPT
*
* TERASIC CYCLONE 2 DE2-70
*
ACIAOPT EQU $FF ACIA AT PORT 0
PS2OPT  EQU $FF PS2 KEYBOARD AT $E020
VDUOPT  EQU $FF VDU AT $E030
CF8OPT  EQU $FF COMPACT FLASH AT $E040
DATOPT  EQU $FF DYNAMIC ADDRESS TRANSLATION
EXTOPT  EQU $FF EXTENDED COMMANDS
        ENDIF DE270OPT
*
*
        IFD   ACIAOPT
*
***************************************************
*   SERIAL PORT                                   *
***************************************************
*
** ACIA SITS ON PORT 0
*
ACIAS   EQU   MONIO+$00   CONTROL PORT
*
        ENDIF ACIAOPT
        IFD   MFDCOPT
*
***************************************************
*   MINIFLOPPY DRIVE                              *
***************************************************
*
** FLOPPY DISK CONTROLLER SITS ON PORT 1
*
DRVFDC  EQU   MONIO+$14
CMDFDC  EQU   MONIO+$18
SECFDC  EQU   MONIO+$1A
DATFDC  EQU   MONIO+$1B
        ENDIF MFDCOPT
        IFD PS2OPT
*
***************************************************
*   VDU8 PS/2 KEYBOARD PORT                       *
***************************************************
*
** KEYBOARD SITS ON PORT 2
*
PS2KBD  EQU   MONIO+$20   PS/2 KEYBOARD PORT
        ENDIF PS2OPT
        IFD VDUOPT
*
***************************************************
*   VDU8 DISPLAY DRIVER EQUATES                   *
***************************************************
*
** VDU8 DISPLAY SITS ON PORT 3
*
VDU     EQU   MONIO+$30
VDUCHR  EQU   0        CHARACTER REGISTER
VDUATT  EQU   1        ATTRIBUTE REGISTER
VDUCOL  EQU   2        CURSOR COLUMN
VDUROW  EQU   3        CURSOR ROW
VDUOFF  EQU   4        ROW OFFSET
*
LINLEN  EQU   80       LENGTH OF A LINE
NUMLIN  EQU   25       NUMBER OF LINES
        ENDIF VDUOPT
*
           IFD CF8OPT
*
***************************************************
*   COMPACT FLASH EQUATES 8 BIT TRANSFER          *
***************************************************
*
** COMPACT FLASH SITS AT PORT 4
*
CF_BASE    EQU MONIO+$40
CF_DATA    EQU CF_BASE+0
CF_ERROR   EQU CF_BASE+1 ; read error
CF_FEATURE EQU CF_BASE+1 ; write feature
CF_SECCNT  EQU CF_BASE+2
CF_SECNUM  EQU CF_BASE+3
CF_CYLLO   EQU CF_BASE+4
CF_CYLHI   EQU CF_BASE+5
CF_HEAD    EQU CF_BASE+6
CF_STATUS  EQU CF_BASE+7 ; read status
CF_COMAND  EQU CF_BASE+7 ; write command
*
* Command Equates
*
CMDREAD    EQU $20 ; Read Single sector
CMDWRITE   EQU $30 ; Write Single sector
CMDFEATURE EQU $EF
FEAT8BIT   EQU $01 ; enable 8 bit transfers
HEADLBA    EQU $E0
*
* Status bit equates
*
BUSY       EQU $80
DRDY       EQU $40
DRQ        EQU $08
ERR        EQU $01
*
           ENDIF CF8OPT
*
           IFD IDEOPT
*
***************************************************
*   COMPACT FLASH EQUATES 16 BIT TRANSFER (XESS)  *
***************************************************
*
** COMPACT FLASH SITS AT PORT 4
*
CF_BASE    EQU MONIO+$0100
CF_DATA    EQU CF_BASE+0
CF_ERROR   EQU CF_BASE+2 ; read error
CF_FEATURE EQU CF_BASE+2 ; write feature
CF_SECCNT  EQU CF_BASE+4
CF_SECNUM  EQU CF_BASE+6
CF_CYLLO   EQU CF_BASE+8
CF_CYLHI   EQU CF_BASE+10
CF_HEAD    EQU CF_BASE+12
CF_STATUS  EQU CF_BASE+14 ; read status
CF_COMAND  EQU CF_BASE+14 ; write command
CF_AUX     EQU CF_BASE+30
*
* Command Equates
*
CMDREAD    EQU $20 ; Read Single sector
CMDWRITE   EQU $30 ; Write Single sector
AUXRESET   EQU $06 ; Reset IDE
AUXRSTREL  EQU $02 ; Reset release IRQ masked
HEADLBA    EQU $E0
*
* Status bit equates
*
BUSY       EQU $80
DRDY       EQU $40
DRQ        EQU $08
ERR        EQU $01
*
           ENDIF CF8OPT
*
        IFD RTCOPT
*
**************************************************
* MM58167A REAL TIME CLOCK MEMORY MAP:
**************************************************
*
** REAL TIME CLOCK SITS ON PORT 4 AND PORT 5
*
CLOCK  EQU MONIO+$40 CLOCK BASE ADDRESS AND REGISTERS
*
* COUNTER AND COMPARITOR REGISTERS:
*
* Both the Clock Counter and Clock Comparitor
* consist of 8 registers for holding the time.
* The register offsets from the Counter and
* Comparitor registers are listed above.
*
COUNTR EQU CLOCK+0
CMPRAM EQU CLOCK+8 COMPARITOR REGISTERS
*
* CLOCK REGISTER OFFSETS:
* These register offsets are used for the CLOCK
* and comparitor ram CMPRAM.
*
S10000 EQU 0 TEN THOUNSANDTHS OF SECONDS
S100   EQU 1 HUNDRETHS AND TENTHS OF SECONDS
SECOND EQU 2
MINUIT EQU 3
HOUR   EQU 4
WKDAY  EQU 5
MTHDAY EQU 6
MONTH  EQU 7
*
* INTERRUPT OUTPUT REGISTERS:
*
* An interrupt output may be generated at the
* following rates by setting the appropriate bit
* in the Interrupt Control Register (CINTCR).
* The Interrupt Status Register (CINTSR) must be
* read to clear the interrupt and will return
* the source of the interrupt.
*
* 1/Month      Bit 7
* 1/Week       Bit 6
* 1/Day        Bit 5
* 1/Hour       Bit 4
* 1/Minuite    Bit 3
* 1/Second     Bit 2
* 10/Second    Bit 1
* Comparitor   Bit 0
*
CINTSR  EQU CLOCK+16 INTERRUPT STATUS REGISTER
CINTCR  EQU CLOCK+17 INTERRUPT CONTROL REGISTER
*
* COUNTER AND RAM RESETS; GO COMMAND.
*
* The counter and comparitor may be reset
* by writing $FF into CTRRES and CMPRES
* respectivly.
* A write to the Go command register (GOCMND)
* will reset the 1/1000ths, 1/100ths and 1/10ths
* of a second counter.
*
CTRRES EQU CLOCK+18 COUNTER RESET
CMPRES EQU CLOCK+19 COMPARITOR RAM RESET
GOCMND EQU CLOCK+21 GO COMMAND
*
* CLOCK STATUS REGISTER.
*
* The counter takes 61 usec. to rollover for
* every 1KHz clock pulse. If the Status bit is
* set after reading the counter, the counter
* should be re-read to ensure the time is correct.
*
CLKSTA EQU CLOCK+20 STATUS BIT
SBYINT EQU CLOCK+22 STANDBY INTERRUPT
TSTMOD EQU CLOCK+31 TEST MODE REGISTER
       ENDIF RTCOPT
*
       IFD TRAOPT
*
**************************************************
* PIA INTERRUPT TIMER
**************************************************
*
** PIA INTERRUPT TIMER SITS ON PORT 7
*
** PIA TIMER FOR SINGLE STEP / TRACE
*
* TADATA = Output = Timer preset register
* TACTRL - CA1 = input = rising edge = NMI
*        - CA2 = Output = Timer Reset (Active High)
* TBDATA = Input = Timer read back register
* TBCTRL - CB1 = input = rising edge = FIRQ
*        - CB2 = output = strobe low on write to TBDATA = Timer Preset
*
* CRA0 = 0 CA1 IRQ DISAB, CRA0 = 1 CA1 IRQ ENAB
* CRA1 = 1 CA1 Rising edge IRQ
* CRA2 = 0 TADATA = Data Direction, CRA2 = 1 TADATA = I/O Register
* CRA3 = 0 CA2 = 0 output, CRA3 = 1 CA2 = 1
* CRA4 = 1 ] CA2 = Set/Reset output
* CRA5 = 1 ]
* CRA6 = X CA2 Input Interrupt Flag
* CRA7 = X CA1 Interrupt Flag
*
* CRB0 = 0 CB1 IRQ DISAB, CRB0 = 1 CA1 IRQ ENAB
* CRB1 = 1 CB1 Rising edge IRQ
* CRB2 = 0 TBDATA = Data Direction, CRB2 = 1 TBDATA = I/O Register
* CRB3 = 0 CB2 = 0 output, CRB3 = 1 CB2 = 1
* CRB4 = 1 ] CB2 = Set/Reset output
* CRB5 = 1 ]
* CRB6 = X CB2 Input Interrupt Flag
* CRB7 = X CB1 Interrupt Flag
*
* DDRA = 0 TADATA = Input, DDRA = 1 TADATA = Output
* DDRB = 0 TBDATA = Input, DDRB = 1 TBDATA = Output
*
TADATA EQU MONIO+$70 Timer preset port
TACTRL EQU MONIO+$71
TBDATA EQU MONIO+$72 Timer read back port
TBCTRL EQU MONIO+$73
*
TRADEL EQU 13  Number of E cycles for RTI (May need to be fudged)
*
       ENDIF TRAOPT
       IFD ADSOPT
*
***************************************************
*   SERIAL PORT FOR DG640                         *
***************************************************
*
** SET UP FOR ACKERMAN DIGITAL ADS6809
** THE ADS6809 S100 BOAD HAS AN ON BOARD ACIA
*
ACIAS   EQU   MONIO+$400   CONTROL PORT
*
        ENDIF ADSOPT
        IFD PRTOPT
*
***************************************************
* PRINTER INTERFACE                               *
***************************************************
*
PADATA EQU MONIO+$404
PACTRL EQU MONIO+$405
PBDATA EQU MONIO+$406
PBCTRL EQU MONIO+$407
*
** CB1  ACK.  I/P
** CB2  STB.  O/P
** PB0 - PB7   DATA 1 - 8   O/P
** PORT A BIT ASSIGNMENT
*
PBUSY  EQU $80 I/P
PEMPTY EQU $40 I/P
SELECT EQU $20 I/P
PERROR EQU $10 I/P
PRESET EQU %00000100 O/P PA3 = 0
AUTOFD EQU %00001000 O/P PA2 = 0
DIRMSK EQU %00001100
       ENDIF PRTOPT
       IFD DG640OPT
*
***************************************************
*   DG640 MEMORY MAPPED DISPLAY DRIVER VARIABLES  *
***************************************************
*
** VIDEO DISPLAY DEFINITIONS
*
SCREEN  EQU   MONIO+$0800 START OF SCREEN MEMORY
LINLEN  EQU   64          LENGTH OF A LINE
NUMLIN  EQU   16          NUMBER OF LINES
SCNLEN  EQU   $400        LENGTH OF SCREEN
        ENDIF DG640OPT
*
        IFD   DMAFOPT
*
***************************************************
*   DMAF2 8" DRIVE                                *
***************************************************
*
ADDREG  EQU   $F000  ADDRESS REGISTER
CNTREG  EQU   $F002  COUNT REGISTER
CCREG   EQU   $F010  CHANNEL CONTROL REGISTER
PRIREG  EQU   $F014  DMA PRIORITY REGISTER
AAAREG  EQU   $F015  ???
BBBREG  EQU   $F016  ???
COMREG  EQU   $F020  1791 COMMAND REGISTER
SECREG  EQU   $F022  SECTOR REGISTER
DRVREG  EQU   $F024  DRIVE SELECT LATCH
CCCREG  EQU   $F040  ???
        ENDIF DMAFOPT
        IFD DATOPT
**************************************************
* DYNAMIC ADDRESS TRANSLATION REGISTERS          *
**************************************************
*
IC11    EQU  $FFF0  DAT RAM CHIP
TSTPAT  EQU  $55AA  TEST PATTERN
        ENDIF DATOPT
*
        END

Line No.	Rev	Author	Line
1	59	davidgb	`*`
2			`***************************************************`
3			`* MEMORY MAP EQUATES *`
4			`***************************************************`
5			`MONIO EQU $E000 I/O SPACE`
6	99	davidgb	`IFD B3SOPT`
7			`MONEXT EQU $F000 START OF EXTENDED COMMANDS`
8			`EXTCMD EQU $00 EXTENDED OFFSET`
9			`ENDIF B3SOPT`
10	59	davidgb	`IFD S3EOPT`
11			`MONRAM EQU $7FC0`
12			`ELSE`
13			`MONRAM EQU $DFC0 STACK SPACE`
14			`ENDIF S3EOPT`
15			`MONROM EQU $F800 START OF ROM`
16			`IFD S3SOPT`
17			`MONEXT EQU $F000 START OF EXTENDED COMMANDS`
18			`EXTCMD EQU $00 EXTENDED OFFSET`
19			`ENDIF S3SOPT`
20			`IFD XESOPT`
21			`MONEXT EQU $F000 START OF EXTENDED COMMANDS`
22			`EXTCMD EQU $00 EXTENDED OFFSET`
23			`ENDIF XESOPT`
24	221	davidgb	`IFD ATLOPT`
25			`MONEXT EQU $F000 START OF EXTENDED COMMANDS`
26			`EXTCMD EQU $00 EXTENDED OFFSET`
27			`ENDIF ATLOPT`
28	120	dilbert57	`IFD DE270OPT`
29			`MONEXT EQU $F000 START OF EXTENDED COMMANDS`
30			`EXTCMD EQU $00 EXTENDED OFFSET`
31			`ENDIF DE270OPT`
32			`**************************************************`
33			`**************************************************`
34	59	davidgb
35	99	davidgb	`IFD SWTOPT`
36	59	davidgb	`*`
37	99	davidgb	`* SOUTH WEST TECHNICAL PRODUCTS COMPUTER`
38	59	davidgb	`*`
39			`ACIAOPT EQU $FF ACIA AT PORT 0`
40	99	davidgb	`DMAFOPT EQU $FF DMAF2 8" FLOPPY DISK BOOT`
41			`MFDCOPT EQU $FF MINIFLOPPY 5.25" DISK BOOT`
42			`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
43			`ENDIF`
44	59	davidgb	`*`
45	99	davidgb	`IFD ADSOPT`
46	59	davidgb	`*`
47	99	davidgb	`* ACKERMAN DIGITAL ADS6809`
48	59	davidgb	`*`
49	99	davidgb	`DG640OPT EQU $FF DG640 VDU AT $E800`
50			`*RTCOPT EQU $FF REAL TIME CLOCK`
51			`PRTOPT EQU $FF PRINTER DRIVERS`
52			`MFDCOPT EQU $FF MINIFLOPPY 5.25" DISK BOOT`
53			`ENDIF ADSOPT`
54			`*`
55			`IFD B3SOPT`
56			`*`
57	120	dilbert57	`* BURCHED SPARTAN 2 B3+`
58	99	davidgb	`*`
59	59	davidgb	`ACIAOPT EQU $FF ACIA AT PORT 0`
60			`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
61			`VDUOPT EQU $FF VDU AT $E030`
62	99	davidgb	`IDEOPT EQU $FF IDE AT $E100`
63	59	davidgb	`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
64	99	davidgb	`HFCOPT EQU $FF HARDWARE FLOW CONTROL`
65			`ENDIF B3SOPT`
66	59	davidgb	`*`
67			`IFD B5XOPT`
68			`*`
69	120	dilbert57	`* BURCHED SPARTAN 2 B5-X300`
70	59	davidgb	`*`
71			`ACIAOPT EQU $FF ACIA AT PORT 0`
72			`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
73			`VDUOPT EQU $FF VDU AT $E030`
74			`CF8OPT EQU $FF COMPACT FLASH AT $E040`
75			`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
76	99	davidgb	`HFCOPT EQU $FF HARDWARE FLOW CONTROL`
77	59	davidgb	`ENDIF B5XOPT`
78			`*`
79	99	davidgb	`IFD S3SOPT`
80	59	davidgb	`*`
81	99	davidgb	`* DIGILENT SPARTAN 3 STARTER`
82	59	davidgb	`*`
83			`ACIAOPT EQU $FF ACIA AT PORT 0`
84			`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
85			`VDUOPT EQU $FF VDU AT $E030`
86	99	davidgb	`CF8OPT EQU $FF COMPACT FLASH AT $E040`
87	59	davidgb	`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
88			`EXTOPT EQU $FF EXTENDED COMMANDS`
89	99	davidgb	`ENDIF S3SOPT`
90	59	davidgb	`*`
91	99	davidgb	`IFD S3EOPT`
92	59	davidgb	`*`
93	99	davidgb	`* DIGILENT SPARTAN 3E STARTER`
94	59	davidgb	`*`
95	99	davidgb	`ACIAOPT EQU $FF ACIA AT PORT 0`
96			`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
97			`VDUOPT EQU $FF VDU AT $E030`
98			`TRAOPT EQU $FF PIA TRACE TIMER`
99			`ENDIF S3EOPT`
100	59	davidgb	`*`
101	99	davidgb	`IFD XESOPT`
102	59	davidgb	`*`
103	120	dilbert57	`* XESS SPARTAN 3 XSA-3S1000 & XST-3.0`
104	59	davidgb	`*`
105			`ACIAOPT EQU $FF ACIA AT PORT 0`
106	99	davidgb	`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
107			`VDUOPT EQU $FF VDU AT $E030`
108			`IDEOPT EQU $FF IDE AT $E100`
109	59	davidgb	`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
110	99	davidgb	`HFCOPT EQU $FF HARDWARE FLOW CONTROL`
111			`EXTOPT EQU $FF EXTENDED COMMANDS`
112			`ENDIF XESOPT`
113	59	davidgb	`*`
114	221	davidgb	`IFD ATLOPT`
115			`*`
116			`* Digilent Atlys SPARTAN6`
117			`*`
118			`ACIAOPT EQU $FF ACIA AT PORT 0`
119			`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
120			`VDUOPT EQU $FF VDU AT $E030`
121			`IDEOPT EQU $FF IDE AT $E100`
122			`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
123			`HFCOPT EQU $FF HARDWARE FLOW CONTROL`
124			`EXTOPT EQU $FF EXTENDED COMMANDS`
125			`ENDIF ATLOPT`
126			`*`
127	120	dilbert57	`IFD DE270OPT`
128	99	davidgb	`*`
129	120	dilbert57	`* TERASIC CYCLONE 2 DE2-70`
130			`*`
131			`ACIAOPT EQU $FF ACIA AT PORT 0`
132			`PS2OPT EQU $FF PS2 KEYBOARD AT $E020`
133			`VDUOPT EQU $FF VDU AT $E030`
134			`CF8OPT EQU $FF COMPACT FLASH AT $E040`
135			`DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION`
136			`EXTOPT EQU $FF EXTENDED COMMANDS`
137			`ENDIF DE270OPT`
138			`*`
139			`*`
140	59	davidgb	`IFD ACIAOPT`
141			`*`
142			`***************************************************`
143			`* SERIAL PORT *`
144			`***************************************************`
145			`*`
146			`** ACIA SITS ON PORT 0`
147			`*`
148			`ACIAS EQU MONIO+$00 CONTROL PORT`
149			`*`
150			`ENDIF ACIAOPT`
151			`IFD MFDCOPT`
152			`*`
153			`***************************************************`
154			`* MINIFLOPPY DRIVE *`
155			`***************************************************`
156			`*`
157			`** FLOPPY DISK CONTROLLER SITS ON PORT 1`
158			`*`
159			`DRVFDC EQU MONIO+$14`
160			`CMDFDC EQU MONIO+$18`
161			`SECFDC EQU MONIO+$1A`
162			`DATFDC EQU MONIO+$1B`
163			`ENDIF MFDCOPT`
164			`IFD PS2OPT`
165			`*`
166			`***************************************************`
167			`* VDU8 PS/2 KEYBOARD PORT *`
168			`***************************************************`
169			`*`
170			`** KEYBOARD SITS ON PORT 2`
171			`*`
172			`PS2KBD EQU MONIO+$20 PS/2 KEYBOARD PORT`
173			`ENDIF PS2OPT`
174			`IFD VDUOPT`
175			`*`
176			`***************************************************`
177			`* VDU8 DISPLAY DRIVER EQUATES *`
178			`***************************************************`
179			`*`
180			`** VDU8 DISPLAY SITS ON PORT 3`
181			`*`
182			`VDU EQU MONIO+$30`
183			`VDUCHR EQU 0 CHARACTER REGISTER`
184			`VDUATT EQU 1 ATTRIBUTE REGISTER`
185			`VDUCOL EQU 2 CURSOR COLUMN`
186			`VDUROW EQU 3 CURSOR ROW`
187			`VDUOFF EQU 4 ROW OFFSET`
188			`*`
189			`LINLEN EQU 80 LENGTH OF A LINE`
190			`NUMLIN EQU 25 NUMBER OF LINES`
191			`ENDIF VDUOPT`
192			`*`
193			`IFD CF8OPT`
194			`*`
195			`***************************************************`
196			`* COMPACT FLASH EQUATES 8 BIT TRANSFER *`
197			`***************************************************`
198			`*`
199			`** COMPACT FLASH SITS AT PORT 4`
200			`*`
201			`CF_BASE EQU MONIO+$40`
202			`CF_DATA EQU CF_BASE+0`
203			`CF_ERROR EQU CF_BASE+1 ; read error`
204			`CF_FEATURE EQU CF_BASE+1 ; write feature`
205			`CF_SECCNT EQU CF_BASE+2`
206			`CF_SECNUM EQU CF_BASE+3`
207			`CF_CYLLO EQU CF_BASE+4`
208			`CF_CYLHI EQU CF_BASE+5`
209			`CF_HEAD EQU CF_BASE+6`
210			`CF_STATUS EQU CF_BASE+7 ; read status`
211			`CF_COMAND EQU CF_BASE+7 ; write command`
212			`*`
213			`* Command Equates`
214			`*`
215			`CMDREAD EQU $20 ; Read Single sector`
216			`CMDWRITE EQU $30 ; Write Single sector`
217			`CMDFEATURE EQU $EF`
218			`FEAT8BIT EQU $01 ; enable 8 bit transfers`
219			`HEADLBA EQU $E0`
220			`*`
221			`* Status bit equates`
222			`*`
223			`BUSY EQU $80`
224			`DRDY EQU $40`
225			`DRQ EQU $08`
226			`ERR EQU $01`
227			`*`
228			`ENDIF CF8OPT`
229			`*`
230			`IFD IDEOPT`
231			`*`
232			`***************************************************`
233			`* COMPACT FLASH EQUATES 16 BIT TRANSFER (XESS) *`
234			`***************************************************`
235			`*`
236			`** COMPACT FLASH SITS AT PORT 4`
237			`*`
238			`CF_BASE EQU MONIO+$0100`
239			`CF_DATA EQU CF_BASE+0`
240			`CF_ERROR EQU CF_BASE+2 ; read error`
241			`CF_FEATURE EQU CF_BASE+2 ; write feature`
242			`CF_SECCNT EQU CF_BASE+4`
243			`CF_SECNUM EQU CF_BASE+6`
244			`CF_CYLLO EQU CF_BASE+8`
245			`CF_CYLHI EQU CF_BASE+10`
246			`CF_HEAD EQU CF_BASE+12`
247			`CF_STATUS EQU CF_BASE+14 ; read status`
248			`CF_COMAND EQU CF_BASE+14 ; write command`
249			`CF_AUX EQU CF_BASE+30`
250			`*`
251			`* Command Equates`
252			`*`
253			`CMDREAD EQU $20 ; Read Single sector`
254			`CMDWRITE EQU $30 ; Write Single sector`
255			`AUXRESET EQU $06 ; Reset IDE`
256			`AUXRSTREL EQU $02 ; Reset release IRQ masked`
257			`HEADLBA EQU $E0`
258			`*`
259			`* Status bit equates`
260			`*`
261			`BUSY EQU $80`
262			`DRDY EQU $40`
263			`DRQ EQU $08`
264			`ERR EQU $01`
265			`*`
266			`ENDIF CF8OPT`
267			`*`
268			`IFD RTCOPT`
269			`*`
270			`**************************************************`
271			`* MM58167A REAL TIME CLOCK MEMORY MAP:`
272			`**************************************************`
273			`*`
274			`** REAL TIME CLOCK SITS ON PORT 4 AND PORT 5`
275			`*`
276			`CLOCK EQU MONIO+$40 CLOCK BASE ADDRESS AND REGISTERS`
277			`*`
278			`* COUNTER AND COMPARITOR REGISTERS:`
279			`*`
280			`* Both the Clock Counter and Clock Comparitor`
281			`* consist of 8 registers for holding the time.`
282			`* The register offsets from the Counter and`
283			`* Comparitor registers are listed above.`
284			`*`
285			`COUNTR EQU CLOCK+0`
286			`CMPRAM EQU CLOCK+8 COMPARITOR REGISTERS`
287			`*`
288			`* CLOCK REGISTER OFFSETS:`
289			`* These register offsets are used for the CLOCK`
290			`* and comparitor ram CMPRAM.`
291			`*`
292			`S10000 EQU 0 TEN THOUNSANDTHS OF SECONDS`
293			`S100 EQU 1 HUNDRETHS AND TENTHS OF SECONDS`
294			`SECOND EQU 2`
295			`MINUIT EQU 3`
296			`HOUR EQU 4`
297			`WKDAY EQU 5`
298			`MTHDAY EQU 6`
299			`MONTH EQU 7`
300			`*`
301			`* INTERRUPT OUTPUT REGISTERS:`
302			`*`
303			`* An interrupt output may be generated at the`
304			`* following rates by setting the appropriate bit`
305			`* in the Interrupt Control Register (CINTCR).`
306			`* The Interrupt Status Register (CINTSR) must be`
307			`* read to clear the interrupt and will return`
308			`* the source of the interrupt.`
309			`*`
310			`* 1/Month Bit 7`
311			`* 1/Week Bit 6`
312			`* 1/Day Bit 5`
313			`* 1/Hour Bit 4`
314			`* 1/Minuite Bit 3`
315			`* 1/Second Bit 2`
316			`* 10/Second Bit 1`
317			`* Comparitor Bit 0`
318			`*`
319			`CINTSR EQU CLOCK+16 INTERRUPT STATUS REGISTER`
320			`CINTCR EQU CLOCK+17 INTERRUPT CONTROL REGISTER`
321			`*`
322			`* COUNTER AND RAM RESETS; GO COMMAND.`
323			`*`
324			`* The counter and comparitor may be reset`
325			`* by writing $FF into CTRRES and CMPRES`
326			`* respectivly.`
327			`* A write to the Go command register (GOCMND)`
328			`* will reset the 1/1000ths, 1/100ths and 1/10ths`
329			`* of a second counter.`
330			`*`
331			`CTRRES EQU CLOCK+18 COUNTER RESET`
332			`CMPRES EQU CLOCK+19 COMPARITOR RAM RESET`
333			`GOCMND EQU CLOCK+21 GO COMMAND`
334			`*`
335			`* CLOCK STATUS REGISTER.`
336			`*`
337			`* The counter takes 61 usec. to rollover for`
338			`* every 1KHz clock pulse. If the Status bit is`
339			`* set after reading the counter, the counter`
340			`* should be re-read to ensure the time is correct.`
341			`*`
342			`CLKSTA EQU CLOCK+20 STATUS BIT`
343			`SBYINT EQU CLOCK+22 STANDBY INTERRUPT`
344			`TSTMOD EQU CLOCK+31 TEST MODE REGISTER`
345			`ENDIF RTCOPT`
346			`*`
347			`IFD TRAOPT`
348			`*`
349			`**************************************************`
350			`* PIA INTERRUPT TIMER`
351			`**************************************************`
352			`*`
353			`** PIA INTERRUPT TIMER SITS ON PORT 7`
354			`*`
355			`** PIA TIMER FOR SINGLE STEP / TRACE`
356			`*`
357			`* TADATA = Output = Timer preset register`
358			`* TACTRL - CA1 = input = rising edge = NMI`
359			`* - CA2 = Output = Timer Reset (Active High)`
360			`* TBDATA = Input = Timer read back register`
361			`* TBCTRL - CB1 = input = rising edge = FIRQ`
362			`* - CB2 = output = strobe low on write to TBDATA = Timer Preset`
363			`*`
364			`* CRA0 = 0 CA1 IRQ DISAB, CRA0 = 1 CA1 IRQ ENAB`
365			`* CRA1 = 1 CA1 Rising edge IRQ`
366			`* CRA2 = 0 TADATA = Data Direction, CRA2 = 1 TADATA = I/O Register`
367			`* CRA3 = 0 CA2 = 0 output, CRA3 = 1 CA2 = 1`
368			`* CRA4 = 1 ] CA2 = Set/Reset output`
369			`* CRA5 = 1 ]`
370			`* CRA6 = X CA2 Input Interrupt Flag`
371			`* CRA7 = X CA1 Interrupt Flag`
372			`*`
373			`* CRB0 = 0 CB1 IRQ DISAB, CRB0 = 1 CA1 IRQ ENAB`
374			`* CRB1 = 1 CB1 Rising edge IRQ`
375			`* CRB2 = 0 TBDATA = Data Direction, CRB2 = 1 TBDATA = I/O Register`
376			`* CRB3 = 0 CB2 = 0 output, CRB3 = 1 CB2 = 1`
377			`* CRB4 = 1 ] CB2 = Set/Reset output`
378			`* CRB5 = 1 ]`
379			`* CRB6 = X CB2 Input Interrupt Flag`
380			`* CRB7 = X CB1 Interrupt Flag`
381			`*`
382			`* DDRA = 0 TADATA = Input, DDRA = 1 TADATA = Output`
383			`* DDRB = 0 TBDATA = Input, DDRB = 1 TBDATA = Output`
384			`*`
385			`TADATA EQU MONIO+$70 Timer preset port`
386			`TACTRL EQU MONIO+$71`
387			`TBDATA EQU MONIO+$72 Timer read back port`
388			`TBCTRL EQU MONIO+$73`
389			`*`
390			`TRADEL EQU 13 Number of E cycles for RTI (May need to be fudged)`
391			`*`
392			`ENDIF TRAOPT`
393			`IFD ADSOPT`
394			`*`
395			`***************************************************`
396			`* SERIAL PORT FOR DG640 *`
397			`***************************************************`
398			`*`
399			`** SET UP FOR ACKERMAN DIGITAL ADS6809`
400			`** THE ADS6809 S100 BOAD HAS AN ON BOARD ACIA`
401			`*`
402			`ACIAS EQU MONIO+$400 CONTROL PORT`
403			`*`
404			`ENDIF ADSOPT`
405			`IFD PRTOPT`
406			`*`
407			`***************************************************`
408			`* PRINTER INTERFACE *`
409			`***************************************************`
410			`*`
411			`PADATA EQU MONIO+$404`
412			`PACTRL EQU MONIO+$405`
413			`PBDATA EQU MONIO+$406`
414			`PBCTRL EQU MONIO+$407`
415			`*`
416			`** CB1 ACK. I/P`
417			`** CB2 STB. O/P`
418			`** PB0 - PB7 DATA 1 - 8 O/P`
419			`** PORT A BIT ASSIGNMENT`
420			`*`
421			`PBUSY EQU $80 I/P`
422			`PEMPTY EQU $40 I/P`
423			`SELECT EQU $20 I/P`
424			`PERROR EQU $10 I/P`
425			`PRESET EQU %00000100 O/P PA3 = 0`
426			`AUTOFD EQU %00001000 O/P PA2 = 0`
427			`DIRMSK EQU %00001100`
428			`ENDIF PRTOPT`
429			`IFD DG640OPT`
430			`*`
431			`***************************************************`
432			`* DG640 MEMORY MAPPED DISPLAY DRIVER VARIABLES *`
433			`***************************************************`
434			`*`
435			`** VIDEO DISPLAY DEFINITIONS`
436			`*`
437			`SCREEN EQU MONIO+$0800 START OF SCREEN MEMORY`
438			`LINLEN EQU 64 LENGTH OF A LINE`
439			`NUMLIN EQU 16 NUMBER OF LINES`
440			`SCNLEN EQU $400 LENGTH OF SCREEN`
441			`ENDIF DG640OPT`
442			`*`
443			`IFD DMAFOPT`
444			`*`
445			`***************************************************`
446			`* DMAF2 8" DRIVE *`
447			`***************************************************`
448			`*`
449			`ADDREG EQU $F000 ADDRESS REGISTER`
450			`CNTREG EQU $F002 COUNT REGISTER`
451			`CCREG EQU $F010 CHANNEL CONTROL REGISTER`
452			`PRIREG EQU $F014 DMA PRIORITY REGISTER`
453			`AAAREG EQU $F015 ???`
454			`BBBREG EQU $F016 ???`
455			`COMREG EQU $F020 1791 COMMAND REGISTER`
456			`SECREG EQU $F022 SECTOR REGISTER`
457			`DRVREG EQU $F024 DRIVE SELECT LATCH`
458			`CCCREG EQU $F040 ???`
459			`ENDIF DMAFOPT`
460			`IFD DATOPT`
461			`**************************************************`
462			`* DYNAMIC ADDRESS TRANSLATION REGISTERS *`
463			`**************************************************`
464			`*`
465			`IC11 EQU $FFF0 DAT RAM CHIP`
466			`TSTPAT EQU $55AA TEST PATTERN`
467			`ENDIF DATOPT`
468			`*`
469			`END`

Browse

Tools

Subversion Repositories System09

[/] [System09/] [trunk/] [src/] [sys09bug/] [sys09equ.asm] - Blame information for rev 223