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[/] [System11/] [trunk/] [rtl/] [vhdl/] [tb_ram.vhd] - Blame information for rev 5

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Line No. Rev Author Line
1 4 dilbert57
--===========================================================================--
2
--
3
-- CPU11 Microprocessor Test Bench 4
4
--
5
-- Complete system test
6
--
7
-- John Kent 21st October 2002
8
--
9
--
10
-------------------------------------------------------------------------------
11
library ieee;
12
   use ieee.std_logic_1164.all;
13
   use IEEE.STD_LOGIC_ARITH.ALL;
14
   use IEEE.STD_LOGIC_UNSIGNED.ALL;
15
   use ieee.numeric_std.all;
16
 
17
entity my_ram is
18
        port (
19
         clk       : in  std_logic;
20
    rst       : in  std_logic;
21
    cs        : in  std_logic;
22
    rw        : in  std_logic;
23
    addr      : in  std_logic_vector(5 downto 0);
24
         data_in   : in  std_logic_vector(7 downto 0);
25
         data_out  : out std_logic_vector(7 downto 0));
26
end;
27
 
28
 
29
architecture ram_arch of my_ram is
30
signal ram_reg00 : std_logic_vector(7 downto 0);
31
signal ram_reg01 : std_logic_vector(7 downto 0);
32
signal ram_reg02 : std_logic_vector(7 downto 0);
33
signal ram_reg03 : std_logic_vector(7 downto 0);
34
signal ram_reg04 : std_logic_vector(7 downto 0);
35
signal ram_reg05 : std_logic_vector(7 downto 0);
36
signal ram_reg06 : std_logic_vector(7 downto 0);
37
signal ram_reg07 : std_logic_vector(7 downto 0);
38
signal ram_reg08 : std_logic_vector(7 downto 0);
39
signal ram_reg09 : std_logic_vector(7 downto 0);
40
signal ram_reg010 : std_logic_vector(7 downto 0);
41
signal ram_reg011 : std_logic_vector(7 downto 0);
42
signal ram_reg012 : std_logic_vector(7 downto 0);
43
signal ram_reg013 : std_logic_vector(7 downto 0);
44
signal ram_reg014 : std_logic_vector(7 downto 0);
45
signal ram_reg015 : std_logic_vector(7 downto 0);
46
signal ram_reg10 : std_logic_vector(7 downto 0);
47
signal ram_reg11 : std_logic_vector(7 downto 0);
48
signal ram_reg12 : std_logic_vector(7 downto 0);
49
signal ram_reg13 : std_logic_vector(7 downto 0);
50
signal ram_reg14 : std_logic_vector(7 downto 0);
51
signal ram_reg15 : std_logic_vector(7 downto 0);
52
signal ram_reg16 : std_logic_vector(7 downto 0);
53
signal ram_reg17 : std_logic_vector(7 downto 0);
54
signal ram_reg18 : std_logic_vector(7 downto 0);
55
signal ram_reg19 : std_logic_vector(7 downto 0);
56
signal ram_reg110 : std_logic_vector(7 downto 0);
57
signal ram_reg111 : std_logic_vector(7 downto 0);
58
signal ram_reg112 : std_logic_vector(7 downto 0);
59
signal ram_reg113 : std_logic_vector(7 downto 0);
60
signal ram_reg114 : std_logic_vector(7 downto 0);
61
signal ram_reg115 : std_logic_vector(7 downto 0);
62
signal ram_reg20 : std_logic_vector(7 downto 0);
63
signal ram_reg21 : std_logic_vector(7 downto 0);
64
signal ram_reg22 : std_logic_vector(7 downto 0);
65
signal ram_reg23 : std_logic_vector(7 downto 0);
66
signal ram_reg24 : std_logic_vector(7 downto 0);
67
signal ram_reg25 : std_logic_vector(7 downto 0);
68
signal ram_reg26 : std_logic_vector(7 downto 0);
69
signal ram_reg27 : std_logic_vector(7 downto 0);
70
signal ram_reg28 : std_logic_vector(7 downto 0);
71
signal ram_reg29 : std_logic_vector(7 downto 0);
72
signal ram_reg210 : std_logic_vector(7 downto 0);
73
signal ram_reg211 : std_logic_vector(7 downto 0);
74
signal ram_reg212 : std_logic_vector(7 downto 0);
75
signal ram_reg213 : std_logic_vector(7 downto 0);
76
signal ram_reg214 : std_logic_vector(7 downto 0);
77
signal ram_reg215 : std_logic_vector(7 downto 0);
78
signal ram_reg30 : std_logic_vector(7 downto 0);
79
signal ram_reg31 : std_logic_vector(7 downto 0);
80
signal ram_reg32 : std_logic_vector(7 downto 0);
81
signal ram_reg33 : std_logic_vector(7 downto 0);
82
signal ram_reg34 : std_logic_vector(7 downto 0);
83
signal ram_reg35 : std_logic_vector(7 downto 0);
84
signal ram_reg36 : std_logic_vector(7 downto 0);
85
signal ram_reg37 : std_logic_vector(7 downto 0);
86
signal ram_reg38 : std_logic_vector(7 downto 0);
87
signal ram_reg39 : std_logic_vector(7 downto 0);
88
signal ram_reg310 : std_logic_vector(7 downto 0);
89
signal ram_reg311 : std_logic_vector(7 downto 0);
90
signal ram_reg312 : std_logic_vector(7 downto 0);
91
signal ram_reg313 : std_logic_vector(7 downto 0);
92
signal ram_reg314 : std_logic_vector(7 downto 0);
93
signal ram_reg315 : std_logic_vector(7 downto 0);
94
 
95
begin
96
 
97
 
98
---------------------------------
99
--
100
-- Write DAT RAM
101
--
102
---------------------------------
103
 
104
ram_write : process( clk, rst, addr, cs, rw, data_in )
105
begin
106
  if rst = '1' then
107
      ram_reg00 <= "00000000";
108
      ram_reg01 <= "00000000";
109
      ram_reg02 <= "00000000";
110
      ram_reg03 <= "00000000";
111
      ram_reg04 <= "00000000";
112
      ram_reg05 <= "00000000";
113
      ram_reg06 <= "00000000";
114
      ram_reg07 <= "00000000";
115
      ram_reg08 <= "00000000";
116
      ram_reg09 <= "00000000";
117
      ram_reg010 <= "00000000";
118
      ram_reg011 <= "00000000";
119
      ram_reg012 <= "00000000";
120
      ram_reg013 <= "00000000";
121
      ram_reg014 <= "00000000";
122
      ram_reg015 <= "00000000";
123
      ram_reg10 <= "00000000";
124
      ram_reg11 <= "00000000";
125
      ram_reg12 <= "00000000";
126
      ram_reg13 <= "00000000";
127
      ram_reg14 <= "00000000";
128
      ram_reg15 <= "00000000";
129
      ram_reg16 <= "00000000";
130
      ram_reg17 <= "00000000";
131
      ram_reg18 <= "00000000";
132
      ram_reg19 <= "00000000";
133
      ram_reg110 <= "00000000";
134
      ram_reg111 <= "00000000";
135
      ram_reg112 <= "00000000";
136
      ram_reg113 <= "00000000";
137
      ram_reg114 <= "00000000";
138
      ram_reg115 <= "00000000";
139
      ram_reg20 <= "00000000";
140
      ram_reg21 <= "00000000";
141
      ram_reg22 <= "00000000";
142
      ram_reg23 <= "00000000";
143
      ram_reg24 <= "00000000";
144
      ram_reg25 <= "00000000";
145
      ram_reg26 <= "00000000";
146
      ram_reg27 <= "00000000";
147
      ram_reg28 <= "00000000";
148
      ram_reg29 <= "00000000";
149
      ram_reg210 <= "00000000";
150
      ram_reg211 <= "00000000";
151
      ram_reg212 <= "00000000";
152
      ram_reg213 <= "00000000";
153
      ram_reg214 <= "00000000";
154
      ram_reg215 <= "00000000";
155
      ram_reg30 <= "00000000";
156
      ram_reg31 <= "00000000";
157
      ram_reg32 <= "00000000";
158
      ram_reg33 <= "00000000";
159
      ram_reg34 <= "00000000";
160
      ram_reg35 <= "00000000";
161
      ram_reg36 <= "00000000";
162
      ram_reg37 <= "00000000";
163
      ram_reg38 <= "00000000";
164
      ram_reg39 <= "00000000";
165
      ram_reg310 <= "00000000";
166
      ram_reg311 <= "00000000";
167
      ram_reg312 <= "00000000";
168
      ram_reg313 <= "00000000";
169
      ram_reg314 <= "00000000";
170
      ram_reg315 <= "00000000";
171
  elsif clk'event and clk = '0' then
172
           if cs = '1' and rw = '0' then
173
        case addr is
174
             when "000000" =>
175
                    ram_reg00(7 downto 0) <= data_in(7 downto 0);
176
             when "000001" =>
177
                    ram_reg01(7 downto 0) <= data_in(7 downto 0);
178
             when "000010" =>
179
                    ram_reg02(7 downto 0) <= data_in(7 downto 0);
180
             when "000011" =>
181
                    ram_reg03(7 downto 0) <= data_in(7 downto 0);
182
             when "000100" =>
183
                    ram_reg04(7 downto 0) <= data_in(7 downto 0);
184
             when "000101" =>
185
                    ram_reg05(7 downto 0) <= data_in(7 downto 0);
186
             when "000110" =>
187
                    ram_reg06(7 downto 0) <= data_in(7 downto 0);
188
             when "000111" =>
189
                    ram_reg07(7 downto 0) <= data_in(7 downto 0);
190
             when "001000" =>
191
                    ram_reg08(7 downto 0) <= data_in(7 downto 0);
192
             when "001001" =>
193
                    ram_reg09(7 downto 0) <= data_in(7 downto 0);
194
             when "001010" =>
195
                    ram_reg010(7 downto 0) <= data_in(7 downto 0);
196
             when "001011" =>
197
                    ram_reg011(7 downto 0) <= data_in(7 downto 0);
198
             when "001100" =>
199
                    ram_reg012(7 downto 0) <= data_in(7 downto 0);
200
             when "001101" =>
201
                    ram_reg013(7 downto 0) <= data_in(7 downto 0);
202
             when "001110" =>
203
                    ram_reg014(7 downto 0) <= data_in(7 downto 0);
204
             when "001111" =>
205
                    ram_reg015(7 downto 0) <= data_in(7 downto 0);
206
             when "010000" =>
207
                    ram_reg10(7 downto 0) <= data_in(7 downto 0);
208
             when "010001" =>
209
                    ram_reg11(7 downto 0) <= data_in(7 downto 0);
210
             when "010010" =>
211
                    ram_reg12(7 downto 0) <= data_in(7 downto 0);
212
             when "010011" =>
213
                    ram_reg13(7 downto 0) <= data_in(7 downto 0);
214
             when "010100" =>
215
                    ram_reg14(7 downto 0) <= data_in(7 downto 0);
216
             when "010101" =>
217
                    ram_reg15(7 downto 0) <= data_in(7 downto 0);
218
             when "010110" =>
219
                    ram_reg16(7 downto 0) <= data_in(7 downto 0);
220
             when "010111" =>
221
                    ram_reg17(7 downto 0) <= data_in(7 downto 0);
222
             when "011000" =>
223
                    ram_reg18(7 downto 0) <= data_in(7 downto 0);
224
             when "011001" =>
225
                    ram_reg19(7 downto 0) <= data_in(7 downto 0);
226
             when "011010" =>
227
                    ram_reg110(7 downto 0) <= data_in(7 downto 0);
228
             when "011011" =>
229
                    ram_reg111(7 downto 0) <= data_in(7 downto 0);
230
             when "011100" =>
231
                    ram_reg112(7 downto 0) <= data_in(7 downto 0);
232
             when "011101" =>
233
                    ram_reg113(7 downto 0) <= data_in(7 downto 0);
234
             when "011110" =>
235
                    ram_reg114(7 downto 0) <= data_in(7 downto 0);
236
             when "011111" =>
237
                    ram_reg115(7 downto 0) <= data_in(7 downto 0);
238
             when "100000" =>
239
                    ram_reg20(7 downto 0) <= data_in(7 downto 0);
240
             when "100001" =>
241
                    ram_reg21(7 downto 0) <= data_in(7 downto 0);
242
             when "100010" =>
243
                    ram_reg22(7 downto 0) <= data_in(7 downto 0);
244
             when "100011" =>
245
                    ram_reg23(7 downto 0) <= data_in(7 downto 0);
246
             when "100100" =>
247
                    ram_reg24(7 downto 0) <= data_in(7 downto 0);
248
             when "100101" =>
249
                    ram_reg25(7 downto 0) <= data_in(7 downto 0);
250
             when "100110" =>
251
                    ram_reg26(7 downto 0) <= data_in(7 downto 0);
252
             when "100111" =>
253
                    ram_reg27(7 downto 0) <= data_in(7 downto 0);
254
             when "101000" =>
255
                    ram_reg28(7 downto 0) <= data_in(7 downto 0);
256
             when "101001" =>
257
                    ram_reg29(7 downto 0) <= data_in(7 downto 0);
258
             when "101010" =>
259
                    ram_reg210(7 downto 0) <= data_in(7 downto 0);
260
             when "101011" =>
261
                    ram_reg211(7 downto 0) <= data_in(7 downto 0);
262
             when "101100" =>
263
                    ram_reg212(7 downto 0) <= data_in(7 downto 0);
264
             when "101101" =>
265
                    ram_reg213(7 downto 0) <= data_in(7 downto 0);
266
             when "101110" =>
267
                    ram_reg214(7 downto 0) <= data_in(7 downto 0);
268
             when "101111" =>
269
                    ram_reg215(7 downto 0) <= data_in(7 downto 0);
270
             when "110000" =>
271
                    ram_reg30(7 downto 0) <= data_in(7 downto 0);
272
             when "110001" =>
273
                    ram_reg31(7 downto 0) <= data_in(7 downto 0);
274
             when "110010" =>
275
                    ram_reg32(7 downto 0) <= data_in(7 downto 0);
276
             when "110011" =>
277
                    ram_reg33(7 downto 0) <= data_in(7 downto 0);
278
             when "110100" =>
279
                    ram_reg34(7 downto 0) <= data_in(7 downto 0);
280
             when "110101" =>
281
                    ram_reg35(7 downto 0) <= data_in(7 downto 0);
282
             when "110110" =>
283
                    ram_reg36(7 downto 0) <= data_in(7 downto 0);
284
             when "110111" =>
285
                    ram_reg37(7 downto 0) <= data_in(7 downto 0);
286
             when "111000" =>
287
                    ram_reg38(7 downto 0) <= data_in(7 downto 0);
288
             when "111001" =>
289
                    ram_reg39(7 downto 0) <= data_in(7 downto 0);
290
             when "111010" =>
291
                    ram_reg310(7 downto 0) <= data_in(7 downto 0);
292
             when "111011" =>
293
                    ram_reg311(7 downto 0) <= data_in(7 downto 0);
294
             when "111100" =>
295
                    ram_reg312(7 downto 0) <= data_in(7 downto 0);
296
             when "111101" =>
297
                    ram_reg313(7 downto 0) <= data_in(7 downto 0);
298
             when "111110" =>
299
                    ram_reg314(7 downto 0) <= data_in(7 downto 0);
300
             when "111111" =>
301
                    ram_reg315(7 downto 0) <= data_in(7 downto 0);
302
        when others =>
303
                    null;
304
                  end case;
305
           end if;
306
  end if;
307
end process;
308
 
309
dat_read : process(  addr,
310
                     ram_reg00, ram_reg01, ram_reg02, ram_reg03,
311
                     ram_reg04, ram_reg05, ram_reg06, ram_reg07,
312
                     ram_reg08, ram_reg09, ram_reg010, ram_reg011,
313
                     ram_reg012, ram_reg013, ram_reg014, ram_reg015,
314
                     ram_reg10, ram_reg11, ram_reg12, ram_reg13,
315
                     ram_reg14, ram_reg15, ram_reg16, ram_reg17,
316
                     ram_reg18, ram_reg19, ram_reg110, ram_reg111,
317
                     ram_reg112, ram_reg113, ram_reg114, ram_reg115,
318
                     ram_reg20, ram_reg21, ram_reg22, ram_reg23,
319
                     ram_reg24, ram_reg25, ram_reg26, ram_reg27,
320
                     ram_reg28, ram_reg29, ram_reg210, ram_reg211,
321
                     ram_reg212, ram_reg213, ram_reg214, ram_reg215,
322
                     ram_reg30, ram_reg31, ram_reg32, ram_reg33,
323
                     ram_reg34, ram_reg35, ram_reg36, ram_reg37,
324
                     ram_reg38, ram_reg39, ram_reg310, ram_reg311,
325
                     ram_reg312, ram_reg313, ram_reg314, ram_reg315
326
                                                         )
327
begin
328
      case addr is
329
             when "000000" =>
330
                    data_out <= ram_reg00;
331
             when "000001" =>
332
                    data_out <= ram_reg01;
333
             when "000010" =>
334
                    data_out <= ram_reg02;
335
             when "000011" =>
336
                    data_out <= ram_reg03;
337
             when "000100" =>
338
                    data_out <= ram_reg04;
339
             when "000101" =>
340
                    data_out <= ram_reg05;
341
             when "000110" =>
342
                    data_out <= ram_reg06;
343
             when "000111" =>
344
                    data_out <= ram_reg07;
345
             when "001000" =>
346
                    data_out <= ram_reg08;
347
             when "001001" =>
348
                    data_out <= ram_reg09;
349
             when "001010" =>
350
                    data_out <= ram_reg010;
351
             when "001011" =>
352
                    data_out <= ram_reg011;
353
             when "001100" =>
354
                    data_out <= ram_reg012;
355
             when "001101" =>
356
                    data_out <= ram_reg013;
357
             when "001110" =>
358
                    data_out <= ram_reg014;
359
             when "001111" =>
360
                    data_out <= ram_reg015;
361
             when "010000" =>
362
                    data_out <= ram_reg10;
363
             when "010001" =>
364
                    data_out <= ram_reg11;
365
             when "010010" =>
366
                    data_out <= ram_reg12;
367
             when "010011" =>
368
                    data_out <= ram_reg13;
369
             when "010100" =>
370
                    data_out <= ram_reg14;
371
             when "010101" =>
372
                    data_out <= ram_reg15;
373
             when "010110" =>
374
                    data_out <= ram_reg16;
375
             when "010111" =>
376
                    data_out <= ram_reg17;
377
             when "011000" =>
378
                    data_out <= ram_reg18;
379
             when "011001" =>
380
                    data_out <= ram_reg19;
381
             when "011010" =>
382
                    data_out <= ram_reg110;
383
             when "011011" =>
384
                    data_out <= ram_reg111;
385
             when "011100" =>
386
                    data_out <= ram_reg112;
387
             when "011101" =>
388
                    data_out <= ram_reg113;
389
             when "011110" =>
390
                    data_out <= ram_reg114;
391
             when "011111" =>
392
                    data_out <= ram_reg115;
393
             when "100000" =>
394
                    data_out <= ram_reg20;
395
             when "100001" =>
396
                    data_out <= ram_reg21;
397
             when "100010" =>
398
                    data_out <= ram_reg22;
399
             when "100011" =>
400
                    data_out <= ram_reg23;
401
             when "100100" =>
402
                    data_out <= ram_reg24;
403
             when "100101" =>
404
                    data_out <= ram_reg25;
405
             when "100110" =>
406
                    data_out <= ram_reg26;
407
             when "100111" =>
408
                    data_out <= ram_reg27;
409
             when "101000" =>
410
                    data_out <= ram_reg28;
411
             when "101001" =>
412
                    data_out <= ram_reg29;
413
             when "101010" =>
414
                    data_out <= ram_reg210;
415
             when "101011" =>
416
                    data_out <= ram_reg211;
417
             when "101100" =>
418
                    data_out <= ram_reg212;
419
             when "101101" =>
420
                    data_out <= ram_reg213;
421
             when "101110" =>
422
                    data_out <= ram_reg214;
423
             when "101111" =>
424
                    data_out <= ram_reg215;
425
             when "110000" =>
426
                    data_out <= ram_reg30;
427
             when "110001" =>
428
                    data_out <= ram_reg31;
429
             when "110010" =>
430
                    data_out <= ram_reg32;
431
             when "110011" =>
432
                    data_out <= ram_reg33;
433
             when "110100" =>
434
                    data_out <= ram_reg34;
435
             when "110101" =>
436
                    data_out <= ram_reg35;
437
             when "110110" =>
438
                    data_out <= ram_reg36;
439
             when "110111" =>
440
                    data_out <= ram_reg37;
441
             when "111000" =>
442
                    data_out <= ram_reg38;
443
             when "111001" =>
444
                    data_out <= ram_reg39;
445
             when "111010" =>
446
                    data_out <= ram_reg310;
447
             when "111011" =>
448
                    data_out <= ram_reg311;
449
             when "111100" =>
450
                    data_out <= ram_reg312;
451
             when "111101" =>
452
                    data_out <= ram_reg313;
453
             when "111110" =>
454
                    data_out <= ram_reg314;
455
             when "111111" =>
456
                    data_out <= ram_reg315;
457
        when others =>
458
                    null;
459
                end case;
460
end process;
461
 
462
end;
463
 

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