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[/] [System68/] [tags/] [arelease/] [vhdl/] [system68.ucf] - Blame information for rev 5

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Line No. Rev Author Line
1 4 dilbert57
#### UCF file created by Project Navigator
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# Connector J9
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NET "ram_addr<0>" LOC = "p108";
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NET "ram_addr<1>" LOC = "p109";
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NET "ram_addr<2>" LOC = "p110";
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NET "ram_addr<3>" LOC = "p111";
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NET "ram_addr<4>" LOC = "p112";
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NET "ram_addr<5>" LOC = "p113";
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NET "ram_addr<6>" LOC = "p114";
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NET "ram_addr<7>" LOC = "p115";
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NET "ram_csn" LOC = "p119";
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NET "ram_addr<8>" LOC = "p120";
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NET "ram_addr<9>" LOC = "p121";
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NET "ram_addr<10>" LOC = "p122";
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NET "ram_addr<11>" LOC = "p123";
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NET "ram_addr<12>" LOC = "p125";
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NET "ram_addr<13>" LOC = "p126";
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NET "ram_addr<14>" LOC = "p127";
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NET "ram_addr<15>" LOC = "p129";
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NET "ram_addr<16>" LOC = "p132";
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# Connector J6
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NET "ram_data<0>" LOC = "p133";
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NET "ram_data<1>" LOC = "p134";
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NET "ram_data<2>" LOC = "p135";
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NET "ram_data<3>" LOC = "p136";
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NET "ram_data<4>" LOC = "p138";
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NET "ram_data<5>" LOC = "p139";
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NET "ram_data<6>" LOC = "p140";
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NET "ram_data<7>" LOC = "p141";
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NET "ram_data<8>" LOC = "p142";
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NET "ram_data<9>" LOC = "p146";
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NET "ram_data<10>" LOC = "p147";
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NET "ram_data<11>" LOC = "p148";
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NET "ram_data<12>" LOC = "p149";
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NET "ram_data<13>" LOC = "p150";
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NET "ram_data<14>" LOC = "p151";
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NET "ram_data<15>" LOC = "p152";
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NET "ram_wrun" LOC = "p153";
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NET "ram_wrln" LOC = "p154";
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# Connector J4
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NET "porta<0>" LOC = "p160";
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NET "porta<1>" LOC = "p161";
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NET "porta<2>" LOC = "p162";
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NET "porta<3>" LOC = "p163";
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NET "porta<4>" LOC = "p164";
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NET "porta<5>" LOC = "p165";
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NET "porta<6>" LOC = "p166";
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NET "porta<7>" LOC = "p167";
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NET "portb<0>" LOC = "p168";
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NET "portb<1>" LOC = "p172";
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NET "portb<2>" LOC = "p173";
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NET "portb<3>" LOC = "p174";
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NET "portb<4>" LOC = "p175";
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NET "portb<5>" LOC = "p176";
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NET "portb<6>" LOC = "p178";
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NET "portb<7>" LOC = "p179";
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#NET "timer0_out" LOC = "p180";
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#NET "timer0_in" LOC = "p182";
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NET "timer_out" LOC = "p180";
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# Connector J3
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NET "portc<0>" LOC = "p181";
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NET "portc<1>" LOC = "p187";
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NET "portc<2>" LOC = "p188";
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NET "portc<3>" LOC = "p189";
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NET "portc<4>" LOC = "p191";
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NET "portc<5>" LOC = "p192";
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NET "portc<6>" LOC = "p193";
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NET "portc<7>" LOC = "p194";
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NET "portd<0>" LOC = "p195";
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NET "portd<1>" LOC = "p199";
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NET "portd<2>" LOC = "p200";
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NET "portd<3>" LOC = "p201";
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NET "portd<4>" LOC = "p202";
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NET "portd<5>" LOC = "p203";
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NET "portd<6>" LOC = "p204";
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NET "portd<7>" LOC = "p205";
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#NET "timer1_out" LOC = "p206";
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#NET "timer1_in" LOC = "p185";
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# Connector J10
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NET "sysclk" LOC = "p77"; #pin 2
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NET "led" LOC = "p49"; #pin 3
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NET "uart_csn" LOC = "p57"; #pin 4
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NET "test_rw" LOC = "p58"; #pin 5
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NET "test_d0" LOC = "p59"; #pin 6
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NET "test_d1" LOC = "p60"; #pin 7
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NET "reset_n" LOC = "p61"; #pin 8
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NET "test_cc<0>" LOC = "p67"; #pin 11
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NET "test_cc<1>" LOC = "p68"; #pin 12
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NET "test_cc<2>" LOC = "p69"; #pin 13
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NET "test_cc<3>" LOC = "p70"; #pin 14
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NET "test_cc<4>" LOC = "p71"; #pin 15
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NET "test_cc<5>" LOC = "p73"; #pin 16
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NET "test_cc<6>" LOC = "p74"; #pin 17
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NET "test_cc<7>" LOC = "p75"; #pin 18
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# Connector J11
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NET "test_alu<0>" LOC = "p82"; #pin 3
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NET "test_alu<1>" LOC = "p83"; #pin 4
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NET "test_alu<2>" LOC = "p84"; #pin 5
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NET "test_alu<3>" LOC = "p86"; #pin 6
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NET "test_alu<4>" LOC = "p87"; #pin 7
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NET "test_alu<5>" LOC = "p88"; #pin 8
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NET "test_alu<6>" LOC = "p89"; #pin 9
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NET "test_alu<7>" LOC = "p90"; #pin 10
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NET "test_alu<8>" LOC = "p94"; #pin 11
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NET "test_alu<9>" LOC = "p95"; #pin 12
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NET "test_alu<10>" LOC = "p96"; #pin 13
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NET "test_alu<11>" LOC = "p97"; #pin 14
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NET "test_alu<12>" LOC = "p98"; #pin 15
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NET "test_alu<13>" LOC = "p99"; #pin 16
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NET "test_alu<14>" LOC = "p100"; #pin 17
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NET "test_alu<15>" LOC = "p101"; #pin 18
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# Connector J8
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#NET "aux_clock" LOC = "p24"; #pin 2
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NET "buzzer" LOC = "p27"; #pin 3
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#NET "mouse_clock" LOC = "p29"; #pin 4
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#NET "mouse_data" LOC = "p30"; #pin 5
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NET "cts_n" LOC = "p31"; #pin 6
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NET "rts_n" LOC = "p33"; #pin 7
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NET "txbit" LOC = "p34"; #pin 8
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NET "rxbit" LOC = "p35"; #pin 9
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#NET "kb_clock" LOC = "p36"; #pin 10
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#NET "kb_data" LOC = "p37"; #pin 11
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NET "v_drive" LOC = "p41"; #pin 12
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NET "h_drive" LOC = "p42"; #pin 13
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NET "blue_lo" LOC = "p43";
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NET "blue_hi" LOC = "p44";
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NET "green_lo" LOC = "p45";
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NET "green_hi" LOC = "p46";
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NET "red_lo" LOC = "p47";
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NET "red_hi" LOC = "p48";
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INST "ram_addr<0>" TNM = "ram_addr";
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INST "ram_addr<1>" TNM = "ram_addr";
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INST "ram_addr<2>" TNM = "ram_addr";
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INST "ram_addr<3>" TNM = "ram_addr";
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INST "ram_addr<4>" TNM = "ram_addr";
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INST "ram_addr<5>" TNM = "ram_addr";
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INST "ram_addr<6>" TNM = "ram_addr";
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INST "ram_addr<7>" TNM = "ram_addr";
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INST "ram_addr<8>" TNM = "ram_addr";
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INST "ram_addr<9>" TNM = "ram_addr";
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INST "ram_addr<10>" TNM = "ram_addr";
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INST "ram_addr<11>" TNM = "ram_addr";
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INST "ram_addr<12>" TNM = "ram_addr";
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INST "ram_addr<13>" TNM = "ram_addr";
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INST "ram_addr<14>" TNM = "ram_addr";
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INST "ram_addr<15>" TNM = "ram_addr";
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INST "ram_addr<16>" TNM = "ram_addr";
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INST "ram_data<0>" TNM = "ram_data";
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INST "ram_data<1>" TNM = "ram_data";
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INST "ram_data<2>" TNM = "ram_data";
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INST "ram_data<3>" TNM = "ram_data";
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INST "ram_data<4>" TNM = "ram_data";
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INST "ram_data<5>" TNM = "ram_data";
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INST "ram_data<6>" TNM = "ram_data";
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INST "ram_data<7>" TNM = "ram_data";
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INST "ram_data<8>" TNM = "ram_data";
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INST "ram_data<9>" TNM = "ram_data";
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INST "ram_data<10>" TNM = "ram_data";
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INST "ram_data<11>" TNM = "ram_data";
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INST "ram_data<12>" TNM = "ram_data";
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INST "ram_data<13>" TNM = "ram_data";
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INST "ram_data<14>" TNM = "ram_data";
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INST "ram_data<15>" TNM = "ram_data";
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INST "ram_wrln" TNM = "ram_wr";
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INST "ram_wrun" TNM = "ram_wr";
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INST "ram_csn" TNM = "ram_cs";
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INST "test_alu<0>" TNM = "test_alu";
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INST "test_alu<1>" TNM = "test_alu";
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INST "test_alu<2>" TNM = "test_alu";
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INST "test_alu<3>" TNM = "test_alu";
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INST "test_alu<4>" TNM = "test_alu";
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INST "test_alu<5>" TNM = "test_alu";
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INST "test_alu<6>" TNM = "test_alu";
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INST "test_alu<7>" TNM = "test_alu";
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INST "test_alu<8>" TNM = "test_alu";
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INST "test_alu<9>" TNM = "test_alu";
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INST "test_alu<10>" TNM = "test_alu";
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INST "test_alu<11>" TNM = "test_alu";
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INST "test_alu<12>" TNM = "test_alu";
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INST "test_alu<13>" TNM = "test_alu";
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INST "test_alu<14>" TNM = "test_alu";
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INST "test_alu<15>" TNM = "test_alu";
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INST "test_cc<0>" TNM = "test_cc";
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INST "test_cc<1>" TNM = "test_cc";
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INST "test_cc<2>" TNM = "test_cc";
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INST "test_cc<3>" TNM = "test_cc";
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INST "test_cc<4>" TNM = "test_cc";
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INST "test_cc<5>" TNM = "test_cc";
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INST "test_cc<6>" TNM = "test_cc";
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INST "test_cc<7>" TNM = "test_cc";
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TIMEGRP "ram_cs" OFFSET = OUT 35 ns AFTER "sysclk";
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TIMEGRP "ram_wr" OFFSET = OUT 35 ns AFTER "sysclk";
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TIMEGRP "ram_addr" OFFSET = OUT 35 ns AFTER "sysclk";
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TIMEGRP "ram_data" OFFSET = OUT 35 ns AFTER "sysclk";
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TIMEGRP "ram_data" OFFSET = IN 15 ns BEFORE "sysclk";
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TIMEGRP "test_alu" OFFSET = OUT 90 ns AFTER "sysclk";
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TIMEGRP "test_cc" OFFSET = OUT 90 ns AFTER "sysclk";
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NET "sysclk" TNM_NET = "sysclk";
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TIMESPEC "TS_sysclk" = PERIOD "sysclk" 100 ns HIGH 50 %;
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NET "ram_addr<0>" FAST;
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NET "ram_addr<1>" FAST;
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NET "ram_addr<2>" FAST;
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NET "ram_addr<3>" FAST;
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NET "ram_addr<4>" FAST;
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NET "ram_addr<5>" FAST;
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NET "ram_addr<6>" FAST;
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NET "ram_addr<7>" FAST;
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NET "ram_addr<8>" FAST;
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NET "ram_addr<9>" FAST;
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NET "ram_addr<10>" FAST;
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NET "ram_addr<11>" FAST;
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NET "ram_addr<12>" FAST;
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NET "ram_addr<13>" FAST;
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NET "ram_addr<14>" FAST;
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NET "ram_addr<15>" FAST;
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NET "ram_addr<16>" FAST;
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NET "ram_csn" FAST;
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NET "ram_data<0>" FAST;
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NET "ram_data<1>" FAST;
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NET "ram_data<2>" FAST;
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NET "ram_data<3>" FAST;
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NET "ram_data<4>" FAST;
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NET "ram_data<5>" FAST;
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NET "ram_data<6>" FAST;
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NET "ram_data<7>" FAST;
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NET "ram_data<8>" FAST;
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NET "ram_data<9>" FAST;
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NET "ram_data<10>" FAST;
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NET "ram_data<11>" FAST;
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NET "ram_data<12>" FAST;
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NET "ram_data<13>" FAST;
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NET "ram_data<14>" FAST;
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NET "ram_data<15>" FAST;
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NET "ram_wrln" FAST;
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NET "ram_wrun" FAST;

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