OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

[/] [a-z80/] [trunk/] [cpu/] [top-level-files.txt] - Blame information for rev 13

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 13 gdevic
# This is a list of A-Z80 top-level files and their dependencies.
2
# These files comprise the A-Z80 CPU proper. Use export.py to copy
3
# them into your project folder.
4
#
5
# Note for the users of Lattice FPGA toolset: instead of data_pins.v
6
# manually copy and use data_pins_lattice.v file instead.
7 3 gdevic
 
8
------ Control block -------
9
control/clk_delay.v
10
control/decode_state.v
11 6 gdevic
control/exec_module.vh
12 8 gdevic
control/execute.v
13
+ control/exec_matrix.vh
14
+ control/exec_matrix_compiled.vh
15
+ control/exec_module.vh
16
+ control/exec_zero.vh
17
+ control/temp_wires.vh
18 3 gdevic
control/interrupts.v
19
control/ir.v
20
control/pin_control.v
21 8 gdevic
control/pla_decode.v
22 3 gdevic
control/resets.v
23
control/memory_ifc.v
24
control/sequencer.v
25
 
26
---------- ALU -------------
27
alu/alu_control.v
28 8 gdevic
+ alu/alu_mux_4.v
29
+ alu/alu_mux_8.v
30 3 gdevic
alu/alu_select.v
31
alu/alu_flags.v
32 8 gdevic
+ alu/alu_mux_2.v
33
+ alu/alu_mux_4.v
34 3 gdevic
alu/alu.v
35 8 gdevic
+ alu/alu_core.v
36
+ alu/alu_slice.v
37
+ alu/alu_bit_select.v
38
+ alu/alu_shifter_core.v
39
+ alu/alu_mux_2z.v
40
+ alu/alu_mux_3z.v
41
+ alu/alu_prep_daa.v
42 3 gdevic
 
43
------ Register file -------
44
registers/reg_file.v
45 8 gdevic
+ registers/reg_latch.v
46 3 gdevic
registers/reg_control.v
47
 
48
------ Address latch -------
49
bus/address_latch.v
50 8 gdevic
+ bus/address_mux.v
51
+ bus/inc_dec.v
52
+ bus/inc_dec_2bit.v
53 3 gdevic
bus/address_pins.v
54
 
55
--------- Misc bus ---------
56
bus/bus_control.v
57 8 gdevic
bus/bus_switch.v
58
+ bus/data_switch.v
59
+ bus/data_switch_mask.v
60 3 gdevic
 
61
------ I/O pin control -----
62
bus/data_pins.v
63
bus/control_pins_n.v
64 8 gdevic
 
65
--------- Top level --------
66
+ toplevel/z80_top_direct_n.v
67
+ toplevel/core.vh
68
+ toplevel/coremodules.vh
69
+ toplevel/globals.vh
70
 
71
Files=49

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.