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[/] [a-z80/] [trunk/] [tools/] [zmac/] [make_fpga.bat] - Blame information for rev 17
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gdevic |
@echo off
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Rem
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gdevic |
Rem Assembles Z80 source file into object code and generates various
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Rem formats of that code to be used by FPGA test projects.
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gdevic |
Rem
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gdevic |
Rem Intel HEX files are used by ModelSim and Altera synthesis,
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Rem COE and MIF files are used by Xilinx and its ISim simulation.
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Rem
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gdevic |
Rem Give it an argument of the ASM file you want to use, or you can simply drag
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Rem and drop an asm file into it. If you drop an ASM file and there were errors,
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Rem this script will keep the DOS window open so you can see the errors.
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Rem
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zmac.exe --zmac %1
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if errorlevel 1 goto error
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bin2hex.exe zout\%~n1.cim fpga.hex
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if errorlevel 1 goto error
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gdevic |
python bin2coe.py zout\%~n1.cim ram.coe
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if errorlevel 1 goto error
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python bin2mif.py --simple zout\%~n1.cim ram.mif
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if errorlevel 1 goto error
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gdevic |
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Rem Copy hex files to their target Quartus/ModelSim host directories
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gdevic |
copy /Y fpga.hex ..\..\host\basic_de1
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copy /Y fpga.hex ..\..\host\basic_de1\simulation\modelsim
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gdevic |
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gdevic |
Rem Copy .mif and .coe files to their target Xilinx host directories
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copy /Y ram.mif ..\..\host\basic_nexys3\work
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gdevic |
goto end
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:error
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@echo ------------------------------------------------------
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gdevic |
@echo Errors processing %1
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gdevic |
@echo ------------------------------------------------------
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cmd
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:end
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