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[/] [adv_debug_sys/] [tags/] [ADS_RELEASE_1_2_0/] [Software/] [adv_jtag_bridge/] [dbg_api.c] - Blame information for rev 66

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Line No. Rev Author Line
1 21 nyawn 
/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module.
2 
   Copyright(C) Nathan Yawn, nyawn@opencores.net
3 
   based on code from jp2 by Marko Mlinar, markom@opencores.org
4 
 
5 
   This file contains API functions which may be called from the GDB
6 
   interface server.  These functions call the appropriate hardware-
7 
   specific functions for the advanced debug interface or the legacy
8 
   debug interface, depending on which is selected.
9 
 
10 
   This program is free software; you can redistribute it and/or modify
11 
   it under the terms of the GNU General Public License as published by
12 
   the Free Software Foundation; either version 2 of the License, or
13 
   (at your option) any later version.
14 
 
15 
   This program is distributed in the hope that it will be useful,
16 
   but WITHOUT ANY WARRANTY; without even the implied warranty of
17 
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 
   GNU General Public License for more details.
19 
 
20 
   You should have received a copy of the GNU General Public License
21 
   along with this program; if not, write to the Free Software
22 
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 
*/
24 
 
25 
 
26 
 
27 
#include <stdio.h>
28 
#include <pthread.h>  // for mutexes
29 
#include <arpa/inet.h>  // for ntohl()
30 
 
31 
#include "adv_dbg_commands.h"
32 
#include "legacy_dbg_commands.h"
33 
#include "cable_common.h"
34 
#include "errcodes.h"
35 
 
36 
#define debug(...) //fprintf(stderr, __VA_ARGS__ )
37 
 
38 
#define DBG_HW_ADVANCED 1
39 
#define DBG_HW_LEGACY   2
40 
#ifdef __LEGACY__
41 
#warning Compiling for LEGACY debug hardware!
42 
#define DEBUG_HARDWARE DBG_HW_LEGACY
43 
#else
44 
#warning Compiling for ADVANCED debug unit!
45 
#define DEBUG_HARDWARE  DBG_HW_ADVANCED
46 
#endif
47 
 
48 
pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER;
49 
 
50 
/* read a word from wishbone */
51 
int dbg_wb_read32(unsigned long adr, unsigned long *data) {
52 
  int err;
53 
  pthread_mutex_lock(&dbg_access_mutex);
54 
 
55 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
56 
    {
57 
      if ((err = adbg_select_module(DC_WISHBONE)))
58 
        {
59 
          cable_flush();
60 
          pthread_mutex_unlock(&dbg_access_mutex);
61 
          return err;
62 
        }
63 
      err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
64 
    }
65 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
66 
    {
67 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
68 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
69 
          err = legacy_dbg_go((unsigned char*)data, 4, 1);
70 
      *data = ntohl(*data);
71 
    }
72 
  cable_flush();
73 
  pthread_mutex_unlock(&dbg_access_mutex);
74 
  return err;
75 
}
76 
 
77 
/* write a word to wishbone */
78 
int dbg_wb_write32(unsigned long adr, unsigned long data) {
79 
  int err;
80 
  pthread_mutex_lock(&dbg_access_mutex);
81 
 
82 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
83 
    {
84 
      if ((err = adbg_select_module(DC_WISHBONE)))
85 
        {
86 
          cable_flush();
87 
          pthread_mutex_unlock(&dbg_access_mutex);
88 
          return err;
89 
        }
90 
      err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
91 
    }
92 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
93 
    {
94 
      data = ntohl(data);
95 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
96 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
97 
          err = legacy_dbg_go((unsigned char*)&data, 4, 0);
98 
    }
99 
  cable_flush();
100 
  pthread_mutex_unlock(&dbg_access_mutex);
101 
  return err;
102 
}
103 
 
104 
// write a word to wishbone
105 
// Never actually called from the GDB interface
106 
int dbg_wb_write16(unsigned long adr, uint16_t data) {
107 
  int err;
108 
  pthread_mutex_lock(&dbg_access_mutex);
109 
 
110 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
111 
    {
112 
      if ((err = adbg_select_module(DC_WISHBONE)))
113 
        {
114 
          cable_flush();
115 
          pthread_mutex_unlock(&dbg_access_mutex);
116 
          return err;
117 
        }
118 
      err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
119 
    }
120 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
121 
    {
122 
        data = ntohs(data);
123 
        if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
124 
          if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
125 
            err = legacy_dbg_go((unsigned char*)&data, 2, 0);
126 
    }
127 
  cable_flush();
128 
  pthread_mutex_unlock(&dbg_access_mutex);
129 
  return err;
130 
}
131 
 
132 
// write a word to wishbone
133 
// Never actually called from the GDB interface
134 
int dbg_wb_write8(unsigned long adr, uint8_t data) {
135 
  int err;
136 
  pthread_mutex_lock(&dbg_access_mutex);
137 
 
138 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
139 
    {
140 
      if ((err = adbg_select_module(DC_WISHBONE)))
141 
        {
142 
          cable_flush();
143 
          pthread_mutex_unlock(&dbg_access_mutex);
144 
          return err;
145 
        }
146 
      err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
147 
    }
148 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
149 
    {
150 
        if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
151 
          if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
152 
            err = legacy_dbg_go((unsigned char*)&data, 1, 0);
153 
    }
154 
  cable_flush();
155 
  pthread_mutex_unlock(&dbg_access_mutex);
156 
  return err;
157 
}
158 
 
159 
 
160 
int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) {
161 
  int err;
162 
  pthread_mutex_lock(&dbg_access_mutex);
163 
 
164 
  if(!len)
165 
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
166 
 
167 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
168 
    {
169 
      if ((err = adbg_select_module(DC_WISHBONE)))
170 
        {
171 
          cable_flush();
172 
          pthread_mutex_unlock(&dbg_access_mutex);
173 
          return err;
174 
        }
175 
      err = adbg_wb_burst_read(4, len, adr, (void *)data);  // 'len' is words.
176 
    }
177 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
178 
    {
179 
      int i;
180 
      int bytelen = len<<2;
181 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
182 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
183 
          if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
184 
            for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
185 
    }
186 
  cable_flush();
187 
  pthread_mutex_unlock(&dbg_access_mutex);
188 
  return err;
189 
}
190 
 
191 
 
192 
// Never actually called from the GDB interface
193 
int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) {
194 
  int err;
195 
  pthread_mutex_lock(&dbg_access_mutex);
196 
 
197 
  if(!len)
198 
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
199 
 
200 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
201 
    {
202 
      if ((err = adbg_select_module(DC_WISHBONE)))
203 
        {
204 
          cable_flush();
205 
          pthread_mutex_unlock(&dbg_access_mutex);
206 
          return err;
207 
        }
208 
      err = adbg_wb_burst_read(2, len, adr, (void *)data);  // 'len' is 16-bit halfwords
209 
    }
210 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
211 
    {
212 
      int i;
213 
      int bytelen = len<<1;
214 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
215 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
216 
          if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1)))  // 'len' is halfwords, call wants bytes
217 
            for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
218 
    }
219 
  cable_flush();
220 
  pthread_mutex_unlock(&dbg_access_mutex);
221 
  return err;
222 
}
223 
 
224 
// Never actually called from the GDB interface
225 
int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) {
226 
  int err;
227 
  pthread_mutex_lock(&dbg_access_mutex);
228 
 
229 
  if(!len)
230 
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
231 
 
232 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
233 
    {
234 
      if ((err = adbg_select_module(DC_WISHBONE)))
235 
        {
236 
          cable_flush();
237 
          pthread_mutex_unlock(&dbg_access_mutex);
238 
          return err;
239 
        }
240 
      err = adbg_wb_burst_read(1, len, adr, (void *)data);  // *** is 'len' bits or words?? Call wants words...
241 
    }
242 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
243 
    {
244 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
245 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
246 
          err = legacy_dbg_go((unsigned char*)data, len, 1);
247 
    }
248 
  cable_flush();
249 
  pthread_mutex_unlock(&dbg_access_mutex);
250 
  return err;
251 
}
252 
 
253 
 
254 
 
255 
// write a block to wishbone
256 
int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) {
257 
  int err;
258 
  pthread_mutex_lock(&dbg_access_mutex);
259 
 
260 
  if(!len)
261 
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
262 
 
263 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
264 
    {
265 
      if ((err = adbg_select_module(DC_WISHBONE)))
266 
        {
267 
          cable_flush();
268 
          pthread_mutex_unlock(&dbg_access_mutex);
269 
          return err;
270 
        }
271 
      err = adbg_wb_burst_write((void *)data, 4, len, adr);  // 'len' is words.
272 
    }
273 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
274 
    {
275 
      int i;
276 
      int bytelen = len << 2;
277 
      for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
278 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
279 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
280 
          err = legacy_dbg_go((unsigned char*)data, bytelen, 0);  // 'len' is words, call wants bytes
281 
    }
282 
  cable_flush();
283 
  pthread_mutex_unlock(&dbg_access_mutex);
284 
  return err;
285 
}
286 
 
287 
 
288 
// write a block to wishbone
289 
// Never actually called from the GDB interface
290 
int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) {
291 
  int err;
292 
  pthread_mutex_lock(&dbg_access_mutex);
293 
 
294 
  if(!len)
295 
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
296 
 
297 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
298 
    {
299 
      if ((err = adbg_select_module(DC_WISHBONE)))
300 
        {
301 
          cable_flush();
302 
          pthread_mutex_unlock(&dbg_access_mutex);
303 
          return err;
304 
        }
305 
      err = adbg_wb_burst_write((void *)data, 2, len, adr);  // 'len' is (half)words
306 
    }
307 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
308 
    {
309 
      int i;
310 
      int bytelen = len<<1;
311 
      for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
312 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
313 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
314 
          err = legacy_dbg_go((unsigned char*)data, bytelen, 0);  // 'len' is 16-bit halfwords, call wants bytes
315 
    }
316 
  cable_flush();
317 
  pthread_mutex_unlock(&dbg_access_mutex);
318 
  return err;
319 
}
320 
 
321 
// write a block to wishbone
322 
int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) {
323 
  int err;
324 
  pthread_mutex_lock(&dbg_access_mutex);
325 
 
326 
  if(!len)
327 
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
328 
 
329 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
330 
    {
331 
      if ((err = adbg_select_module(DC_WISHBONE)))
332 
        {
333 
          cable_flush();
334 
          pthread_mutex_unlock(&dbg_access_mutex);
335 
          return err;
336 
        }
337 
      err = adbg_wb_burst_write((void *)data, 1, len, adr);  // 'len' is in words...
338 
    }
339 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
340 
    {
341 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
342 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
343 
          err = legacy_dbg_go((unsigned char*)data, len, 0);
344 
    }
345 
  cable_flush();
346 
  pthread_mutex_unlock(&dbg_access_mutex);
347 
  return err;
348 
}
349 
 
350 
 
351 
/* read a register from cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
352 
int dbg_cpu0_read(unsigned long adr, unsigned long *data) {
353 
  int err;
354 
  pthread_mutex_lock(&dbg_access_mutex);
355 
 
356 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
357 
    {
358 
      if ((err = adbg_select_module(DC_CPU0)))
359 
        {
360 
          cable_flush();
361 
          pthread_mutex_unlock(&dbg_access_mutex);
362 
          return err;
363 
        }
364 
      err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
365 
    }
366 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
367 
    {
368 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
369 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
370 
          if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
371 
            *data = ntohl(*data);
372 
    }
373 
  cable_flush();
374 
  pthread_mutex_unlock(&dbg_access_mutex);
375 
  debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
376 
  return err;
377 
}
378 
 
379 
/* read multiple registers from cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
380 
int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) {
381 
  int err;
382 
  pthread_mutex_lock(&dbg_access_mutex);
383 
 
384 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
385 
    {
386 
      if ((err = adbg_select_module(DC_CPU0)))
387 
        {
388 
          cable_flush();
389 
          pthread_mutex_unlock(&dbg_access_mutex);
390 
          return err;
391 
        }
392 
      err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
393 
    }
394 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
395 
    {
396 
      int i;
397 
      unsigned long readaddr = adr;
398 
      err = APP_ERR_NONE;
399 
      for(i = 0; i < count; i++) {
400 
        err |= dbg_cpu0_read(readaddr++, &data[i]);
401 14 nyawn 
      }
402 21 nyawn 
    }
403 
  cable_flush();
404 
  pthread_mutex_unlock(&dbg_access_mutex);
405 
  debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
406 
  return err;
407 
}
408 
 
409 
/* write a cpu register to cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
410 
int dbg_cpu0_write(unsigned long adr, unsigned long data) {
411 
  int err;
412 
  pthread_mutex_lock(&dbg_access_mutex);
413 
 
414 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
415 
    {
416 
      if ((err = adbg_select_module(DC_CPU0)))
417 
        {
418 
          cable_flush();
419 
          pthread_mutex_unlock(&dbg_access_mutex);
420 
          return err;
421 
        }
422 
      err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
423 
    }
424 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
425 
    {
426 
      data = ntohl(data);
427 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
428 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
429 
          err = legacy_dbg_go((unsigned char*)&data, 4, 0);
430 
    }
431 
  debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
432 
  cable_flush();
433 
  pthread_mutex_unlock(&dbg_access_mutex);
434 
  return err;
435 
}
436 
 
437 
/* write multiple cpu registers to cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
438 
int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) {
439 
  int err;
440 
  pthread_mutex_lock(&dbg_access_mutex);
441 
 
442 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
443 
    {
444 
      if ((err = adbg_select_module(DC_CPU0)))
445 
        {
446 
          cable_flush();
447 
          pthread_mutex_unlock(&dbg_access_mutex);
448 
          return err;
449 
        }
450 
      err = adbg_wb_burst_write((void *)data, 4, count, adr);
451 
    }
452 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
453 
    {
454 
      int i;
455 
      unsigned long writeaddr = adr;
456 
      err = APP_ERR_NONE;
457 
      for(i = 0; i < count; i++) {
458 
        err |= dbg_cpu0_write(writeaddr++, data[i]);
459 
      }
460 
    }
461 
  debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
462 
  cable_flush();
463 
  pthread_mutex_unlock(&dbg_access_mutex);
464 
  return err;
465 
}
466 
 
467 
/* write a debug unit cpu module register
468 
 * Since OR32 debug module has only 1 register,
469 
 * adr is ignored (for now) */
470 
int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) {
471 
  int err = APP_ERR_NONE;
472 
  uint32_t dataword = data;
473 
  pthread_mutex_lock(&dbg_access_mutex);
474 
 
475 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
476 
    {
477 
      if ((err = adbg_select_module(DC_CPU0))) {
478 
        printf("Failed to set chain to 0x%X\n", DC_CPU0);
479 
        cable_flush();
480 
        pthread_mutex_unlock(&dbg_access_mutex);
481 
        return err;
482 
      }
483 
      if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
484 
        printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS );  // Only 2 bits: Reset, Stall
485 
        cable_flush();
486 
        pthread_mutex_unlock(&dbg_access_mutex);
487 
        return err;
488 
      }
489 
    }
490 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
491 
    {
492 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
493 
        err = legacy_dbg_ctrl(data & 2, data &1);
494 
    }
495 
  debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
496 
  cable_flush();
497 
  pthread_mutex_unlock(&dbg_access_mutex);
498 
  return err;
499 
}
500 
 
501 
 
502 
/* read a register from cpu module of the debug unit.
503 
 * Currently, there is only 1 register, so we do not need to select it, adr is ignored
504 
 */
505 
int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) {
506 
  int err = APP_ERR_NONE;
507 
  uint32_t dataword;
508 
  pthread_mutex_lock(&dbg_access_mutex);
509 
 
510 
  // reset is bit 1, stall is bit 0 in *data
511 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
512 
    {
513 
      if ((err = adbg_select_module(DC_CPU0))) {
514 
        printf("Failed to set chain to 0x%X\n", DC_CPU0);
515 
        cable_flush();
516 
        pthread_mutex_unlock(&dbg_access_mutex);
517 
        return err;
518 
      }
519 
      if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
520 
        printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
521 
        cable_flush();
522 
        pthread_mutex_unlock(&dbg_access_mutex);
523 
        return err;
524 
      }
525 
      *data = dataword;
526 
    }
527 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
528 
    {
529 
      int r, s;
530 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
531 
        err = legacy_dbg_ctrl_read(&r, &s);
532 
      *data = (r << 1) | s;
533 
      debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
534 
    }
535 
  cable_flush();
536 
  pthread_mutex_unlock(&dbg_access_mutex);
537 
  return err;
538 
}
539 
 
540 
// CPU1 Functions.  Note that 2 CPUs are not currently supported by GDB, so these are never actually
541 
// called from the GDB interface.  They are included for completeness and future use.
542 
// read a register from cpu1
543 
int dbg_cpu1_read(unsigned long adr, unsigned long *data)
544 
 {
545 
  int err;
546 
  pthread_mutex_lock(&dbg_access_mutex);
547 
 
548 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
549 
    {
550 
      if ((err = adbg_select_module(DC_CPU1)))
551 
        {
552 
          cable_flush();
553 
          pthread_mutex_unlock(&dbg_access_mutex);
554 
          return err;
555 
        }
556 
      err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
557 
    }
558 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
559 
    {
560 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
561 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
562 
          err = legacy_dbg_go((unsigned char*)data, 4, 1);
563 
      *data = ntohl(*data);
564 
    }
565 
  cable_flush();
566 
  pthread_mutex_unlock(&dbg_access_mutex);
567 
  return err;
568 
}
569 
 
570 
 
571 
// write a cpu register
572 
int dbg_cpu1_write(unsigned long adr, unsigned long data)
573 
{
574 
  int err;
575 
  pthread_mutex_lock(&dbg_access_mutex);
576 
 
577 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
578 
    {
579 
  if ((err = adbg_select_module(DC_CPU0)))
580 
    {
581 
      cable_flush();
582 
      pthread_mutex_unlock(&dbg_access_mutex);
583 
      return err;
584 
    }
585 
  err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
586 
    }
587 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
588 
    {
589 
      data = ntohl(data);
590 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
591 
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
592 
          err = legacy_dbg_go((unsigned char*)&data, 4, 0);
593 
    }
594 
  cable_flush();
595 
  pthread_mutex_unlock(&dbg_access_mutex);
596 
  return err;
597 
}
598 
 
599 
 
600 
// write a debug unit cpu module register
601 
int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) {
602 
   int err;
603 
  uint32_t dataword = data;
604 
  pthread_mutex_lock(&dbg_access_mutex);
605 
 
606 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
607 
    {
608 
      if ((err = adbg_select_module(DC_CPU1))) {
609 
        printf("Failed to set chain to 0x%X\n", DC_CPU1);
610 
        cable_flush();
611 
        pthread_mutex_unlock(&dbg_access_mutex);
612 
        return err;
613 
      }
614 
      if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
615 
        printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS );  // Only 2 bits: Reset, Stall
616 
        cable_flush();
617 
        pthread_mutex_unlock(&dbg_access_mutex);
618 
        return err;
619 
      }
620 
    }
621 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
622 
    {
623 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
624 
        err = legacy_dbg_ctrl(data & 2, data & 1);
625 
    }
626 
  cable_flush();
627 
  pthread_mutex_unlock(&dbg_access_mutex);
628 
  return err;
629 
}
630 
 
631 
 
632 
// read a debug unit cpu module register
633 
int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) {
634 
  int err;
635 
  uint32_t dataword;
636 
  pthread_mutex_lock(&dbg_access_mutex);
637 
 
638 
  // reset is bit 1, stall is bit 0 in *data
639 
 
640 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
641 
    {
642 
      if ((err = adbg_select_module(DC_CPU1))) {
643 
        printf("Failed to set chain to 0x%X\n", DC_CPU1);
644 
        cable_flush();
645 
        pthread_mutex_unlock(&dbg_access_mutex);
646 
        return err;
647 
      }
648 
      if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
649 
        printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
650 
        cable_flush();
651 
        pthread_mutex_unlock(&dbg_access_mutex);
652 
        return err;
653 
      }
654 
     *data = dataword;
655 
    }
656 
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
657 
    {
658 
      int r, s;
659 
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
660 
        err = legacy_dbg_ctrl_read(&r, &s);
661 
      *data = (r << 1) | s;
662 
    }
663 
  cable_flush();
664 
  pthread_mutex_unlock(&dbg_access_mutex);
665 
  return err;
666 
}
667 
 
668 
 
669 
 

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