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[/] [ae18/] [trunk/] [sw/] [asm/] [ae18_core.asm] - Blame information for rev 20

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;;;
;;; $Id: ae18_core.asm,v 1.4 2007-10-11 18:52:24 sybreon Exp $
;;;
;;; Copyright (C) 2006 Shawn Tan Ser Ngiap 
;;;
;;; This library is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU Lesser General Public License as published by
;;; the Free Software Foundation; either version 2.1 of the License,
;;; or (at your option) any later version.
;;;
;;; This library is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
;;; License for more details.
;;;
;;; You should have received a copy of the GNU Lesser General Public License
;;; along with this library; if not, write to the Free Software Foundation, Inc.,
;;; 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
;;;
;;; DESCRIPTION
;;; This file contains a simple test programme to test the functionality of
;;; the AE18 core. It is by no means an exhaustive test. However, it does
;;; perform at least each PIC18 command at least once. This file has been
;;; compiled using GPASM and GPLINK.
;;;
;;; $Log: not supported by cvs2svn $
;;;
 
        include "p18f452.inc"
 
        processor p18f452
        radix   hex
 
_RAM    udata   0x020
reg0    res     1
reg1    res     1
reg2    res     2
_FSR    udata   0x100
fsr0    res     10
fsr1    res     10
fsr2    res     10
 
_RESET  code    0x0000
        goto    _START_TEST
_ERROR:
        goto    $
 
_ISRH   code    0x08
        goto    _ISRH_TEST
 
_ISRL   code    0x018
        goto    _ISRL_TEST
 
_MAIN   code    0x0020
 
        ;;
        ;; MAIN test code loop
        ;; Calls a series of test subroutines. Ends with a SLEEP.
        ;;
_START_TEST:
        ;; Clear WDT
        clrwdt
 
        rcall   _NPC_TEST
        rcall   _LW2W_TEST
        rcall   _BSR_TEST
        rcall   _F2F_TEST
        rcall   _FW2W_TEST
        rcall   _FW2F_TEST
        rcall   _SKIP_TEST
        rcall   _BCC_TEST
        rcall   _C_TEST
        rcall   _MUL_TEST
        rcall   _BIT_TEST
        rcall   _N2F_TEST
        rcall   _FSR_TEST
        rcall   _SHA_TEST
        rcall   _TBL_TEST
        ;; rcall        _PCL_TEST
 
 
        ;; All tests OK!!
        sleep
 
        ;; BUGFIX! : Two NOPs required after SLEEP command.
        nop
        nop
 
        ;; RESET on wake up
        reset
 
        ;; Infinite Loop. It should NEVER loop.
        bra     $
 
        ;;
        ;; PCL tests - OK
        ;; Tests to check that PCLATU/PCLATH/PCL works.
        ;;
_PCL_TEST:
        movlw   UPPER(_PCL1)
        movwf   PCLATU
        movlw   HIGH(_PCL1)
        movwf   PCLATH
        movlw   LOW(_PCL1)
        movwf   PCL             ; Jump
        bra     $
_PCL1:
        movlw   0xFF
        movwf   PCLATU
        movwf   PCLATH
        movf    PCL,W           ; WREG = _PCL0
_PCL0:
        xorlw   LOW(_PCL0)
        bnz     $
        movf    PCLATH,W
        xorlw   HIGH(_PCL0)
        bnz     $
        movf    PCLATU,W
        xorlw   UPPER(_PCL0)
        bnz     $
 
        retlw   0x00
 
 
        ;;
        ;; TABLE tests - OK
        ;; Tests to check that TBLRD is working
        ;;
_TBL_TEST:
        clrf    TBLPTRH
        clrf    TBLPTRL
        tblrd*+                 ; TABLAT = 10
        movf    TABLAT,W
        xorlw   0x10
        bnz     $
        tblrd*+                 ; TABLAT = EF
        movf    TABLAT,W
        xorlw   0xEF
        bnz     $
        retlw   0x00
 
        ;;
        ;; SHADOW test - OK
        ;; Tests to make sure that CALL,S and RETURN,S are working
        ;;
_SHA_TEST:
        movlw   0xA5            ; WREG = 0xA5
        call    _SHA0,1
        xorlw   0xA5            ; Z = 1
        bnz     $
        retlw   0x00
_SHA0:
        movlw   0x00            ; WREG = 0x00
        xorlw   0x00            ; Z = 1
        bnz     $
        return  1               ; WREG = 0xA5
 
        ;;
        ;; FSR test - OK
        ;; Uses INDF0/INDF1/INDF2 for moving values around
        ;;
_FSR_TEST:
        lfsr    2,fsr2
        lfsr    1,fsr1
        lfsr    0,fsr0
 
        movlw   0xA5
        movwf   INDF0           ; FSR2 = A5
        movff   fsr0,reg0       ; REG2 = FSR2
        xorwf   reg0,W          ; Z = 1
        bnz     $
 
        movlw   0xB6
        movwf   INDF1
        movff   fsr1,reg1
        xorwf   reg1,W
        bnz     $
 
        movlw   0xC7
        movwf   INDF2
        movff   fsr2,reg2
        xorwf   reg2,W
        bnz     $
 
        retlw   0x00
 
        ;;
        ;; SETF/NEGF/CLRF tests - OK
        ;; Miscellaneous mono op operations
        ;;
_N2F_TEST:
        clrf    reg0            ; Z = 1, N = 0
        movf    reg0,F
        bnz     $
        bn      $
        setf    reg0            ; Z = 0, N = 1
        movf    reg0,F
        bz      $
        bnn     $
        negf    reg0            ; REG0 = 0x01
        movf    reg0,F
        bz      $
        bn      $
        retlw   0x00
 
        ;;
        ;; BCC test - OK
        ;; Tests all the Z/N/C/OV conditional branches for
        ;; positive and negative results
        ;;
_BCC_TEST:
        ;; Positive tests
        movlw   0x01
        movwf   reg0            ; REG0 = 0x01
 
        rrcf    reg0,W          ; C = 1, WREG = 0x00
        bc      $+4
        bra     $
        rlcf    reg0,W          ; C = 0, WREG = 0x02
        bnc     $+4
        bra     $
 
        andlw   0x00            ; Z = 1
        bz      $+4
        bra     $
        iorlw   0x01            ; Z = 0
        bnz     $+4
        bra     $
 
        xorlw   0x81            ; N = 1
        bn      $+4
        bra     $
        xorlw   0x80            ; N = 0
        bnn     $+4
        bra     $
 
        ;; Negative test
        movlw   0x00            ; WREG = 0
        addlw   0x00            ; WREG = 0, C = 0
        iorlw   0xFF            ; Z = 0, N = 1
        bz      $
        bnn     $
        bc      $
 
        addlw   0x01            ; C = 1, Z = 1, N = 0
        bnc     $
        bnz     $
        bn      $
 
        ;; Test OV
        movlw   0x80
        addlw   0x80            ; C = 1, OV = 1, N = 0, Z = 1
        bnov    $
        bov     $+4
        bra     $
        retlw   0x00
 
        ;;
        ;; BSR test - OK
        ;; Simple test to check that BSR is working
        ;;
_BSR_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movlb   0x02            ; BSR = 0x02
        movwf   0x00,B          ; (0x0200) = 0xA5
        movff   0x0200, 0x0000  ; (0x0000) = 0xA5
        swapf   0x0000,W        ; WREG = 0x5A;
        xorlw   0x5A            ; WREG = 0, Z = 1
        bnz     $
        retlw   0x00
 
        ;;
        ;; C used instruction tests
        ;; Tests a series of instructions that use C
        ;; TODO - verify
_C_TEST:
        movlw   0xFF            ; Indicate Start
        movlw   0x00
        addlw   0x00            ; C = 0
        movwf   reg2            ; REG2 = 0
 
        movlw   0x80            ; WREG = 0x80, C = 0
        addlw   0x80            ; WREG = 0x00, C = 1
        rrcf    reg2,W          ; WREG = 0x80, C = 0;
        addlw   0x80            ; WREG = 0x00, C = 1;
        rlcf    reg2,W          ; WREG = 0x01, C = 0;
 
        addlw   0xFF            ; WREG = 0x00, C = 1;
        addwfc  reg2,W          ; WREG = 0x01, C = 0;
 
        subwfb  reg2,W          ; WREG = 0xFE, C = 1;
        addwfc  reg2,W          ; WREG = 0xFF, C = 0;
        subfwb  reg2,W          ; WREG = 0xFE, C = 0;
 
        retlw   0x00
 
        ;;
        ;; SKIP tests - OK
        ;; Tests the various SNZ/SZ/SEQ/SGT/SLT instructions
        ;;
_SKIP_TEST:
        movlw   0x01            ; WREG = 0x01
        movwf   reg0            ; REG0 = 0x01
 
        btfss   reg0,0
        bra     $
        btfsc   reg0,1
        bra     $
 
        decfsz  reg0,f          ; REG0 = 0x00
        bra     $
        dcfsnz  reg0,f          ; REG0 = 0xFF
        bra     $
        incfsz  reg0,f          ; REG0 = 0x00
        bra     $
        infsnz  reg0,f          ; REG0 = 0x01
        bra     $
 
        cpfseq  reg0
        bra     $
        movlw   0x02
        cpfslt  reg0
        bra     $
        movlw   0x00            ; WREG = 0x00
        cpfsgt  reg0
        bra     $
 
        movlw   0x00
        movwf   reg2
        tstfsz  reg2
        bra     $
 
        retlw   0x00
 
        ;;
        ;; FILE * WREG => FILE tests - OK
        ;; Tests the series of byte file operations
        ;;
_FW2F_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
 
        swapf   reg2,F          ; REG2 = 0x5A
        andwf   reg2,F          ; REG2 = 0x00
        iorwf   reg2,F          ; REG2 = 0xA5
        xorwf   reg2,F          ; REG2 = 0x00
 
        addwf   reg2,F          ; REG2 = 0xA5
        subwf   reg2,F          ; REG2 = 0x00
 
        movwf   reg2            ; REG2 = 0xA5
        rrncf   reg2,F          ; REG2 = 0xD2
        rlncf   reg2,F          ; REG2 = 0xA5
 
        comf    reg2,F          ; REG2 = 0x5A
        incf    reg2,F          ; REG2 = 0x5B
        decf    reg2,F          ; REG2 = 0x5A
 
        xorwf   reg2,W          ; WREG = 0xFF
        xorlw   0xFF
        bnz     $
        retlw   0x00
 
        ;;
        ;; FILE * WREG => WREG test - OK
        ;; Tests the series of byte file operations
        ;;
_FW2W_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
 
        swapf   reg2,W          ; WREG = 0x5A
        andwf   reg2,W          ; WREG = 0x00
        iorwf   reg2,W          ; WREG = 0xA5
        xorwf   reg2,W          ; WREG = 0x00
 
        addwf   reg2,W          ; WREG = 0xA5
        subwf   reg2,W          ; WREG = 0x00
 
        rrncf   reg2,W          ; WREG = 0xD2
        rlncf   reg2,W          ; WREG = 0x4B
 
        comf    reg2,W          ; WREG = 0x5A
        incf    reg2,W          ; WREG = 0xA6
        decf    reg2,W          ; WREG = 0xA4
 
        xorlw   0xA4
        bnz     $
        retlw   0x00            ; WREG = 0x0
 
        ;;
        ;; MOVE FILE=>WREG/FILE=>FILE/WREG=>FILE tests - OK
        ;; Tests moves between FILE and WREG
        ;;
_F2F_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg0            ; REG0 = 0xA5
        movlw   0x00            ; WREG = 0x00
        movff   reg0,reg1       ; REG1 = 0xA5
        movf    reg0,f          ; REG0 = 0xA5
        movf    reg1,w          ; WREG = 0xA5
        xorlw   0xA5
        bnz     $
        retlw   0x00
 
        ;;
        ;; BIT test - OK
        ;; Tests the sequence of BIT ops
        ;;
_BIT_TEST:
        movlw   0xA5            ; WREG = 0xA5
        movwf   reg2            ; REG2 = 0xA5
        bcf     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA4
        bsf     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA5
        btg     reg2,0          ;
        movf    reg2,W          ; WREG = 0xA4
        xorlw   0xA4            ; Z = 1
        bnz     $
        retlw   0x00
 
        ;;
        ;; LIT * WREG => WREG tests - OK
        ;; Tests that the sequence of literal operations
        ;;
_LW2W_TEST:
        movlw   0xA5            ; WREG = 0xA5
        addlw   0x05            ; WREG = 0xAA
        sublw   0xFF            ; WREG = 0x55
        andlw   0xF0            ; WREG = 0x50
        iorlw   0x0A            ; WREG = 0x5A
        xorlw   0xFF            ; WREG = 0xA5
        xorlw   0xA5
        bnz     $
        retlw   0x00            ; WREG = 0x00
 
        ;;
        ;; NEAR test - OK
        ;; Tests the ability to perform BRA and RCALL by doing some
        ;; jump acrobatics.
        ;;
_NPC_TEST:
        bra     _NTFWD
        goto    $               ; Forward Jump
_NTFWD: bra     _NTBWD
_NTRET: return
        goto    $
_NTBWD: bra     _NTRET          ; Backward Jump
        goto    $
 
        ;;
        ;; MULLW/MULWF tests - OK
        ;; Tests that the multiplier produces the correct results
        ;;
_MUL_TEST:
        movlw   0x0A            ; WREG = 0x0A
        movwf   reg0            ; REG0 = 0x0A
        mullw   0xA0            ; PRODH,PRODL = 0x0640
 
        movf    PRODH,W         ; Z = 0
        xorlw   0x06            ; Z = 1
        bnz     $
        movf    PRODL,W         ; Z = 0
        xorlw   0x40            ; Z = 1
        bnz     $
 
        movlw   0x40            ; WREG = 0x40
        mulwf   reg0            ; PRODH,PRODL = 0x0280
 
        movf    PRODH,W         ; Z = 0
        xorlw   0x02            ; Z = 1
        bnz     $
        movf    PRODL,W         ; Z = 0
        xorlw   0x80            ; Z = 1
        bnz     $
 
        retlw   0x00
 
        ;;
        ;; Interrupt Response Test - OK
        ;; Just check to see if it jumps here and returns correctly.
        ;;
_ISRH_TEST:
_ISRL_TEST:
        nop                     ; Do something
        retfie  1
 
        ;; Add some NOP at the end to avoid simulation error
        ;; due to XXXX content at memory locations outside
        ;; of the end of the programme.
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        end

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[/] [ae18/] [trunk/] [sw/] [asm/] [ae18_core.asm] - Blame information for rev 20

Line No.	Rev	Author	Line
1	2	sybreon	`;;;`
2	19	sybreon	`;;; $Id: ae18_core.asm,v 1.4 2007-10-11 18:52:24 sybreon Exp $`
3	3	sybreon	`;;;`
4	2	sybreon	`;;; Copyright (C) 2006 Shawn Tan Ser Ngiap`
5			`;;;`
6			`;;; This library is free software; you can redistribute it and/or modify it`
7			`;;; under the terms of the GNU Lesser General Public License as published by`
8			`;;; the Free Software Foundation; either version 2.1 of the License,`
9			`;;; or (at your option) any later version.`
10			`;;;`
11			`;;; This library is distributed in the hope that it will be useful, but`
12			`;;; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
13			`;;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
14			`;;; License for more details.`
15			`;;;`
16			`;;; You should have received a copy of the GNU Lesser General Public License`
17			`;;; along with this library; if not, write to the Free Software Foundation, Inc.,`
18			`;;; 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA`
19			`;;;`
20			`;;; DESCRIPTION`
21			`;;; This file contains a simple test programme to test the functionality of`
22			`;;; the AE18 core. It is by no means an exhaustive test. However, it does`
23			`;;; perform at least each PIC18 command at least once. This file has been`
24			`;;; compiled using GPASM and GPLINK.`
25	19	sybreon	`;;;`
26			`;;; $Log: not supported by cvs2svn $`
27	2	sybreon	`;;;`
28
29			`include "p18f452.inc"`
30
31			`processor p18f452`
32			`radix hex`
33
34			`_RAM udata 0x020`
35			`reg0 res 1`
36			`reg1 res 1`
37			`reg2 res 2`
38			`_FSR udata 0x100`
39			`fsr0 res 10`
40			`fsr1 res 10`
41			`fsr2 res 10`
42
43			`_RESET code 0x0000`
44			`goto _START_TEST`
45			`_ERROR:`
46			`goto $`
47
48			`_ISRH code 0x08`
49			`goto _ISRH_TEST`
50
51			`_ISRL code 0x018`
52			`goto _ISRL_TEST`
53
54			`_MAIN code 0x0020`
55
56			`;;`
57			`;; MAIN test code loop`
58			`;; Calls a series of test subroutines. Ends with a SLEEP.`
59			`;;`
60			`_START_TEST:`
61			`;; Clear WDT`
62			`clrwdt`
63	5	sybreon
64	2	sybreon	`rcall _NPC_TEST`
65			`rcall _LW2W_TEST`
66			`rcall _BSR_TEST`
67			`rcall _F2F_TEST`
68			`rcall _FW2W_TEST`
69			`rcall _FW2F_TEST`
70			`rcall _SKIP_TEST`
71			`rcall _BCC_TEST`
72			`rcall _C_TEST`
73			`rcall _MUL_TEST`
74			`rcall _BIT_TEST`
75			`rcall _N2F_TEST`
76			`rcall _FSR_TEST`
77			`rcall _SHA_TEST`
78			`rcall _TBL_TEST`
79	19	sybreon	`;; rcall _PCL_TEST`
80	5	sybreon
81	2	sybreon
82			`;; All tests OK!!`
83			`sleep`
84
85			`;; BUGFIX! : Two NOPs required after SLEEP command.`
86			`nop`
87			`nop`
88
89			`;; RESET on wake up`
90			`reset`
91
92			`;; Infinite Loop. It should NEVER loop.`
93			`bra $`
94
95	5	sybreon	`;;`
96			`;; PCL tests - OK`
97			`;; Tests to check that PCLATU/PCLATH/PCL works.`
98	2	sybreon	`;;`
99	5	sybreon	`_PCL_TEST:`
100			`movlw UPPER(_PCL1)`
101			`movwf PCLATU`
102			`movlw HIGH(_PCL1)`
103			`movwf PCLATH`
104			`movlw LOW(_PCL1)`
105			`movwf PCL ; Jump`
106			`bra $`
107			`_PCL1:`
108			`movlw 0xFF`
109			`movwf PCLATU`
110			`movwf PCLATH`
111			`movf PCL,W ; WREG = _PCL0`
112			`_PCL0:`
113			`xorlw LOW(_PCL0)`
114			`bnz $`
115			`movf PCLATH,W`
116			`xorlw HIGH(_PCL0)`
117			`bnz $`
118			`movf PCLATU,W`
119			`xorlw UPPER(_PCL0)`
120			`bnz $`
121
122			`retlw 0x00`
123
124
125			`;;`
126	2	sybreon	`;; TABLE tests - OK`
127	3	sybreon	`;; Tests to check that TBLRD is working`
128	2	sybreon	`;;`
129			`_TBL_TEST:`
130	3	sybreon	`clrf TBLPTRH`
131			`clrf TBLPTRL`
132	2	sybreon	`tblrd*+ ; TABLAT = 10`
133	3	sybreon	`movf TABLAT,W`
134			`xorlw 0x10`
135			`bnz $`
136	2	sybreon	`tblrd*+ ; TABLAT = EF`
137	3	sybreon	`movf TABLAT,W`
138			`xorlw 0xEF`
139			`bnz $`
140	2	sybreon	`retlw 0x00`
141
142			`;;`
143			`;; SHADOW test - OK`
144			`;; Tests to make sure that CALL,S and RETURN,S are working`
145			`;;`
146			`_SHA_TEST:`
147			`movlw 0xA5 ; WREG = 0xA5`
148			`call _SHA0,1`
149			`xorlw 0xA5 ; Z = 1`
150			`bnz $`
151			`retlw 0x00`
152			`_SHA0:`
153			`movlw 0x00 ; WREG = 0x00`
154			`xorlw 0x00 ; Z = 1`
155			`bnz $`
156			`return 1 ; WREG = 0xA5`
157
158			`;;`
159			`;; FSR test - OK`
160			`;; Uses INDF0/INDF1/INDF2 for moving values around`
161			`;;`
162			`_FSR_TEST:`
163			`lfsr 2,fsr2`
164			`lfsr 1,fsr1`
165			`lfsr 0,fsr0`
166
167			`movlw 0xA5`
168			`movwf INDF0 ; FSR2 = A5`
169			`movff fsr0,reg0 ; REG2 = FSR2`
170			`xorwf reg0,W ; Z = 1`
171			`bnz $`
172
173			`movlw 0xB6`
174			`movwf INDF1`
175			`movff fsr1,reg1`
176			`xorwf reg1,W`
177			`bnz $`
178
179			`movlw 0xC7`
180			`movwf INDF2`
181			`movff fsr2,reg2`
182			`xorwf reg2,W`
183			`bnz $`
184
185			`retlw 0x00`
186
187			`;;`
188			`;; SETF/NEGF/CLRF tests - OK`
189			`;; Miscellaneous mono op operations`
190			`;;`
191			`_N2F_TEST:`
192			`clrf reg0 ; Z = 1, N = 0`
193			`movf reg0,F`
194			`bnz $`
195			`bn $`
196			`setf reg0 ; Z = 0, N = 1`
197			`movf reg0,F`
198			`bz $`
199			`bnn $`
200			`negf reg0 ; REG0 = 0x01`
201			`movf reg0,F`
202			`bz $`
203			`bn $`
204			`retlw 0x00`
205
206			`;;`
207			`;; BCC test - OK`
208			`;; Tests all the Z/N/C/OV conditional branches for`
209			`;; positive and negative results`
210			`;;`
211			`_BCC_TEST:`
212			`;; Positive tests`
213			`movlw 0x01`
214			`movwf reg0 ; REG0 = 0x01`
215
216			`rrcf reg0,W ; C = 1, WREG = 0x00`
217			`bc $+4`
218			`bra $`
219			`rlcf reg0,W ; C = 0, WREG = 0x02`
220			`bnc $+4`
221			`bra $`
222
223			`andlw 0x00 ; Z = 1`
224			`bz $+4`
225			`bra $`
226			`iorlw 0x01 ; Z = 0`
227			`bnz $+4`
228			`bra $`
229
230			`xorlw 0x81 ; N = 1`
231			`bn $+4`
232			`bra $`
233			`xorlw 0x80 ; N = 0`
234			`bnn $+4`
235			`bra $`
236
237			`;; Negative test`
238			`movlw 0x00 ; WREG = 0`
239			`addlw 0x00 ; WREG = 0, C = 0`
240			`iorlw 0xFF ; Z = 0, N = 1`
241			`bz $`
242			`bnn $`
243			`bc $`
244
245			`addlw 0x01 ; C = 1, Z = 1, N = 0`
246			`bnc $`
247			`bnz $`
248			`bn $`
249
250			`;; Test OV`
251			`movlw 0x80`
252			`addlw 0x80 ; C = 1, OV = 1, N = 0, Z = 1`
253			`bnov $`
254			`bov $+4`
255			`bra $`
256			`retlw 0x00`
257
258			`;;`
259			`;; BSR test - OK`
260			`;; Simple test to check that BSR is working`
261			`;;`
262			`_BSR_TEST:`
263			`movlw 0xA5 ; WREG = 0xA5`
264			`movlb 0x02 ; BSR = 0x02`
265			`movwf 0x00,B ; (0x0200) = 0xA5`
266			`movff 0x0200, 0x0000 ; (0x0000) = 0xA5`
267			`swapf 0x0000,W ; WREG = 0x5A;`
268			`xorlw 0x5A ; WREG = 0, Z = 1`
269			`bnz $`
270			`retlw 0x00`
271
272			`;;`
273			`;; C used instruction tests`
274			`;; Tests a series of instructions that use C`
275			`;; TODO - verify`
276			`_C_TEST:`
277			`movlw 0xFF ; Indicate Start`
278			`movlw 0x00`
279			`addlw 0x00 ; C = 0`
280			`movwf reg2 ; REG2 = 0`
281
282			`movlw 0x80 ; WREG = 0x80, C = 0`
283			`addlw 0x80 ; WREG = 0x00, C = 1`
284			`rrcf reg2,W ; WREG = 0x80, C = 0;`
285			`addlw 0x80 ; WREG = 0x00, C = 1;`
286			`rlcf reg2,W ; WREG = 0x01, C = 0;`
287
288			`addlw 0xFF ; WREG = 0x00, C = 1;`
289			`addwfc reg2,W ; WREG = 0x01, C = 0;`
290
291			`subwfb reg2,W ; WREG = 0xFE, C = 1;`
292			`addwfc reg2,W ; WREG = 0xFF, C = 0;`
293			`subfwb reg2,W ; WREG = 0xFE, C = 0;`
294
295			`retlw 0x00`
296
297			`;;`
298			`;; SKIP tests - OK`
299			`;; Tests the various SNZ/SZ/SEQ/SGT/SLT instructions`
300			`;;`
301			`_SKIP_TEST:`
302			`movlw 0x01 ; WREG = 0x01`
303			`movwf reg0 ; REG0 = 0x01`
304
305			`btfss reg0,0`
306			`bra $`
307			`btfsc reg0,1`
308			`bra $`
309
310			`decfsz reg0,f ; REG0 = 0x00`
311			`bra $`
312			`dcfsnz reg0,f ; REG0 = 0xFF`
313			`bra $`
314			`incfsz reg0,f ; REG0 = 0x00`
315			`bra $`
316			`infsnz reg0,f ; REG0 = 0x01`
317			`bra $`
318
319			`cpfseq reg0`
320			`bra $`
321	19	sybreon	`movlw 0x02`
322			`cpfslt reg0`
323			`bra $`
324	2	sybreon	`movlw 0x00 ; WREG = 0x00`
325			`cpfsgt reg0`
326			`bra $`
327
328			`movlw 0x00`
329			`movwf reg2`
330			`tstfsz reg2`
331			`bra $`
332
333			`retlw 0x00`
334
335			`;;`
336			`;; FILE * WREG => FILE tests - OK`
337			`;; Tests the series of byte file operations`
338			`;;`
339			`_FW2F_TEST:`
340			`movlw 0xA5 ; WREG = 0xA5`
341			`movwf reg2 ; REG2 = 0xA5`
342
343			`swapf reg2,F ; REG2 = 0x5A`
344			`andwf reg2,F ; REG2 = 0x00`
345			`iorwf reg2,F ; REG2 = 0xA5`
346			`xorwf reg2,F ; REG2 = 0x00`
347
348			`addwf reg2,F ; REG2 = 0xA5`
349			`subwf reg2,F ; REG2 = 0x00`
350
351			`movwf reg2 ; REG2 = 0xA5`
352			`rrncf reg2,F ; REG2 = 0xD2`
353			`rlncf reg2,F ; REG2 = 0xA5`
354
355			`comf reg2,F ; REG2 = 0x5A`
356			`incf reg2,F ; REG2 = 0x5B`
357			`decf reg2,F ; REG2 = 0x5A`
358
359	3	sybreon	`xorwf reg2,W ; WREG = 0xFF`
360			`xorlw 0xFF`
361	2	sybreon	`bnz $`
362			`retlw 0x00`
363
364			`;;`
365			`;; FILE * WREG => WREG test - OK`
366			`;; Tests the series of byte file operations`
367			`;;`
368			`_FW2W_TEST:`
369			`movlw 0xA5 ; WREG = 0xA5`
370			`movwf reg2 ; REG2 = 0xA5`
371
372			`swapf reg2,W ; WREG = 0x5A`
373			`andwf reg2,W ; WREG = 0x00`
374			`iorwf reg2,W ; WREG = 0xA5`
375			`xorwf reg2,W ; WREG = 0x00`
376
377			`addwf reg2,W ; WREG = 0xA5`
378			`subwf reg2,W ; WREG = 0x00`
379
380			`rrncf reg2,W ; WREG = 0xD2`
381			`rlncf reg2,W ; WREG = 0x4B`
382
383			`comf reg2,W ; WREG = 0x5A`
384			`incf reg2,W ; WREG = 0xA6`
385			`decf reg2,W ; WREG = 0xA4`
386
387			`xorlw 0xA4`
388			`bnz $`
389			`retlw 0x00 ; WREG = 0x0`
390
391			`;;`
392			`;; MOVE FILE=>WREG/FILE=>FILE/WREG=>FILE tests - OK`
393			`;; Tests moves between FILE and WREG`
394			`;;`
395			`_F2F_TEST:`
396			`movlw 0xA5 ; WREG = 0xA5`
397			`movwf reg0 ; REG0 = 0xA5`
398			`movlw 0x00 ; WREG = 0x00`
399			`movff reg0,reg1 ; REG1 = 0xA5`
400			`movf reg0,f ; REG0 = 0xA5`
401			`movf reg1,w ; WREG = 0xA5`
402			`xorlw 0xA5`
403			`bnz $`
404			`retlw 0x00`
405
406			`;;`
407			`;; BIT test - OK`
408			`;; Tests the sequence of BIT ops`
409			`;;`
410			`_BIT_TEST:`
411			`movlw 0xA5 ; WREG = 0xA5`
412			`movwf reg2 ; REG2 = 0xA5`
413			`bcf reg2,0 ;`
414			`movf reg2,W ; WREG = 0xA4`
415			`bsf reg2,0 ;`
416			`movf reg2,W ; WREG = 0xA5`
417			`btg reg2,0 ;`
418			`movf reg2,W ; WREG = 0xA4`
419			`xorlw 0xA4 ; Z = 1`
420			`bnz $`
421			`retlw 0x00`
422
423			`;;`
424			`;; LIT * WREG => WREG tests - OK`
425			`;; Tests that the sequence of literal operations`
426			`;;`
427			`_LW2W_TEST:`
428			`movlw 0xA5 ; WREG = 0xA5`
429			`addlw 0x05 ; WREG = 0xAA`
430			`sublw 0xFF ; WREG = 0x55`
431			`andlw 0xF0 ; WREG = 0x50`
432			`iorlw 0x0A ; WREG = 0x5A`
433			`xorlw 0xFF ; WREG = 0xA5`
434			`xorlw 0xA5`
435			`bnz $`
436			`retlw 0x00 ; WREG = 0x00`
437
438			`;;`
439			`;; NEAR test - OK`
440			`;; Tests the ability to perform BRA and RCALL by doing some`
441			`;; jump acrobatics.`
442			`;;`
443			`_NPC_TEST:`
444			`bra _NTFWD`
445			`goto $ ; Forward Jump`
446			`_NTFWD: bra _NTBWD`
447			`_NTRET: return`
448			`goto $`
449			`_NTBWD: bra _NTRET ; Backward Jump`
450			`goto $`
451
452			`;;`
453			`;; MULLW/MULWF tests - OK`
454			`;; Tests that the multiplier produces the correct results`
455			`;;`
456			`_MUL_TEST:`
457			`movlw 0x0A ; WREG = 0x0A`
458			`movwf reg0 ; REG0 = 0x0A`
459			`mullw 0xA0 ; PRODH,PRODL = 0x0640`
460
461			`movf PRODH,W ; Z = 0`
462			`xorlw 0x06 ; Z = 1`
463			`bnz $`
464			`movf PRODL,W ; Z = 0`
465			`xorlw 0x40 ; Z = 1`
466			`bnz $`
467
468			`movlw 0x40 ; WREG = 0x40`
469			`mulwf reg0 ; PRODH,PRODL = 0x0280`
470
471			`movf PRODH,W ; Z = 0`
472			`xorlw 0x02 ; Z = 1`
473			`bnz $`
474			`movf PRODL,W ; Z = 0`
475			`xorlw 0x80 ; Z = 1`
476			`bnz $`
477
478			`retlw 0x00`
479
480			`;;`
481			`;; Interrupt Response Test - OK`
482			`;; Just check to see if it jumps here and returns correctly.`
483			`;;`
484			`_ISRH_TEST:`
485			`_ISRL_TEST:`
486			`nop ; Do something`
487			`retfie 1`
488
489			`;; Add some NOP at the end to avoid simulation error`
490			`;; due to XXXX content at memory locations outside`
491			`;; of the end of the programme.`
492			`nop`
493			`nop`
494			`nop`
495			`nop`
496			`nop`
497			`nop`
498			`nop`
499			`nop`
500			`nop`
501			`end`